Luc Verhaegen has uploaded this change for review. ( https://review.coreboot.org/29092
Change subject: ati: add rv710/rv770/rv790 ids ......................................................................
ati: add rv710/rv770/rv790 ids
These fully match rx6xx.
Change-Id: Ia3bad57e00a29741b67fb1e8141c1c9cce887331 Signed-off-by: Luc Verhaegen libv@skynet.be --- M ati_spi.c 1 file changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/92/29092/1
diff --git a/ati_spi.c b/ati_spi.c index cc6fc55..87fe2d1 100644 --- a/ati_spi.c +++ b/ati_spi.c @@ -318,6 +318,10 @@ .data = NULL, /* make this our flashrom_pci_device... */ };
+/* + * Used by all Rx6xx and RV710/RV770/RV710. RV730/RV740 use a slightly + * different enable. + */ static const struct ati_spi_pci_private r600_spi_pci_private = { .io_bar = 2, .save = r600_spi_save, @@ -335,6 +339,23 @@ {0x1002, 0x940A, NT, &r600_spi_pci_private}, {0x1002, 0x940B, NT, &r600_spi_pci_private}, {0x1002, 0x940F, NT, &r600_spi_pci_private}, + {0x1002, 0x9440, NT, &r600_spi_pci_private}, + {0x1002, 0x9441, NT, &r600_spi_pci_private}, + {0x1002, 0x9442, NT, &r600_spi_pci_private}, + {0x1002, 0x9443, NT, &r600_spi_pci_private}, + {0x1002, 0x9444, NT, &r600_spi_pci_private}, + {0x1002, 0x9446, NT, &r600_spi_pci_private}, + {0x1002, 0x944A, NT, &r600_spi_pci_private}, + {0x1002, 0x944B, NT, &r600_spi_pci_private}, + {0x1002, 0x944C, NT, &r600_spi_pci_private}, + {0x1002, 0x944e, NT, &r600_spi_pci_private}, + {0x1002, 0x9450, NT, &r600_spi_pci_private}, + {0x1002, 0x9452, NT, &r600_spi_pci_private}, + {0x1002, 0x9456, NT, &r600_spi_pci_private}, + {0x1002, 0x945A, NT, &r600_spi_pci_private}, + {0x1002, 0x9460, NT, &r600_spi_pci_private}, + {0x1002, 0x9462, NT, &r600_spi_pci_private}, + {0x1002, 0x946A, NT, &r600_spi_pci_private}, {0x1002, 0x94C1, NT, &r600_spi_pci_private}, {0x1002, 0x94C3, NT, &r600_spi_pci_private}, {0x1002, 0x94C4, NT, &r600_spi_pci_private}, @@ -358,6 +379,13 @@ {0x1002, 0x9513, NT, &r600_spi_pci_private}, {0x1002, 0x9515, NT, &r600_spi_pci_private}, {0x1002, 0x9519, NT, &r600_spi_pci_private}, + {0x1002, 0x9540, NT, &r600_spi_pci_private}, + {0x1002, 0x954F, NT, &r600_spi_pci_private}, + {0x1002, 0x9552, NT, &r600_spi_pci_private}, + {0x1002, 0x9553, NT, &r600_spi_pci_private}, + {0x1002, 0x9555, NT, &r600_spi_pci_private}, + {0x1002, 0x9557, NT, &r600_spi_pci_private}, + {0x1002, 0x955F, NT, &r600_spi_pci_private}, {0x1002, 0x9580, NT, &r600_spi_pci_private}, {0x1002, 0x9581, NT, &r600_spi_pci_private}, {0x1002, 0x9583, NT, &r600_spi_pci_private},