David Tomaschik has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33639
Change subject: Add support for MX25U25635F. ......................................................................
Add support for MX25U25635F.
This is a 256Kb part with support for JEDEC 4 byte addressing modes. Tested successfully for probe/read.
Change-Id: I5bdcd32acd1942edf65e50bce0f81c836095ee8c Signed-off-by: David Tomaschik davidtomaschik@google.com --- M flashchips.c 1 file changed, 40 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/39/33639/1
diff --git a/flashchips.c b/flashchips.c index d85ea74..09cf8d1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8868,6 +8868,46 @@
{ .vendor = "Macronix", + .name = "MX25U25635F", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25U25635F, + .total_size = 32768, + .page_size = 256, + /* OTP: 512B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_4BA, + .tested = TEST_OK_PR, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + /* TODO: security register */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ + .unlock = spi_disable_blockprotect_bp3_srwd, + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 2000}, + }, + + { + .vendor = "Macronix", .name = "MX25U51245G", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID,