Attention is currently required from: Nico Huber, Subrata Banik, Edward O'Callaghan, Angel Pons. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62870 )
Change subject: ichspi: Add support for 64KB SPI erase operation ......................................................................
Patch Set 6:
(4 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/62870/comment/2b713e80_696c358a PS6, Line 9: This patch add support for SPI HW sequencing 64KB erase operation based Excuse my ignorance, but could you start with an introduction of the functionality. Is that a feature of new devices?
https://review.coreboot.org/c/flashrom/+/62870/comment/3e5353eb_b0be52ce PS6, Line 9: based : on erase_block size and `only_4k` flag is not set I do not know the whole code, but where is the `only_4k` done in the diff?
https://review.coreboot.org/c/flashrom/+/62870/comment/2662cb13_f6cec9f2 PS6, Line 13: TEST=Able to perform SPI erase operation on brya. Are they faster now?
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/62870/comment/1c03bff0_32c144f6 PS6, Line 1476: if (erase_block == 64 * KiB) : erase_cycle = HSFC_CYCLE_64K_ERASE; : else : erase_cycle = HSFC_CYCLE_4K_ERASE; Use ternary operator?
erase_cycle = (erase_block == 64 * KiB) ? HSFC_CYCLE_64K_ERASE : HSFC_CYCLE_4K_ERASE;