- flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: spi25_statusreg,flashchips: add SR2 read/write support
by Anastasia Klimchuk (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Nico Huber, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58570 ) Change subject: spi25_statusreg,flashchips: add SR2 read/write support ...................................................................... Patch Set 24: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/58570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db Gerrit-Change-Number: 58570 Gerrit-PatchSet: 24 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Tue, 01 Feb 2022 23:16:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in flashrom[master]: spi25_statusreg: make register read/write functions generic
by Anastasia Klimchuk (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Nico Huber, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58475 ) Change subject: spi25_statusreg: make register read/write functions generic ...................................................................... Patch Set 21: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/58475 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0a3951bbf993f2d8d830143b29d3ce16cc6901d7 Gerrit-Change-Number: 58475 Gerrit-PatchSet: 21 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Tue, 01 Feb 2022 23:16:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in flashrom[master]: writeprotect, cli_classic: delete old writeprotect code
by Anastasia Klimchuk (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Nico Huber, Nikolai Artemiev, Sergii Dmytruk. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58474 ) Change subject: writeprotect, cli_classic: delete old writeprotect code ...................................................................... Patch Set 15: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/58474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I67e9b31f86465e5a8f7d3def637198671ee818a8 Gerrit-Change-Number: 58474 Gerrit-PatchSet: 15 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Tue, 01 Feb 2022 23:15:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in flashrom[master]: Add mediatek_i2c_spi interface
by Edward O'Callaghan (Code Review) 01 Feb '22

01 Feb '22

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/61288 ) Change subject: Add mediatek_i2c_spi interface ...................................................................... Add mediatek_i2c_spi interface Add a spi_master interface supporting MediaTek MST9U ISP mode. Autodetect the bus type via I2C_FUNC_I2C, and use the appropriate read/write commands, in case the MST9U is attached to smbus. TEST=Successfully programmed SPI on test hardware. Change-Id: I24adb14e7b4f7160e1c3ff941774064d5a81e820 Signed-off-by: Neill Corlett <corlett(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61288 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M Makefile A mediatek_i2c_spi.c M meson.build M meson_options.txt M programmer.h M programmer_table.c 6 files changed, 531 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Edward O'Callaghan: Looks good to me, approved diff --git a/Makefile b/Makefile index d4de2ff..086cd45 100644 --- a/Makefile +++ b/Makefile @@ -482,6 +482,9 @@ # Disables LSPCON support until the i2c helper supports multiple systems. CONFIG_LSPCON_I2C_SPI ?= no +# Disables MediaTek support until the i2c helper supports multiple systems. +CONFIG_MEDIATEK_I2C_SPI ?= no + # Disables REALTEK_MST support until the i2c helper supports multiple systems. CONFIG_REALTEK_MST_I2C_SPI ?= no @@ -698,6 +701,11 @@ PROGRAMMER_OBJS += lspcon_i2c_spi.o endif +ifeq ($(CONFIG_MEDIATEK_I2C_SPI), yes) +FEATURE_FLAGS += -D'CONFIG_MEDIATEK_I2C_SPI=1' +PROGRAMMER_OBJS += mediatek_i2c_spi.o +endif + ifeq ($(CONFIG_REALTEK_MST_I2C_SPI), yes) FEATURE_FLAGS += -D'CONFIG_REALTEK_MST_I2C_SPI=1' PROGRAMMER_OBJS += realtek_mst_i2c_spi.o diff --git a/mediatek_i2c_spi.c b/mediatek_i2c_spi.c new file mode 100644 index 0000000..7d9610f --- /dev/null +++ b/mediatek_i2c_spi.c @@ -0,0 +1,512 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2021 The Chromium OS Authors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/i2c-dev.h> +#include <linux/i2c.h> +#include <stdlib.h> +#include <string.h> +#include <sys/ioctl.h> +#include <unistd.h> + +#include "flash.h" +#include "i2c_helper.h" +#include "programmer.h" +#include "spi.h" + +#define ISP_PORT (0x92 >> 1) +#define DEBUG_PORT (0xb2 >> 1) + +#define MTK_CMD_WRITE 0x10 +#define MTK_CMD_READ 0x11 +#define MTK_CMD_END 0x12 + +struct mediatek_data { + int fd; + unsigned long funcs; +}; + +// Returns null pointer on error. +static const struct mediatek_data *get_data_from_context( + const struct flashctx *flash) +{ + if (!flash || !flash->mst || !flash->mst->spi.data) { + msg_pdbg("Unable to extract data from flash context\n"); + return NULL; + } + return (const struct mediatek_data *)flash->mst->spi.data; +} + +// Returns bytes read, negative value on error. +static int read_raw(const struct mediatek_data *port, uint16_t addr, + uint8_t *buf, size_t len) +{ + int ret; + + if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) { + msg_pdbg("Invalid length for read command: %zu\n", len); + return SPI_INVALID_LENGTH; + } + + ret = ioctl(port->fd, I2C_SLAVE, addr); + if (ret) { + msg_pdbg("Failed to set slave address 0x%02x (%d)\n", addr, ret); + return ret; + } + + if (port->funcs & I2C_FUNC_I2C) { + // Use raw I2C read. + uint8_t command = MTK_CMD_READ; + if (write(port->fd, &command, 1) != 1) { + return SPI_GENERIC_ERROR; + } + if (read(port->fd, buf, len) != (int)len) { + return SPI_GENERIC_ERROR; + } + return len; + } + + union i2c_smbus_data data = { + .block[0] = len, + }; + struct i2c_smbus_ioctl_data args = { + .read_write = I2C_SMBUS_READ, + .command = MTK_CMD_READ, + .size = I2C_SMBUS_I2C_BLOCK_DATA, + .data = &data, + }; + ret = ioctl(port->fd, I2C_SMBUS, &args); + if (ret) { + msg_pdbg("Failed to read SMBus I2C block data\n"); + return ret; + } + memcpy(buf, args.data->block + 1, len); + return args.data->block[0]; +} + +// Returns non-zero value on error. +static int write_command(const struct mediatek_data *port, uint16_t addr, + uint8_t command, const uint8_t *buf, size_t len) +{ + int ret; + + if (len > I2C_SMBUS_BLOCK_MAX) { + msg_pdbg("Invalid length for write command: %zu\n", len); + return SPI_INVALID_LENGTH; + } + + ret = ioctl(port->fd, I2C_SLAVE, addr); + if (ret) { + msg_pdbg("Failed to set slave address: 0x%02x\n", addr); + return ret; + } + + if (port->funcs & I2C_FUNC_I2C) { + // Use raw I2C write. + uint8_t raw_buffer[I2C_SMBUS_BLOCK_MAX + 1]; + raw_buffer[0] = command; + if (len > 0) { + memcpy(raw_buffer + 1, buf, len); + } + if (write(port->fd, raw_buffer, len + 1) != (int)(len + 1)) { + return SPI_GENERIC_ERROR; + } + return 0; + } + + union i2c_smbus_data data = {0}; + struct i2c_smbus_ioctl_data args = { + .read_write = I2C_SMBUS_WRITE, + .command = command, + .data = &data, + }; + + // Special case single byte commands, as empty I2C block data commands + // failed on this component in practice. + if (len == 0) { + args.size = I2C_SMBUS_BYTE; + ret = ioctl(port->fd, I2C_SMBUS, &args); + if (ret) { + msg_pdbg("Failed to write SMBus byte: 0x%02x\n", command); + } + return ret; + } + + args.size = I2C_SMBUS_I2C_BLOCK_DATA; + data.block[0] = len; + if (buf && len) { + memcpy(data.block + 1, buf, len); + } + ret = ioctl(port->fd, I2C_SMBUS, &args); + if (ret) { + msg_pdbg("Failed to write SMBus I2C block data: 0x%02x\n", command); + } + return ret; +} + +// Returns non-zero value on error. +static int write_raw(const struct mediatek_data *port, uint16_t addr, + const uint8_t *buf, size_t len) +{ + if (len < 1) { + msg_pdbg("Invalid write length: %zu\n", len); + return SPI_INVALID_LENGTH; + } + return write_command(port, addr, buf[0], buf + 1, len - 1); +} + +// Read from a GPIO register via debug port. Returns non-zero value on error. +static int mediatek_read_gpio(const struct mediatek_data *port, + uint16_t gpio_addr, uint8_t *value) +{ + int ret; + + uint8_t data[2]; + data[0] = gpio_addr >> 8; + data[1] = gpio_addr & 0xff; + + ret = write_command(port, DEBUG_PORT, MTK_CMD_WRITE, data, ARRAY_SIZE(data)); + if (ret) { + msg_pdbg("Failed to issue read GPIO command at address 0x%04x\n", gpio_addr); + return ret; + } + + size_t len = 1; + ret = read_raw(port, DEBUG_PORT, value, len); + if (ret < 0) { + msg_pdbg("Failed to read GPIO register at address 0x%04x\n", gpio_addr); + return ret; + } + + if (ret != 1) { + msg_pdbg("GPIO read returned improper length: %d\n", ret); + return SPI_INVALID_LENGTH; + } + + return 0; +} + +// Write to a GPIO register via the debug port. Returns non-zero value on error. +static int mediatek_write_gpio(const struct mediatek_data *port, + uint16_t gpio_addr, uint8_t value) +{ + uint8_t data[3]; + data[0] = gpio_addr >> 8; + data[1] = gpio_addr & 0xff; + data[2] = value; + + return write_command(port, DEBUG_PORT, MTK_CMD_WRITE, data, ARRAY_SIZE(data)); +} + +// Write a single bit value to a GPIO register via the debug port. Returns +// non-zero value on error. +static int mediatek_set_gpio_bit(const struct mediatek_data *port, + uint16_t gpio_addr, int bit, int value) +{ + int ret; + uint8_t data; + + ret = mediatek_read_gpio(port, gpio_addr, &data); + if (ret) { + msg_pdbg("Failed to read GPIO 0x%04x\n", gpio_addr); + return ret; + } + + if (value) { + data |= (1 << bit); + } else { + data &= ~(1 << bit); + } + + ret = mediatek_write_gpio(port, gpio_addr, data); + if (ret) { + msg_pdbg("Failed to set GPIO 0x%04x to 0x%02x\n", gpio_addr, data); + return ret; + } + return ret; +} + +// Poke the GPIO line that goes to SPI WP# using the MST9U GPIO register +// addresses. Returns non-zero value on error. +static int mediatek_set_write_protect(const struct mediatek_data *port, + int protected) +{ + int ret; + + ret = mediatek_set_gpio_bit(port, 0x426, 7, (protected == 0)); + if (ret) { + msg_perr("Failed to set GPIO out value: %d\n", protected == 0); + return ret; + } + + ret = mediatek_set_gpio_bit(port, 0x428, 7, (protected != 0)); + if (ret) { + msg_perr("Failed to set GPIO enable value: %d\n", protected != 0); + return ret; + } + + return 0; +} + +// Enter serial debug mode using "Option 1" for MST9U and select I2C channel 0 +// to configure write protect GPIOs. Returns non-zero value on error. +static int mediatek_enter_serial_debug_mode(const struct mediatek_data *port) +{ + int ret; + + uint8_t enter_serial_debug[] = { 'S', 'E', 'R', 'D', 'B' }; + ret = write_raw(port, DEBUG_PORT, enter_serial_debug, + ARRAY_SIZE(enter_serial_debug)); + if (ret) { + msg_perr("Failed to send enter serial debug mode command\n"); + return ret; + } + + uint8_t enter_single_step_1[] = { 0xc0, 0xc1, 0x53 }; + ret = write_command(port, DEBUG_PORT, MTK_CMD_WRITE, + enter_single_step_1, ARRAY_SIZE(enter_single_step_1)); + if (ret) { + msg_perr("Failed to enter serial single step mode (part 1)\n"); + return ret; + } + + uint8_t enter_single_step_2[] = { 0x1f, 0xc1, 0x53 }; + ret = write_command(port, DEBUG_PORT, MTK_CMD_WRITE, enter_single_step_2, + ARRAY_SIZE(enter_single_step_2)); + if (ret) { + msg_perr("Failed to enter serial single step mode (part 2)\n"); + return ret; + } + + // Send each I2C channel 0 configuration byte individually. + uint8_t i2c_channel_0_config[] = + { 0x80, 0x82, 0x84, 0x51, 0x7f, 0x37, 0x61 }; + for (size_t i = 0; i < ARRAY_SIZE(i2c_channel_0_config); ++i) { + ret = write_command( + port, DEBUG_PORT, i2c_channel_0_config[i], NULL, 0); + if (ret) { + msg_perr("Failed to configure i2c channel 0: 0x%02x\n", + i2c_channel_0_config[i]); + return ret; + } + } + + uint8_t enter_single_step_3[] = { 0x00, 0x00, 0x00 }; + ret = write_command(port, DEBUG_PORT, MTK_CMD_WRITE, enter_single_step_3, + ARRAY_SIZE(enter_single_step_3)); + if (ret) { + msg_perr("Failed to enter serial single step mode (part 3)\n"); + return ret; + } + + ret = write_command(port, DEBUG_PORT, 0x35, NULL, 0); + if (ret) { + msg_perr("Failed to send serial debug command (part 1)\n"); + return ret; + } + + ret = write_command(port, DEBUG_PORT, 0x71, NULL, 0); + if (ret) { + msg_perr("Failed to send serial debug command (part 2)\n"); + return ret; + } + + return 0; +} + +// Returns non-zero value on error. +static int mediatek_enter_isp(const struct mediatek_data *port) +{ + int ret; + + ret = mediatek_enter_serial_debug_mode(port); + if (ret) { + msg_perr("Failed to enter serial debug mode\n"); + return ret; + } + + // MediaTek documentation says to do this twice just in case. + uint8_t enter_isp[] = { 'M', 'S', 'T', 'A', 'R' }; + ret = write_raw(port, ISP_PORT, enter_isp, ARRAY_SIZE(enter_isp)); + if (ret) { + msg_gwarn("Failed to enter ISP mode, trying again\n"); + } + ret = write_raw(port, ISP_PORT, enter_isp, ARRAY_SIZE(enter_isp)); + if (ret) { + msg_gwarn("Might already be in ISP mode, ignoring\n"); + } + + ret = mediatek_set_write_protect(port, 0); + if (ret) { + msg_perr("Failed to disable write protection\n"); + return ret; + } + + return 0; +} + +// Returns non-zero value on error. +static int mediatek_exit_isp(const struct mediatek_data *port) +{ + int ret; + + ret = mediatek_set_write_protect(port, 1); + if (ret) { + msg_perr("Failed to re-enable write protect\n"); + return ret; + } + + uint8_t exit_single_step[] = { 0xc0, 0xc1, 0xff }; + ret = write_command(port, DEBUG_PORT, MTK_CMD_WRITE, exit_single_step, + ARRAY_SIZE(exit_single_step)); + if (ret) { + msg_perr("Failed to exit single step mode\n"); + return ret; + } + + ret = write_command(port, DEBUG_PORT, 0x34, NULL, 0); + if (ret) { + msg_perr("Failed to exit serial debug mode (1), ignoring\n"); + } + + ret = write_command(port, DEBUG_PORT, 0x45, NULL, 0); + if (ret) { + msg_perr("Failed to exit serial debug mode (2), ignoring\n"); + } + + ret = write_command(port, ISP_PORT, 0x24, NULL, 0); + if (ret) { + msg_perr("Failed to exit ISP mode command, ignoring\n"); + } + + return 0; +} + +static int mediatek_send_command(const struct flashctx *flash, + unsigned int writecnt, unsigned int readcnt, + const uint8_t *writearr, uint8_t *readarr) +{ + const struct mediatek_data *port = get_data_from_context(flash); + if (!port) { + msg_perr("Failed to extract chip data for ISP command\n"); + return SPI_GENERIC_ERROR; + } + + int ret; + + if (writecnt) { + ret = write_command(port, ISP_PORT, MTK_CMD_WRITE, + writearr, writecnt); + if (ret) { + msg_perr("Failed to issue ISP write command\n"); + return ret; + } + } + + if (readcnt) { + size_t len = readcnt; + ret = read_raw(port, ISP_PORT, readarr, len); + if (ret < 0) { + msg_perr("Failed to read ISP command result\n"); + return ret; + } + + if (ret != (int)readcnt) { + msg_perr("Read length mismatched: expected %u got %d\n", readcnt, ret); + return SPI_INVALID_LENGTH; + } + } + + // End the current command. + ret = write_command(port, ISP_PORT, MTK_CMD_END, NULL, 0); + if (ret) { + msg_perr("Failed to end ISP command\n"); + return ret; + } + + return 0; +} + +static const struct spi_master spi_master_i2c_mediatek = { + .max_data_read = I2C_SMBUS_BLOCK_MAX, + // Leave room for 1-byte command and up to a 4-byte address. + .max_data_write = I2C_SMBUS_BLOCK_MAX - 5, + .command = mediatek_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, +}; + +static int mediatek_shutdown(void *data) +{ + int ret = 0; + struct mediatek_data *port = (struct mediatek_data *)data; + + ret |= mediatek_exit_isp(port); + i2c_close(port->fd); + free(data); + + return ret; +} + +static int mediatek_init(void) +{ + int ret; + int fd = i2c_open_from_programmer_params(ISP_PORT, 0); + if (fd < 0) { + msg_perr("Failed to open i2c\n"); + return fd; + } + + struct mediatek_data *port = calloc(1, sizeof(*port)); + if (!port) { + msg_perr("Unable to allocate space for SPI master data\n"); + i2c_close(fd); + return SPI_GENERIC_ERROR; + } + port->fd = fd; + + ret = ioctl(fd, I2C_FUNCS, &(port->funcs)); + if (ret) { + msg_perr("Failed to fetch I2C bus functionality\n"); + free(port); + i2c_close(fd); + return ret; + } + + ret = mediatek_enter_isp(port); + if (ret) { + msg_perr("Failed to enter ISP mode\n"); + free(port); + i2c_close(fd); + return ret; + } + + ret |= register_shutdown(mediatek_shutdown, port); + ret |= register_spi_master(&spi_master_i2c_mediatek, port); + + return ret; +} + +const struct programmer_entry programmer_mediatek_i2c_spi = { + .name = "mediatek_i2c_spi", + .type = OTHER, + .devs.note = "Device files /dev/i2c-*\n", + .init = mediatek_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, +}; diff --git a/meson.build b/meson.build index cb34e54..cd9f9fb 100644 --- a/meson.build +++ b/meson.build @@ -96,6 +96,7 @@ config_usbblaster_spi = get_option('config_usbblaster_spi') config_stlinkv3_spi = get_option('config_stlinkv3_spi') config_lspcon_i2c_spi = get_option('config_lspcon_i2c_spi') +config_mediatek_i2c_spi = get_option('config_mediatek_i2c_spi') config_realtek_mst_i2c_spi = get_option('config_realtek_mst_i2c_spi') config_print_wiki= get_option('print_wiki') config_default_programmer_name = get_option('default_programmer_name') @@ -345,6 +346,10 @@ srcs += 'lspcon_i2c_spi.c' cargs += '-DCONFIG_LSPCON_I2C_SPI=1' endif +if config_mediatek_i2c_spi + srcs += 'mediatek_i2c_spi.c' + cargs += '-DCONFIG_MEDIATEK_I2C_SPI=1' +endif if config_realtek_mst_i2c_spi srcs += 'realtek_mst_i2c_spi.c' cargs += '-DCONFIG_REALTEK_MST_I2C_SPI=1' diff --git a/meson_options.txt b/meson_options.txt index 588ed5b..8022c74 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -40,4 +40,5 @@ option('config_usbblaster_spi', type : 'boolean', value : true, description : 'Altera USB-Blaster dongles') option('config_stlinkv3_spi', type : 'boolean', value : true, description : 'STMicroelectronics STLINK-V3') option('config_lspcon_i2c_spi', type : 'boolean', value : false, description : 'Parade lspcon USB-C to HDMI protocol translator') +option('config_mediatek_i2c_spi', type : 'boolean', value : false, description : 'MediaTek LCD controller') option('config_realtek_mst_i2c_spi', type : 'boolean', value : true, description : 'Realtek MultiStream Transport MST') diff --git a/programmer.h b/programmer.h index 4dd4cad..647d822 100644 --- a/programmer.h +++ b/programmer.h @@ -76,6 +76,7 @@ extern const struct programmer_entry programmer_linux_mtd; extern const struct programmer_entry programmer_linux_spi; extern const struct programmer_entry programmer_lspcon_i2c_spi; +extern const struct programmer_entry programmer_mediatek_i2c_spi; extern const struct programmer_entry programmer_mstarddc_spi; extern const struct programmer_entry programmer_ni845x_spi; extern const struct programmer_entry programmer_nic3com; diff --git a/programmer_table.c b/programmer_table.c index e406f67..2a06c30 100644 --- a/programmer_table.c +++ b/programmer_table.c @@ -128,6 +128,10 @@ &programmer_lspcon_i2c_spi, #endif +#if CONFIG_MEDIATEK_I2C_SPI == 1 + &programmer_mediatek_i2c_spi, +#endif + #if CONFIG_REALTEK_MST_I2C_SPI == 1 &programmer_realtek_mst_i2c_spi, #endif 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/flashrom/+/61288 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I24adb14e7b4f7160e1c3ff941774064d5a81e820 Gerrit-Change-Number: 61288 Gerrit-PatchSet: 4 Gerrit-Owner: Neill Corlett <corlett(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Marheine <pmarheine(a)chromium.org> Gerrit-MessageType: merged

1 0

Change in flashrom[master]: meson: replace target_machine by host_machine
by Thomas Heijligen (Code Review) 01 Feb '22

01 Feb '22

Thomas Heijligen has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/61197 ) Change subject: meson: replace target_machine by host_machine ...................................................................... Abandoned Resolved otherwise -- To view, visit https://review.coreboot.org/c/flashrom/+/61197 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I4a32c73052c3707607738c72256fb4366a2bf8ce Gerrit-Change-Number: 61197 Gerrit-PatchSet: 2 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

1 0

Change in flashrom[master]: Makefile: use pkg-config --libs --static for LDFLAGS
by Angel Pons (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Felix Singer, Nico Huber, Thomas Heijligen. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61524 ) Change subject: Makefile: use pkg-config --libs --static for LDFLAGS ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/61524 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6029a096c1ceca625789d18c88119d912d79bc0e Gerrit-Change-Number: 61524 Gerrit-PatchSet: 4 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Tue, 01 Feb 2022 13:26:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in flashrom[master]: Makefile: check if librt is an external library
by Thomas Heijligen (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Nico Huber. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61523 ) Change subject: Makefile: check if librt is an external library ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/61523/comment/7465125e_538a8fa9 PS3, Line 10: fail linking > IMHO, "fail to link" sounds more natural +1 -- To view, visit https://review.coreboot.org/c/flashrom/+/61523 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2c1668a350aa0806fccfb4e9cd8b04861f085ee9 Gerrit-Change-Number: 61523 Gerrit-PatchSet: 4 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Tue, 01 Feb 2022 12:40:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in flashrom[master]: Makefile: use pkg-config --libs --static for LDFLAGS
by Thomas Heijligen (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Felix Singer, Nico Huber, Angel Pons. Hello Felix Singer, build bot (Jenkins), Nico Huber, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/61524 to look at the new patch set (#4). Change subject: Makefile: use pkg-config --libs --static for LDFLAGS ...................................................................... Makefile: use pkg-config --libs --static for LDFLAGS The --static flag of pkg-config returns also the LDFLAGS which are required to link the library static. Use this flag to successfully link against static libraries when the shared variant is not available. This is the case in OpenBSD with libpci. Change-Id: I6029a096c1ceca625789d18c88119d912d79bc0e Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com> --- M Makefile M Makefile.include 2 files changed, 1 insertion(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/24/61524/4 -- To view, visit https://review.coreboot.org/c/flashrom/+/61524 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6029a096c1ceca625789d18c88119d912d79bc0e Gerrit-Change-Number: 61524 Gerrit-PatchSet: 4 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

1 0

Change in flashrom[master]: platform/pci.h: adapt NetBSD include path to pkg-config
by Thomas Heijligen (Code Review) 01 Feb '22

01 Feb '22

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/61525 to look at the new patch set (#3). Change subject: platform/pci.h: adapt NetBSD include path to pkg-config ...................................................................... platform/pci.h: adapt NetBSD include path to pkg-config The pkg-config include path resolves the pciutils directory. So the include is only the pci.h file. Change-Id: I69dc8184d1d012fb695770cbf6f7c64e5a024453 Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com> --- M platform/pci.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/25/61525/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/61525 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I69dc8184d1d012fb695770cbf6f7c64e5a024453 Gerrit-Change-Number: 61525 Gerrit-PatchSet: 3 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in flashrom[master]: Makefile: check if librt is an external library
by Thomas Heijligen (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Nico Huber, Thomas Heijligen. Hello Felix Singer, build bot (Jenkins), Nico Huber, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/61523 to look at the new patch set (#4). Change subject: Makefile: check if librt is an external library ...................................................................... Makefile: check if librt is an external library Some systems, e.g. OpenBSD, have clock_gettime / librt build into the libc and therefore fail to link against it with -lrt. Thus, detect this and link only if needed. Change-Id: I2c1668a350aa0806fccfb4e9cd8b04861f085ee9 Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com> --- M Makefile M Makefile.include 2 files changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/23/61523/4 -- To view, visit https://review.coreboot.org/c/flashrom/+/61523 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2c1668a350aa0806fccfb4e9cd8b04861f085ee9 Gerrit-Change-Number: 61523 Gerrit-PatchSet: 4 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: newpatchset

1 0

2024

2023

2022

2021

2020

2019

2018

2017

flashrom-gerrit