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[M] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#9). Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Add support for VIA VL805 USB 3 XHCI flashing It works fine for me on my Raspberry Pi 4 Model B. Was able … [View More]

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[S] Change in flashrom[master]: Add missing Intel B460 flash chip id
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Hello build bot (Jenkins), Paul Menzel, Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72056 to look at the new patch set (#5). Change subject: Add missing Intel B460 flash chip id ...................................................................... Add missing Intel B460 flash chip id Note that while I can read the chip, on my Lenovo Legion T5 28IMB05,… [View More]

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[S] Change in flashrom[master]: Add missing Intel B460 flash chip id.
by Paul Menzel (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72056 ) Change subject: Add missing Intel B460 flash chip id. ...................................................................... Patch Set 4: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/72056/comment/36c600d3_2337d33a PS4, Line 7: Add missing Intel B460 flash chip id. Nit: Please also … [View More]

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[S] Change in flashrom[master]: Add missing Intel B460 flash chip id.
by Thomas Heijligen (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72056 ) Change subject: Add missing Intel B460 flash chip id. ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/72056 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings … [View More]

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[M] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by Thomas Heijligen (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: ChrisEric1 CECL, Nicholas Chin. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72057 ) Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Patch Set 8: (6 comments) Patchset: PS3: > Hello! […] 1. Ok, 2. Yes, thats fine. But I missed one thing. Can you add `vl805` also to `meson_options.txt` under `option('programmer', .… [View More]..` 3. I'll also have a closer look for the RDID4. This has something to do with how many ID bytes were queried IIRC. I've found also an VL805 PCI card in my pile of stuff and will give your patch a try tomorrow. File flashchips.c: https://review.coreboot.org/c/flashrom/+/72057/comment/224f6d01_f91557c9 PS8, Line 19126: .probe = PROBE_SPI_RDID4, This should also be an other commit. Can be before this or after. File flashrom.8.tmpl: https://review.coreboot.org/c/flashrom/+/72057/comment/aa48f95d_248c16bd PS8, Line 1706: and raw memory access pci configutation space is enough. File vl805.c: https://review.coreboot.org/c/flashrom/+/72057/comment/472a7fc5_bb509e79 PS3, Line 38: static struct pci_dev *dev = NULL; > Cannot do that, this part is outside of the global which needs it: […] This was referred to `static struct pci_dev *dev = NULL`, not `dev_entries`. The plan is to have the `pci_dev` handle in a data struct, allocated by `vl805_init()` and passed on via the `flashxtx *ctx->mst->spi.data`. So ``` void vl805_setregval(int reg, uint32_t val) ``` becomes ``` void vl805_setregval(struct pci_dev *dev, int reg, uint32_t val) ``` And `vl805_spi_send_command` gets the pci_dev* like in `pickit2_spi.c:402` https://review.coreboot.org/c/flashrom/+/72057/comment/384dc12a_9d074372 PS3, Line 72: uint32_t indata = 0; : unsigned int curwritecnt = 0; : unsigned int curreadcnt = 0; > I don't understand what you are trying to say, if you remove the highlighted part, it fails to build […] The ` = 0` is not needed for each of them. A declaration of those variables is sufficient. They don't need to be initialized. https://review.coreboot.org/c/flashrom/+/72057/comment/125a2ad4_739206f3 PS3, Line 107: static const struct spi_master spi_master_vl805 = { > I have no clue right now, but I added it in to see if it works later. Done -- To view, visit https://review.coreboot.org/c/flashrom/+/72057 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I71435afcacdf97e14d627e35bce3d29de9657f38 Gerrit-Change-Number: 72057 Gerrit-PatchSet: 8 Gerrit-Owner: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Feb 2023 16:18:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: ChrisEric1 CECL <christopherericlentocha(a)gmail.com> Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: comment [View Less]

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[S] Change in flashrom[master]: Add support for AMD Ryzen flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Arthur Heymans, Nicholas Chin. Hello build bot (Jenkins), Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72058 to look at the new patch set (#4). Change subject: Add support for AMD Ryzen flashing ...................................................................... Add support for AMD Ryzen flashing Tested AMD Ryzen Support on HP Pavilion 590-p0077c, I am able to flash using F.15 or … [View More]

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[M] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Thomas Heijligen, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#7). Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Add support for VIA VL805 USB 3 XHCI flashing It works fine for me on my Raspberry Pi 4 Model B. Was able … [View More]

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[M] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Thomas Heijligen, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#6). Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Add support for VIA VL805 USB 3 XHCI flashing It works fine for me on my Raspberry Pi 4 Model B. Was able … [View More]

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[XL] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Thomas Heijligen, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#5). Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Add support for VIA VL805 USB 3 XHCI flashing It works fine for me on my Raspberry Pi 4 Model B. Was able … [View More]

1 0

[XL] Change in flashrom[master]: Add support for VIA VL805 USB 3 XHCI flashing
by ChrisEric1 CECL (Code Review) 13 Feb '23

13 Feb '23

Attention is currently required from: Thomas Heijligen, Nicholas Chin. Hello build bot (Jenkins), Thomas Heijligen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72057 to look at the new patch set (#4). Change subject: Add support for VIA VL805 USB 3 XHCI flashing ...................................................................... Add support for VIA VL805 USB 3 XHCI flashing It works fine for me on my Raspberry Pi 4 Model B. Was able … [View More]

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