- flashrom-gerrit - mail.coreboot.org

[L] Change in flashrom[master]: tree: Ready a new driver registeration framework PoC
by Edward O'Callaghan (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Arthur Heymans, Anastasia Klimchuk, Nikolai Artemiev, Peter Marheine. Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/72781 ) Change subject: tree: Ready a new driver registeration framework PoC ...................................................................... tree: Ready a new driver registeration framework PoC TEST=``` quasisec@quasisec-v9:~/src/flashrom$ sudo ./flashrom -p internal --flash-name flashrom v1.2-1183-g2e6dda10 on Linux 5.19.11-1rodete1-amd64 (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). alloc_flashrom_programmer: allocating a driver registration structure. No DMI table found. Found chipset "Intel Tiger Lake U Premium". Enabling flash write... Warning: BIOS region SMM protection is enabled! Warning: Setting BIOS Control at 0xdc from 0xaa to 0x89 failed. New value is 0xaa. SPI Configuration is locked down. FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only. FREG1: BIOS region (0x01000000-0x01ffffff) is read-write. FREG2: Management Engine region (0x00001000-0x00f7ffff) is read-only. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see https://flashrom.org/ME for details. PR0: Warning: 0x0133e000-0x01ffffff is read-only. At least some flash regions are write protected. For write operations, you should use a flash layout and include only writable regions. See manpage for more details. Enabling hardware sequencing because some important opcode is locked. register_driver: hooking driver (internal). register_drv: registered (1) drivers. PROBLEMS, continuing anyway ======================================================================== You may be running flashrom on an unknown laptop. We could not detect this for sure because your vendor has not set up the SMBIOS tables correctly. Some internal buses have been disabled for safety reasons. You can enforce using all buses by adding -p internal:laptop=this_is_not_a_laptop to the command line, but please read the following warning if you are not sure. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and https://flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. ``` Change-Id: I0788399d9754cfb4fd83387bd5645e3feafcaece Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M atahpt.c M atapromise.c M atavia.c M buspirate_spi.c M ch341a_spi.c M chipset_enable.c M cli_classic.c M dediprog.c M developerbox_spi.c M digilent_spi.c M dirtyjtag_spi.c M drkaiser.c M dummyflasher.c M flashrom.c M ft2232_spi.c M gfxnvidia.c M ichspi.c M include/programmer.h M internal.c M it8212.c M it87spi.c M jlink_spi.c M linux_mtd.c M linux_spi.c M mediatek_i2c_spi.c M mstarddc_spi.c M ni845x_spi.c M nic3com.c M nicintel.c M nicintel_eeprom.c M nicintel_spi.c M nicnatsemi.c M nicrealtek.c M ogp_spi.c M opaque.c M parade_lspcon.c M pcidev.c M pickit2_spi.c M pony_spi.c M programmer.c M raiden_debug_spi.c M rayer_spi.c M realtek_mst_i2c_spi.c M satamv.c M satasii.c M sb600spi.c M serprog.c M stlinkv3_spi.c M tests/tests.c M usbblaster_spi.c 50 files changed, 324 insertions(+), 202 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/81/72781/1 diff --git a/atahpt.c b/atahpt.c index 71fd4d5..990338f 100644 --- a/atahpt.c +++ b/atahpt.c @@ -78,7 +78,7 @@ .shutdown = atahpt_shutdown, }; -static int atahpt_init(const struct programmer_cfg *cfg) +static int atahpt_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; uint32_t io_base_addr; @@ -86,7 +86,7 @@ if (rget_io_perms()) return 1; - dev = pcidev_init(cfg, ata_hpt, PCI_BASE_ADDRESS_4); + dev = pcidev_init(flashprog, cfg, ata_hpt, PCI_BASE_ADDRESS_4); if (!dev) return 1; diff --git a/atapromise.c b/atapromise.c index 9beebf1..5218f62 100644 --- a/atapromise.c +++ b/atapromise.c @@ -117,7 +117,7 @@ .shutdown = atapromise_shutdown, }; -static int atapromise_init(const struct programmer_cfg *cfg) +static int atapromise_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; uint32_t io_base_addr; @@ -128,7 +128,7 @@ if (rget_io_perms()) return 1; - dev = pcidev_init(cfg, ata_promise, PCI_BASE_ADDRESS_4); + dev = pcidev_init(flashprog, cfg, ata_promise, PCI_BASE_ADDRESS_4); if (!dev) return 1; diff --git a/atavia.c b/atavia.c index f35771a..460f1a1 100644 --- a/atavia.c +++ b/atavia.c @@ -138,7 +138,7 @@ .chip_writeb = atavia_chip_writeb, }; -static int atavia_init(const struct programmer_cfg *cfg) +static int atavia_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { char *arg = extract_programmer_param_str(cfg, "offset"); if (arg) { @@ -158,7 +158,7 @@ } free(arg); - dev = pcidev_init(cfg, ata_via, PCI_ROM_ADDRESS); /* Actually no BAR setup needed at all. */ + dev = pcidev_init(flashprog, cfg, ata_via, PCI_ROM_ADDRESS); /* Actually no BAR setup needed at all. */ if (!dev) return 1; diff --git a/buspirate_spi.c b/buspirate_spi.c index a40fb70..68cea11 100644 --- a/buspirate_spi.c +++ b/buspirate_spi.c @@ -314,7 +314,7 @@ */ #define BP_DIVISOR(baud) ((4000000/(baud)) - 1) -static int buspirate_spi_init(const struct programmer_cfg *cfg) +static int buspirate_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { char *tmp; char *dev; diff --git a/ch341a_spi.c b/ch341a_spi.c index 75eaf86..c2b3943 100644 --- a/ch341a_spi.c +++ b/ch341a_spi.c @@ -421,7 +421,7 @@ .delay = ch341a_spi_delay, }; -static int ch341a_spi_init(const struct programmer_cfg *cfg) +static int ch341a_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { if (handle != NULL) { msg_cerr("%s: handle already set! Please report a bug at flashrom(a)flashrom.org\n", __func__); diff --git a/chipset_enable.c b/chipset_enable.c index 480113a..f7e0916 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -44,7 +44,7 @@ #include "hwaccess_x86_io.h" #include "hwaccess_x86_msr.h" -static int enable_flash_ali_m1533(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_ali_m1533(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t tmp; @@ -59,7 +59,7 @@ return 0; } -static int enable_flash_rdc_r8610(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_rdc_r8610(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t tmp; @@ -85,7 +85,7 @@ return 0; } -static int enable_flash_sis85c496(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_sis85c496(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t tmp; @@ -96,7 +96,7 @@ return 0; } -static int enable_flash_sis_mapping(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_sis_mapping(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { #define SIS_MAPREG 0x40 uint8_t new, newer; @@ -135,7 +135,7 @@ return sbdev; } -static int enable_flash_sis501(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_sis501(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t tmp; int ret = 0; @@ -145,7 +145,7 @@ if (!sbdev) return -1; - ret = enable_flash_sis_mapping(cfg, sbdev, name); + ret = enable_flash_sis_mapping(flashprog, cfg, sbdev, name); tmp = sio_read(0x22, 0x80); tmp &= (~0x20); @@ -160,7 +160,7 @@ return ret; } -static int enable_flash_sis5511(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_sis5511(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t tmp; int ret = 0; @@ -170,7 +170,7 @@ if (!sbdev) return -1; - ret = enable_flash_sis_mapping(cfg, sbdev, name); + ret = enable_flash_sis_mapping(flashprog, cfg, sbdev, name); tmp = sio_read(0x22, 0x50); tmp &= (~0x20); @@ -180,7 +180,7 @@ return ret; } -static int enable_flash_sis5x0(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name, uint8_t dis_mask, uint8_t en_mask) +static int enable_flash_sis5x0(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name, uint8_t dis_mask, uint8_t en_mask) { #define SIS_REG 0x45 uint8_t new, newer; @@ -191,7 +191,7 @@ if (!sbdev) return -1; - ret = enable_flash_sis_mapping(cfg, sbdev, name); + ret = enable_flash_sis_mapping(flashprog, cfg, sbdev, name); new = pci_read_byte(sbdev, SIS_REG); new &= (~dis_mask); @@ -207,14 +207,14 @@ return ret; } -static int enable_flash_sis530(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_sis530(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_sis5x0(cfg, dev, name, 0x20, 0x04); + return enable_flash_sis5x0(flashprog, cfg, dev, name, 0x20, 0x04); } -static int enable_flash_sis540(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_sis540(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_sis5x0(cfg, dev, name, 0x80, 0x40); + return enable_flash_sis5x0(flashprog, cfg, dev, name, 0x80, 0x40); } /* Datasheet: @@ -223,7 +223,7 @@ * - PDF: http://www.intel.com/design/intarch/datashts/29056201.pdf * - Order Number: 290562-001 */ -static int enable_flash_piix4(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_piix4(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint16_t old, new; uint16_t xbcs = 0x4e; /* X-Bus Chip Select register. */ @@ -380,7 +380,7 @@ return enable_flash_ich_bios_cntl_common(ich_generation, addr, NULL, 0); } -static int enable_flash_ich_fwh_decode(const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation) +static int enable_flash_ich_fwh_decode(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation) { uint8_t fwh_sel1 = 0, fwh_sel2 = 0, fwh_dec_en_lo = 0, fwh_dec_en_hi = 0; /* silence compilers */ bool implemented = 0; @@ -555,36 +555,36 @@ return 0; } -static int enable_flash_ich_fwh(const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) +static int enable_flash_ich_fwh(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) { int err; /* Configure FWH IDSEL decoder maps. */ - if ((err = enable_flash_ich_fwh_decode(cfg, dev, ich_generation)) != 0) + if ((err = enable_flash_ich_fwh_decode(flashprog, cfg, dev, ich_generation)) != 0) return err; internal_buses_supported &= BUS_FWH; return enable_flash_ich_bios_cntl_config_space(dev, ich_generation, bios_cntl); } -static int enable_flash_ich0(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_ich0(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_fwh(cfg, dev, CHIPSET_ICH, 0x4e); + return enable_flash_ich_fwh(flashprog, cfg, dev, CHIPSET_ICH, 0x4e); } -static int enable_flash_ich2345(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_ich2345(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_fwh(cfg, dev, CHIPSET_ICH2345, 0x4e); + return enable_flash_ich_fwh(flashprog, cfg, dev, CHIPSET_ICH2345, 0x4e); } -static int enable_flash_ich6(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_ich6(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_fwh(cfg, dev, CHIPSET_ICH6, 0xdc); + return enable_flash_ich_fwh(flashprog, cfg, dev, CHIPSET_ICH6, 0xdc); } -static int enable_flash_poulsbo(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_poulsbo(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_fwh(cfg, dev, CHIPSET_POULSBO, 0xd8); + return enable_flash_ich_fwh(flashprog, cfg, dev, CHIPSET_POULSBO, 0xd8); } static enum chipbustype enable_flash_ich_report_gcs( @@ -770,7 +770,7 @@ return boot_straps[bbs].bus; } -static int enable_flash_ich_spi(const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) +static int enable_flash_ich_spi(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl) { /* Get physical address of Root Complex Register Block */ uint32_t rcra = pci_read_long(dev, 0xf0) & 0xffffc000; @@ -784,7 +784,7 @@ const enum chipbustype boot_buses = enable_flash_ich_report_gcs(dev, ich_generation, rcrb); /* Handle FWH-related parameters and initialization */ - int ret_fwh = enable_flash_ich_fwh(cfg, dev, ich_generation, bios_cntl); + int ret_fwh = enable_flash_ich_fwh(flashprog, cfg, dev, ich_generation, bios_cntl); if (ret_fwh == ERROR_FLASHROM_FATAL) return ret_fwh; @@ -817,7 +817,7 @@ void *spibar = rcrb + spibar_offset; /* This adds BUS_SPI */ - int ret_spi = ich_init_spi(cfg, spibar, ich_generation); + int ret_spi = ich_init_spi(flashprog, cfg, spibar, ich_generation); if (ret_spi == ERROR_FLASHROM_FATAL) return ret_spi; @@ -831,82 +831,82 @@ return 0; } -static int enable_flash_tunnelcreek(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_tunnelcreek(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_TUNNEL_CREEK, 0xd8); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_TUNNEL_CREEK, 0xd8); } -static int enable_flash_s12x0(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_s12x0(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_CENTERTON, 0xd8); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_CENTERTON, 0xd8); } -static int enable_flash_ich7(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_ich7(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_ICH7, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_ICH7, 0xdc); } -static int enable_flash_ich8(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_ich8(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_ICH8, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_ICH8, 0xdc); } -static int enable_flash_ich9(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_ich9(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_ICH9, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_ICH9, 0xdc); } -static int enable_flash_ich10(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_ich10(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_ICH10, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_ICH10, 0xdc); } /* Ibex Peak aka. 5 series & 3400 series */ -static int enable_flash_pch5(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_pch5(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_5_SERIES_IBEX_PEAK, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_5_SERIES_IBEX_PEAK, 0xdc); } /* Cougar Point aka. 6 series & c200 series */ -static int enable_flash_pch6(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_pch6(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_6_SERIES_COUGAR_POINT, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_6_SERIES_COUGAR_POINT, 0xdc); } /* Panther Point aka. 7 series */ -static int enable_flash_pch7(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_pch7(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_7_SERIES_PANTHER_POINT, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_7_SERIES_PANTHER_POINT, 0xdc); } /* Lynx Point aka. 8 series */ -static int enable_flash_pch8(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_pch8(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_8_SERIES_LYNX_POINT, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_8_SERIES_LYNX_POINT, 0xdc); } /* Lynx Point LP aka. 8 series low-power */ -static int enable_flash_pch8_lp(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_pch8_lp(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_8_SERIES_LYNX_POINT_LP, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_8_SERIES_LYNX_POINT_LP, 0xdc); } /* Wellsburg (for Haswell-EP Xeons) */ -static int enable_flash_pch8_wb(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_pch8_wb(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_8_SERIES_WELLSBURG, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_8_SERIES_WELLSBURG, 0xdc); } /* Wildcat Point */ -static int enable_flash_pch9(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_pch9(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_9_SERIES_WILDCAT_POINT, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_9_SERIES_WILDCAT_POINT, 0xdc); } /* Wildcat Point LP */ -static int enable_flash_pch9_lp(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_pch9_lp(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { - return enable_flash_ich_spi(cfg, dev, CHIPSET_9_SERIES_WILDCAT_POINT_LP, 0xdc); + return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_9_SERIES_WILDCAT_POINT_LP, 0xdc); } /* Sunrise Point */ @@ -916,7 +916,7 @@ return 0; } -static int enable_flash_pch100_or_c620(const struct programmer_cfg *cfg, +static int enable_flash_pch100_or_c620(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name, const int slot, const int func, const enum ich_chipset pch_generation) { @@ -961,7 +961,7 @@ msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " (phys = 0x%08x)\n", PRIxPTR_WIDTH, (uintptr_t)spibar, phys_spibar); /* This adds BUS_SPI */ - const int ret_spi = ich_init_spi(cfg, spibar, pch_generation); + const int ret_spi = ich_init_spi(flashprog, cfg, spibar, pch_generation); if (ret_spi != ERROR_FLASHROM_FATAL) { if (ret_bc || ret_spi) ret = ERROR_FLASHROM_NONFATAL; @@ -979,59 +979,59 @@ return ret; } -static int enable_flash_pch100(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) +static int enable_flash_pch100(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_100_SERIES_SUNRISE_POINT); + return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_100_SERIES_SUNRISE_POINT); } -static int enable_flash_c620(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) +static int enable_flash_c620(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_C620_SERIES_LEWISBURG); + return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_C620_SERIES_LEWISBURG); } -static int enable_flash_pch300(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) +static int enable_flash_pch300(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_300_SERIES_CANNON_POINT); + return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_300_SERIES_CANNON_POINT); } -static int enable_flash_pch400(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) +static int enable_flash_pch400(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_400_SERIES_COMET_POINT); + return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_400_SERIES_COMET_POINT); } -static int enable_flash_pch500(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) +static int enable_flash_pch500(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_500_SERIES_TIGER_POINT); + return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_500_SERIES_TIGER_POINT); } -static int enable_flash_pch600(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) +static int enable_flash_pch600(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_600_SERIES_ALDER_POINT); + return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_600_SERIES_ALDER_POINT); } -static int enable_flash_mtl(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) +static int enable_flash_mtl(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_METEOR_LAKE); + return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_METEOR_LAKE); } -static int enable_flash_mcc(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) +static int enable_flash_mcc(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_ELKHART_LAKE); + return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_ELKHART_LAKE); } -static int enable_flash_jsl(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) +static int enable_flash_jsl(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_JASPER_LAKE); + return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_JASPER_LAKE); } -static int enable_flash_apl(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) +static int enable_flash_apl(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(cfg, dev, name, 0x0d, 2, CHIPSET_APOLLO_LAKE); + return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x0d, 2, CHIPSET_APOLLO_LAKE); } -static int enable_flash_glk(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) +static int enable_flash_glk(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(cfg, dev, name, 0x0d, 2, CHIPSET_GEMINI_LAKE); + return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x0d, 2, CHIPSET_GEMINI_LAKE); } /* Silvermont architecture: Bay Trail(-T/-I), Avoton/Rangeley. @@ -1044,7 +1044,7 @@ * - SPIBAR (coined SBASE) at LPC config 0x54 (instead of [RCRB] + 0x3800). * - BIOS_CNTL (coined BCR) at [SPIBAR] + 0xFC (instead of LPC config 0xDC). */ -static int enable_flash_silvermont(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_silvermont(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { enum ich_chipset ich_generation = CHIPSET_BAYTRAIL; @@ -1060,7 +1060,7 @@ physunmap(rcrb, 4); /* Handle fwh_idsel parameter */ - int ret_fwh = enable_flash_ich_fwh_decode(cfg, dev, ich_generation); + int ret_fwh = enable_flash_ich_fwh_decode(flashprog, cfg, dev, ich_generation); if (ret_fwh == ERROR_FLASHROM_FATAL) return ret_fwh; @@ -1078,7 +1078,7 @@ */ enable_flash_ich_bios_cntl_memmapped(ich_generation, spibar + 0xFC); - int ret_spi = ich_init_spi(cfg, spibar, ich_generation); + int ret_spi = ich_init_spi(flashprog, cfg, spibar, ich_generation); if (ret_spi == ERROR_FLASHROM_FATAL) return ret_spi; @@ -1092,7 +1092,7 @@ return 0; } -static int via_no_byte_merge(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int via_no_byte_merge(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t val; @@ -1105,7 +1105,7 @@ return NOT_DONE_YET; /* need to find south bridge, too */ } -static int enable_flash_vt823x(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_vt823x(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t val; @@ -1132,7 +1132,7 @@ return 0; } -static int enable_flash_vt_vx(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_vt_vx(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { struct pci_dev *south_north = pcidev_find(0x1106, 0xa353); if (south_north == NULL) { @@ -1143,7 +1143,7 @@ msg_pdbg("Strapped to "); if ((pci_read_byte(south_north, 0x56) & 0x01) == 0) { msg_pdbg("LPC.\n"); - return enable_flash_vt823x(cfg, dev, name); + return enable_flash_vt823x(flashprog, cfg, dev, name); } msg_pdbg("SPI.\n"); @@ -1196,12 +1196,12 @@ return via_init_spi(spi0_mm_base); } -static int enable_flash_vt8237s_spi(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_vt8237s_spi(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { return via_init_spi(pci_read_long(dev, 0xbc) << 8); } -static int enable_flash_cs5530(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_cs5530(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t reg8; @@ -1265,7 +1265,7 @@ * To enable write to NOR Boot flash for the benefit of systems that have such * a setup, raise MSR 0x51400018 WE_CS3 (write enable Boot Flash Chip Select). */ -static int enable_flash_cs5536(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_cs5536(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { #define MSR_RCONF_DEFAULT 0x1808 #define MSR_NORF_CTL 0x51400018 @@ -1294,7 +1294,7 @@ return 0; } -static int enable_flash_sc1100(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_sc1100(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { #define SC_REG 0x52 uint8_t new; @@ -1319,7 +1319,7 @@ * 6 FFB0_0000h–FFBF_FFFFh <- FFF80000h-FFFDFFFFh <- <- * 5 00E8... <- <- FFF00000h-FFF7FFFFh <- */ -static int enable_flash_amd_via(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name, uint8_t decode_val) +static int enable_flash_amd_via(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name, uint8_t decode_val) { #define AMD_MAPREG 0x43 #define AMD_ENREG 0x40 @@ -1353,29 +1353,29 @@ return 0; } -static int enable_flash_amd_768_8111(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_amd_768_8111(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { /* Enable decoding of 0xFFB00000 to 0xFFFFFFFF (5 MB). */ max_rom_decode.lpc = 5 * 1024 * 1024; - return enable_flash_amd_via(cfg, dev, name, 0xC0); + return enable_flash_amd_via(flashprog, cfg, dev, name, 0xC0); } -static int enable_flash_vt82c586(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_vt82c586(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { /* Enable decoding of 0xFFF80000 to 0xFFFFFFFF. (512 kB) */ max_rom_decode.parallel = 512 * 1024; - return enable_flash_amd_via(cfg, dev, name, 0xC0); + return enable_flash_amd_via(flashprog, cfg, dev, name, 0xC0); } /* Works for VT82C686A/B too. */ -static int enable_flash_vt82c596(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_vt82c596(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { /* Enable decoding of 0xFFF00000 to 0xFFFFFFFF. (1 MB) */ max_rom_decode.parallel = 1024 * 1024; - return enable_flash_amd_via(cfg, dev, name, 0xE0); + return enable_flash_amd_via(flashprog, cfg, dev, name, 0xE0); } -static int enable_flash_sb600(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_sb600(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint32_t prot; uint8_t reg; @@ -1408,7 +1408,7 @@ internal_buses_supported &= BUS_LPC | BUS_FWH; - ret = sb600_probe_spi(cfg, dev); + ret = sb600_probe_spi(flashprog, cfg, dev); /* Read ROM strap override register. */ OUTB(0x8f, 0xcd6); @@ -1449,7 +1449,7 @@ } /* sets bit 0 in 0x6d */ -static int enable_flash_nvidia_common(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_nvidia_common(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t old, new; @@ -1466,16 +1466,16 @@ return 0; } -static int enable_flash_nvidia_nforce2(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_nvidia_nforce2(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { rpci_write_byte(dev, 0x92, 0); - if (enable_flash_nvidia_common(cfg, dev, name)) + if (enable_flash_nvidia_common(flashprog, cfg, dev, name)) return ERROR_FLASHROM_NONFATAL; else return 0; } -static int enable_flash_ck804(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_ck804(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint32_t segctrl; uint8_t reg, old, new; @@ -1541,7 +1541,7 @@ } } - if (enable_flash_nvidia_common(cfg, dev, name)) + if (enable_flash_nvidia_common(flashprog, cfg, dev, name)) err++; if (err > 0) @@ -1550,7 +1550,7 @@ return 0; } -static int enable_flash_osb4(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_osb4(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t tmp; @@ -1568,7 +1568,7 @@ } /* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */ -static int enable_flash_sb400(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_sb400(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t tmp; struct pci_dev *smbusdev; @@ -1603,7 +1603,7 @@ return 0; } -static int enable_flash_mcp55(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_mcp55(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t val; uint16_t wordval; @@ -1619,7 +1619,7 @@ wordval |= 0x7fff; /* 16M */ rpci_write_word(dev, 0x90, wordval); - if (enable_flash_nvidia_common(cfg, dev, name)) + if (enable_flash_nvidia_common(flashprog, cfg, dev, name)) return ERROR_FLASHROM_NONFATAL; else return 0; @@ -1630,7 +1630,7 @@ * It is assumed that LPC chips need the MCP55 code and SPI chips need the * code provided in enable_flash_mcp6x_7x_common. */ -static int enable_flash_mcp6x_7x(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_mcp6x_7x(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { int ret = 0, want_spi = 0; uint8_t val; @@ -1642,7 +1642,7 @@ switch ((val >> 5) & 0x3) { case 0x0: - ret = enable_flash_mcp55(cfg, dev, name); + ret = enable_flash_mcp55(flashprog, cfg, dev, name); internal_buses_supported &= BUS_LPC; msg_pdbg("Flash bus type is LPC\n"); break; @@ -1681,7 +1681,7 @@ return ret; } -static int enable_flash_ht1000(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int enable_flash_ht1000(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { uint8_t val; @@ -1704,7 +1704,7 @@ * complete flash is mapped somewhere below 1G. The position can be determined * by the BOOTCS PAR register. */ -static int get_flashbase_sc520(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) +static int get_flashbase_sc520(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name) { int i, bootcs_found = 0; uint32_t parx = 0; @@ -2184,7 +2184,7 @@ {0}, }; -int chipset_flash_enable(const struct programmer_cfg *cfg) +int chipset_flash_enable(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; int ret = -2; /* Nothing! */ @@ -2233,7 +2233,7 @@ continue; } msg_pinfo("Enabling flash write... "); - ret = chipset_enables[i].doit(cfg, dev, chipset_enables[i].device_name); + ret = chipset_enables[i].doit(flashprog, cfg, dev, chipset_enables[i].device_name); if (ret == NOT_DONE_YET) { ret = -2; msg_pinfo("OK - searching further chips.\n"); diff --git a/cli_classic.c b/cli_classic.c index c72836f..5dd5978 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -973,7 +973,8 @@ } } - if (programmer_init(prog, pparam)) { + struct flashrom_programmer *flashprog; + if (programmer_init(&flashprog, prog, pparam)) { msg_perr("Error: Programmer initialization failed.\n"); ret = 1; goto out_shutdown; diff --git a/dediprog.c b/dediprog.c index 723f4a8..51529e9 100644 --- a/dediprog.c +++ b/dediprog.c @@ -1076,7 +1076,7 @@ return 0; } -static int dediprog_init(const struct programmer_cfg *cfg) +static int dediprog_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { char *param_str; int spispeed_idx = 1; diff --git a/developerbox_spi.c b/developerbox_spi.c index 64b7e8a..0729117 100644 --- a/developerbox_spi.c +++ b/developerbox_spi.c @@ -142,7 +142,7 @@ return 0; } -static int developerbox_spi_init(const struct programmer_cfg *cfg) +static int developerbox_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct libusb_context *usb_ctx; libusb_device_handle *cp210x_handle; diff --git a/digilent_spi.c b/digilent_spi.c index 55cb6ec..4545d1c 100644 --- a/digilent_spi.c +++ b/digilent_spi.c @@ -373,7 +373,7 @@ { NULL, 0 }, }; -static int digilent_spi_init(const struct programmer_cfg *cfg) +static int digilent_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { char *param_str; uint32_t speed_hz = spispeeds[0].speed; diff --git a/dirtyjtag_spi.c b/dirtyjtag_spi.c index 42169ed..e822217 100644 --- a/dirtyjtag_spi.c +++ b/dirtyjtag_spi.c @@ -201,7 +201,7 @@ .probe_opcode = default_spi_probe_opcode, }; -static int dirtyjtag_spi_init(const struct programmer_cfg *cfg) +static int dirtyjtag_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct libusb_device_handle *handle = NULL; struct dirtyjtag_spi_data *djtag_data = NULL; diff --git a/drkaiser.c b/drkaiser.c index ebf5119..28684d2 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -75,13 +75,13 @@ .shutdown = drkaiser_shutdown, }; -static int drkaiser_init(const struct programmer_cfg *cfg) +static int drkaiser_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; uint32_t addr; uint8_t *bar; - dev = pcidev_init(cfg, drkaiser_pcidev, PCI_BASE_ADDRESS_2); + dev = pcidev_init(flashprog, cfg, drkaiser_pcidev, PCI_BASE_ADDRESS_2); if (!dev) return 1; diff --git a/dummyflasher.c b/dummyflasher.c index 2bdd10c..8e97e4a 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -1350,7 +1350,7 @@ return 0; } -static int dummy_init(const struct programmer_cfg *cfg) +static int dummy_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { int ret = 0; struct stat image_stat; @@ -1418,7 +1418,7 @@ } if (dummy_buses_supported & BUS_PROG) - ret |= register_opaque_master(&opaque_master_dummyflasher, data); + ret |= register_opaque_master(flashprog, &opaque_master_dummyflasher, data); if (dummy_buses_supported & BUS_NONSPI) ret |= register_par_master(&par_master_dummyflasher, dummy_buses_supported & BUS_NONSPI, diff --git a/flashrom.c b/flashrom.c index a0754e6..ccd7d3f 100644 --- a/flashrom.c +++ b/flashrom.c @@ -126,10 +126,15 @@ { int ret; - if (prog == NULL) { + if (prog == NULL || flashprog == NULL) { msg_perr("Invalid programmer specified!\n"); return -1; } + *flashprog = alloc_flashrom_programmer(prog->name); + if (*flashprog == NULL) { + msg_perr("Could not allocate programmer!\n"); + return -1; + } programmer = prog; /* Initialize all programmer specific data. */ /* Default to unlimited decode sizes. */ @@ -159,7 +164,7 @@ } msg_pdbg("Initializing %s programmer\n", prog->name); - ret = prog->init(&cfg); + ret = prog->init(*flashprog, &cfg); if (cfg.params && strlen(cfg.params)) { if (ret != 0) { /* It is quite possible that any unhandled programmer parameter would have been valid, diff --git a/ft2232_spi.c b/ft2232_spi.c index dfec1a0..685963d 100644 --- a/ft2232_spi.c +++ b/ft2232_spi.c @@ -304,7 +304,7 @@ }; /* Returns 0 upon success, a negative number upon errors. */ -static int ft2232_spi_init(const struct programmer_cfg *cfg) +static int ft2232_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { int ret = 0; unsigned char buf[512]; diff --git a/gfxnvidia.c b/gfxnvidia.c index b420975..8ea76cc 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -100,13 +100,13 @@ .shutdown = gfxnvidia_shutdown, }; -static int gfxnvidia_init(const struct programmer_cfg *cfg) +static int gfxnvidia_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; uint32_t reg32; uint8_t *bar; - dev = pcidev_init(cfg, gfx_nvidia, PCI_BASE_ADDRESS_0); + dev = pcidev_init(flashprog, cfg, gfx_nvidia, PCI_BASE_ADDRESS_0); if (!dev) return 1; diff --git a/ichspi.c b/ichspi.c index 1522d2b..877064a 100644 --- a/ichspi.c +++ b/ichspi.c @@ -2104,7 +2104,7 @@ } } -static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen) +static int init_ich_default(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen) { unsigned int i; uint16_t tmp2; @@ -2348,7 +2348,7 @@ if (!opaque_hwseq_data) return ERROR_FLASHROM_FATAL; memcpy(opaque_hwseq_data, &hwseq_data, sizeof(*opaque_hwseq_data)); - register_opaque_master(&opaque_master_ich_hwseq, opaque_hwseq_data); + register_opaque_master(flashprog, &opaque_master_ich_hwseq, opaque_hwseq_data); } else { register_spi_master(&spi_master_ich9, NULL); } @@ -2356,7 +2356,7 @@ return 0; } -int ich_init_spi(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen) +int ich_init_spi(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen) { ich_generation = ich_gen; ich_spibar = spibar; @@ -2368,7 +2368,7 @@ return init_ich7_spi(spibar, ich_gen); case CHIPSET_ICH8: default: /* Future version might behave the same */ - return init_ich_default(cfg, spibar, ich_gen); + return init_ich_default(flashprog, cfg, spibar, ich_gen); } } diff --git a/include/programmer.h b/include/programmer.h index 233a6fe..eb8eae9 100644 --- a/include/programmer.h +++ b/include/programmer.h @@ -48,7 +48,7 @@ const char *const note; } devs; - int (*init) (const struct programmer_cfg *cfg); + int (*init) (struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg); }; extern const struct programmer_entry *const programmer_table[]; @@ -121,7 +121,7 @@ extern struct pci_access *pacc; int pci_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); -struct pci_dev *pcidev_init(const struct programmer_cfg *cfg, const struct dev_entry *devs, int bar); +struct pci_dev *pcidev_init(struct flashrom_programmer *, const struct programmer_cfg *cfg, const struct dev_entry *devs, int bar); struct pci_dev *pcidev_scandev(struct pci_filter *filter, struct pci_dev *start); struct pci_dev *pcidev_getdevfn(struct pci_dev *dev, const int func); struct pci_dev *pcidev_find_vendorclass(uint16_t vendor, uint16_t devclass); @@ -147,7 +147,7 @@ const enum test_state status; const char *vendor_name; const char *device_name; - int (*doit) (const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name); + int (*doit) (struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name); }; extern const struct penable chipset_enables[]; @@ -229,7 +229,7 @@ int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model, bool force_boardenable); /* chipset_enable.c */ -int chipset_flash_enable(const struct programmer_cfg *cfg); +int chipset_flash_enable(struct flashrom_programmer *, const struct programmer_cfg *cfg); /* processor_enable.c */ int processor_flash_enable(void); @@ -362,7 +362,7 @@ /* ichspi.c */ #if CONFIG_INTERNAL == 1 -int ich_init_spi(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_generation); +int ich_init_spi(struct flashrom_programmer *, const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_generation); int via_init_spi(uint32_t mmio_base); /* amd_imc.c */ @@ -372,13 +372,13 @@ void enter_conf_mode_ite(uint16_t port); void exit_conf_mode_ite(uint16_t port); void probe_superio_ite(void); -int init_superio_ite(const struct programmer_cfg *cfg); +int init_superio_ite(struct flashrom_programmer *, const struct programmer_cfg *cfg); /* trivial wrapper to avoid cluttering internal_init() with #if */ -static inline int try_mtd(const struct programmer_cfg *cfg) +static inline int try_mtd(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { #if CONFIG_LINUX_MTD == 1 - return programmer_linux_mtd.init(cfg); + return programmer_linux_mtd.init(flashprog, cfg); #else return 1; #endif @@ -390,7 +390,7 @@ /* sb600spi.c */ -int sb600_probe_spi(const struct programmer_cfg *cfg, struct pci_dev *dev); +int sb600_probe_spi(struct flashrom_programmer *, const struct programmer_cfg *cfg, struct pci_dev *dev); /* wbsio_spi.c */ int wbsio_check_for_spi(void); @@ -421,7 +421,8 @@ void (*delay) (const struct flashctx *flash, unsigned int usecs); void *data; }; -int register_opaque_master(const struct opaque_master *mst, void *data); +int register_opaque_master(struct flashrom_programmer *flashprog, + const struct opaque_master *mst, void *data); /* parallel.c */ struct par_master { @@ -453,7 +454,8 @@ extern struct registered_master registered_masters[]; extern int registered_master_count; int register_master(const struct registered_master *mst); - +struct flashrom_programmer *alloc_flashrom_programmer(const char *name); +int register_driver(struct flashrom_programmer *flashprog, const struct registered_master *mst); /* serial.c */ diff --git a/internal.c b/internal.c index c5fdb74..4dd8559 100644 --- a/internal.c +++ b/internal.c @@ -162,7 +162,7 @@ return 0; } -static int internal_init(const struct programmer_cfg *cfg) +static int internal_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { int ret = 0; bool force_laptop; @@ -191,7 +191,7 @@ */ internal_buses_supported = BUS_NONSPI; - if (try_mtd(cfg) == 0) { + if (try_mtd(flashprog, cfg) == 0) { ret = 0; goto internal_init_exit; } @@ -259,7 +259,7 @@ /* try to enable it. Failure IS an option, since not all motherboards * really need this to be done, etc., etc. */ - ret = chipset_flash_enable(cfg); + ret = chipset_flash_enable(flashprog, cfg); if (ret == -2) { msg_perr("WARNING: No chipset found. Flash detection " "will most likely fail.\n"); @@ -270,7 +270,7 @@ #if defined(__i386__) || defined(__x86_64__) /* Probe unconditionally for ITE Super I/O chips. This enables LPC->SPI translation on IT87* and * parallel writes on IT8705F. Also, this handles the manual chip select for Gigabyte's DualBIOS. */ - init_superio_ite(cfg); + init_superio_ite(flashprog, cfg); if (board_flash_enable(board_vendor, board_model, cb_vendor, cb_model, force_boardenable)) { msg_perr("Aborting to be safe.\n"); diff --git a/it8212.c b/it8212.c index 3c1161d..00688b6 100644 --- a/it8212.c +++ b/it8212.c @@ -68,11 +68,11 @@ .shutdown = it8212_shutdown, }; -static int it8212_init(const struct programmer_cfg *cfg) +static int it8212_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { uint8_t *bar; - struct pci_dev *dev = pcidev_init(cfg, devs_it8212, PCI_ROM_ADDRESS); + struct pci_dev *dev = pcidev_init(flashprog, cfg, devs_it8212, PCI_ROM_ADDRESS); if (!dev) return 1; diff --git a/it87spi.c b/it87spi.c index 34dbea0..38b03da 100644 --- a/it87spi.c +++ b/it87spi.c @@ -324,7 +324,7 @@ .probe_opcode = default_spi_probe_opcode, }; -static uint16_t it87spi_probe(const struct programmer_cfg *cfg, uint16_t port) +static uint16_t it87spi_probe(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, uint16_t port) { uint8_t tmp = 0; uint16_t flashport = 0; @@ -443,7 +443,7 @@ return register_spi_master(&spi_master_it87xx, data); } -int init_superio_ite(const struct programmer_cfg *cfg) +int init_superio_ite(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { int i; int ret = 0; @@ -461,7 +461,7 @@ case 0x8718: case 0x8720: case 0x8728: - ret |= it87spi_probe(cfg, superios[i].port); + ret |= it87spi_probe(flashprog, cfg, superios[i].port); break; default: msg_pdbg2("Super I/O ID 0x%04hx is not on the list of flash-capable controllers.\n", diff --git a/jlink_spi.c b/jlink_spi.c index ad2ca78..86bdb6a 100644 --- a/jlink_spi.c +++ b/jlink_spi.c @@ -192,7 +192,7 @@ .probe_opcode = default_spi_probe_opcode, }; -static int jlink_spi_init(const struct programmer_cfg *cfg) +static int jlink_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { char *arg; unsigned long speed = 0; diff --git a/linux_mtd.c b/linux_mtd.c index 495db9a..4d79114 100644 --- a/linux_mtd.c +++ b/linux_mtd.c @@ -494,7 +494,7 @@ return ret; } -static int linux_mtd_init(const struct programmer_cfg *cfg) +static int linux_mtd_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { char *param_str; int dev_num = 0; @@ -545,7 +545,7 @@ return 1; } - return register_opaque_master(&linux_mtd_opaque_master, data); + return register_opaque_master(flashprog, &linux_mtd_opaque_master, data); linux_mtd_init_exit: free(param_str); diff --git a/linux_spi.c b/linux_spi.c index d65b3e8..40f2532 100644 --- a/linux_spi.c +++ b/linux_spi.c @@ -164,7 +164,7 @@ return result; } -static int linux_spi_init(const struct programmer_cfg *cfg) +static int linux_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { char *param_str, *endp; uint32_t speed_hz = 2 * 1000 * 1000; diff --git a/mediatek_i2c_spi.c b/mediatek_i2c_spi.c index c15df05..5f1321b 100644 --- a/mediatek_i2c_spi.c +++ b/mediatek_i2c_spi.c @@ -483,7 +483,7 @@ return ret; } -static int mediatek_init(const struct programmer_cfg *cfg) +static int mediatek_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { int ret; bool allow_brick; diff --git a/mstarddc_spi.c b/mstarddc_spi.c index bd65281..e94eb3b 100644 --- a/mstarddc_spi.c +++ b/mstarddc_spi.c @@ -150,7 +150,7 @@ }; /* Returns 0 upon success, a negative number upon errors. */ -static int mstarddc_spi_init(const struct programmer_cfg *cfg) +static int mstarddc_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { int ret = 0; int mstarddc_fd = -1; diff --git a/ni845x_spi.c b/ni845x_spi.c index fd5057d..0193134 100644 --- a/ni845x_spi.c +++ b/ni845x_spi.c @@ -539,7 +539,7 @@ .probe_opcode = default_spi_probe_opcode, }; -static int ni845x_spi_init(const struct programmer_cfg *cfg) +static int ni845x_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { char *speed_str = NULL; char *CS_str = NULL; diff --git a/nic3com.c b/nic3com.c index a578d48..4703073 100644 --- a/nic3com.c +++ b/nic3com.c @@ -95,7 +95,7 @@ .shutdown = nic3com_shutdown, }; -static int nic3com_init(const struct programmer_cfg *cfg) +static int nic3com_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; uint32_t io_base_addr = 0; @@ -105,7 +105,7 @@ if (rget_io_perms()) return 1; - dev = pcidev_init(cfg, nics_3com, PCI_BASE_ADDRESS_0); + dev = pcidev_init(flashprog, cfg, nics_3com, PCI_BASE_ADDRESS_0); if (!dev) return 1; diff --git a/nicintel.c b/nicintel.c index feb07b6..fed3cfb 100644 --- a/nicintel.c +++ b/nicintel.c @@ -71,7 +71,7 @@ .shutdown = nicintel_shutdown, }; -static int nicintel_init(const struct programmer_cfg *cfg) +static int nicintel_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; uintptr_t addr; @@ -79,7 +79,7 @@ uint8_t *control_bar; /* FIXME: BAR2 is not available if the device uses the CardBus function. */ - dev = pcidev_init(cfg, nics_intel, PCI_BASE_ADDRESS_2); + dev = pcidev_init(flashprog, cfg, nics_intel, PCI_BASE_ADDRESS_2); if (!dev) return 1; diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c index 80ccd88..cc1c7ce 100644 --- a/nicintel_eeprom.c +++ b/nicintel_eeprom.c @@ -479,13 +479,13 @@ .shutdown = nicintel_ee_shutdown_i210, }; -static int nicintel_ee_init(const struct programmer_cfg *cfg) +static int nicintel_ee_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { const struct opaque_master *mst; uint32_t eec = 0; uint8_t *eebar; - struct pci_dev *dev = pcidev_init(cfg, nics_intel_ee, PCI_BASE_ADDRESS_0); + struct pci_dev *dev = pcidev_init(flashprog, cfg, nics_intel_ee, PCI_BASE_ADDRESS_0); if (!dev) return 1; @@ -530,7 +530,7 @@ data->eec = eec; data->done_i210_write = false; - return register_opaque_master(mst, data); + return register_opaque_master(flashprog, mst, data); } const struct programmer_entry programmer_nicintel_eeprom = { diff --git a/nicintel_spi.c b/nicintel_spi.c index 2821d23..3722379 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -285,11 +285,11 @@ return 0; } -static int nicintel_spi_init(const struct programmer_cfg *cfg) +static int nicintel_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; - dev = pcidev_init(cfg, nics_intel_spi, PCI_BASE_ADDRESS_0); + dev = pcidev_init(flashprog, cfg, nics_intel_spi, PCI_BASE_ADDRESS_0); if (!dev) return 1; diff --git a/nicnatsemi.c b/nicnatsemi.c index 65377dc..46e28ea 100644 --- a/nicnatsemi.c +++ b/nicnatsemi.c @@ -82,7 +82,7 @@ .shutdown = nicnatsemi_shutdown, }; -static int nicnatsemi_init(const struct programmer_cfg *cfg) +static int nicnatsemi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; uint32_t io_base_addr; @@ -90,7 +90,7 @@ if (rget_io_perms()) return 1; - dev = pcidev_init(cfg, nics_natsemi, PCI_BASE_ADDRESS_0); + dev = pcidev_init(flashprog, cfg, nics_natsemi, PCI_BASE_ADDRESS_0); if (!dev) return 1; diff --git a/nicrealtek.c b/nicrealtek.c index 5937e35..fdda5ad 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -91,7 +91,7 @@ .shutdown = nicrealtek_shutdown, }; -static int nicrealtek_init(const struct programmer_cfg *cfg) +static int nicrealtek_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; uint32_t io_base_addr = 0; @@ -101,7 +101,7 @@ if (rget_io_perms()) return 1; - dev = pcidev_init(cfg, nics_realtek, PCI_BASE_ADDRESS_0); + dev = pcidev_init(flashprog, cfg, nics_realtek, PCI_BASE_ADDRESS_0); if (!dev) return 1; diff --git a/ogp_spi.c b/ogp_spi.c index d85c823..3ea2cc6 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -107,7 +107,7 @@ return 0; } -static int ogp_spi_init(const struct programmer_cfg *cfg) +static int ogp_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; char *type; @@ -140,7 +140,7 @@ } free(type); - dev = pcidev_init(cfg, ogp_spi, PCI_BASE_ADDRESS_0); + dev = pcidev_init(flashprog, cfg, ogp_spi, PCI_BASE_ADDRESS_0); if (!dev) return 1; diff --git a/opaque.c b/opaque.c index 7704ec7..d11a59f 100644 --- a/opaque.c +++ b/opaque.c @@ -21,6 +21,7 @@ */ #include <stdint.h> + #include "flash.h" #include "flashchips.h" #include "chipdrivers.h" @@ -46,7 +47,8 @@ return flash->mst->opaque.erase(flash, blockaddr, blocklen); } -int register_opaque_master(const struct opaque_master *mst, void *data) +int register_opaque_master(struct flashrom_programmer *flashprog, + const struct opaque_master *mst, void *data) { struct registered_master rmst = {0}; @@ -67,5 +69,5 @@ rmst.opaque = *mst; if (data) rmst.opaque.data = data; - return register_master(&rmst); + return register_driver(flashprog, &rmst); } diff --git a/parade_lspcon.c b/parade_lspcon.c index a50346e..ded8453 100644 --- a/parade_lspcon.c +++ b/parade_lspcon.c @@ -460,7 +460,7 @@ return ret; } -static int parade_lspcon_init(const struct programmer_cfg *cfg) +static int parade_lspcon_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { bool allow_brick; diff --git a/pcidev.c b/pcidev.c index 0b35944..8d7ddbe 100644 --- a/pcidev.c +++ b/pcidev.c @@ -257,7 +257,7 @@ * also matches the specified bus:device.function. * For convenience, this function also registers its own undo handlers. */ -struct pci_dev *pcidev_init(const struct programmer_cfg *cfg, const struct dev_entry *devs, int bar) +struct pci_dev *pcidev_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, const struct dev_entry *devs, int bar) { struct pci_dev *dev; struct pci_dev *found_dev = NULL; diff --git a/pickit2_spi.c b/pickit2_spi.c index 86c5403..10695c7 100644 --- a/pickit2_spi.c +++ b/pickit2_spi.c @@ -387,7 +387,7 @@ .probe_opcode = default_spi_probe_opcode, }; -static int pickit2_spi_init(const struct programmer_cfg *cfg) +static int pickit2_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { uint8_t buf[CMD_LENGTH] = { CMD_EXEC_SCRIPT, diff --git a/pony_spi.c b/pony_spi.c index 0647f91..1869d21 100644 --- a/pony_spi.c +++ b/pony_spi.c @@ -160,7 +160,7 @@ return ret; } -static int pony_spi_init(const struct programmer_cfg *cfg) +static int pony_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { int i, data_out; enum pony_type type; diff --git a/programmer.c b/programmer.c index 15fd1b8..5c500d8 100644 --- a/programmer.c +++ b/programmer.c @@ -14,6 +14,8 @@ * GNU General Public License for more details. */ +#include <stdlib.h> + #include "flash.h" #include "programmer.h" @@ -46,3 +48,53 @@ return ret; } + +// core driver registeration mechanism structure +// good enough for now but obviously quite stupid in its current form. +struct flashrom_programmer { +#define MASTERS_MAX 4 + struct registered_master registered_masters[MASTERS_MAX]; + unsigned int count; + //struct programmer_cfg cfg; + const char *name; + + int (*register_drv)(struct flashrom_programmer *, const struct registered_master *); +}; + +// internal callback +static int register_drv(struct flashrom_programmer *flashprog, + const struct registered_master *mst) +{ + if (flashprog->count >= MASTERS_MAX) { + msg_perr("Tried to register more than %i master " + "interfaces.\n", MASTERS_MAX); + return ERROR_FLASHROM_LIMIT; + } + flashprog->registered_masters[flashprog->count] = *mst; + flashprog->count++; + + msg_ginfo("\033[35m %s: registered (%d) drivers.\n \033[0m", __func__, flashprog->count); + + return 0; +} + +// driver registeration mechanism allocator +struct flashrom_programmer *alloc_flashrom_programmer(const char *name) +{ + struct flashrom_programmer *prog = calloc(1, sizeof(*prog)); + if (!prog) { + msg_gerr("Out of memory!\n"); + return NULL; + } + prog->register_drv = register_drv; + prog->name = name; // TODO(quasisec): swap. + msg_ginfo("\033[35m %s: allocating a driver registration structure.\n \033[0m", __func__); + return prog; +} + +// wrapper +int register_driver(struct flashrom_programmer *flashprog, const struct registered_master *mst) +{ + msg_ginfo("\033[35m %s: hooking driver (%s).\n \033[0m", __func__, flashprog->name); + return flashprog->register_drv(flashprog, mst); +} diff --git a/raiden_debug_spi.c b/raiden_debug_spi.c index d1a09d7..f604c75 100644 --- a/raiden_debug_spi.c +++ b/raiden_debug_spi.c @@ -1486,7 +1486,7 @@ dev = usb_device_free(dev); } -static int raiden_debug_spi_init(const struct programmer_cfg *cfg) +static int raiden_debug_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct usb_match match; char *serial = extract_programmer_param_str(cfg, "serial"); diff --git a/rayer_spi.c b/rayer_spi.c index 27caf2b..e0f37d1 100644 --- a/rayer_spi.c +++ b/rayer_spi.c @@ -296,7 +296,7 @@ return *prog ? 0 : -1; } -static int rayer_spi_init(const struct programmer_cfg *cfg) +static int rayer_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { const struct rayer_programmer *prog; struct rayer_pinout *pinout = NULL; diff --git a/realtek_mst_i2c_spi.c b/realtek_mst_i2c_spi.c index 2a5d5ed..6bfe536 100644 --- a/realtek_mst_i2c_spi.c +++ b/realtek_mst_i2c_spi.c @@ -492,7 +492,7 @@ return ret; } -static int realtek_mst_i2c_spi_init(const struct programmer_cfg *cfg) +static int realtek_mst_i2c_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { int ret = 0; bool reset, enter_isp, allow_brick; diff --git a/satamv.c b/satamv.c index fea4c2b..53edb8a 100644 --- a/satamv.c +++ b/satamv.c @@ -108,7 +108,7 @@ * 0xc08 PCI BAR2 (Flash/NVRAM) Control * 0x1046c Flash Parameters */ -static int satamv_init(const struct programmer_cfg *cfg) +static int satamv_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; uintptr_t addr; @@ -120,7 +120,7 @@ return 1; /* BAR0 has all internal registers memory mapped. */ - dev = pcidev_init(cfg, satas_mv, PCI_BASE_ADDRESS_0); + dev = pcidev_init(flashprog, cfg, satas_mv, PCI_BASE_ADDRESS_0); if (!dev) return 1; diff --git a/satasii.c b/satasii.c index e881f96..f982281 100644 --- a/satasii.c +++ b/satasii.c @@ -99,14 +99,14 @@ .shutdown = satasii_shutdown, }; -static int satasii_init(const struct programmer_cfg *cfg) +static int satasii_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { struct pci_dev *dev = NULL; uint32_t addr; uint16_t reg_offset, id; uint8_t *bar; - dev = pcidev_init(cfg, satas_sii, PCI_BASE_ADDRESS_0); + dev = pcidev_init(flashprog, cfg, satas_sii, PCI_BASE_ADDRESS_0); if (!dev) return 1; diff --git a/sb600spi.c b/sb600spi.c index 5b9ac45..5809431 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -634,7 +634,7 @@ .probe_opcode = default_spi_probe_opcode, }; -int sb600_probe_spi(const struct programmer_cfg *cfg, struct pci_dev *dev) +int sb600_probe_spi(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev) { struct pci_dev *smbus_dev; uint32_t tmp; diff --git a/serprog.c b/serprog.c index 5ddbe3d..2b1b7f1 100644 --- a/serprog.c +++ b/serprog.c @@ -601,7 +601,7 @@ static enum chipbustype serprog_buses_supported = BUS_NONE; -static int serprog_init(const struct programmer_cfg *cfg) +static int serprog_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { uint16_t iface; unsigned char pgmname[17]; diff --git a/stlinkv3_spi.c b/stlinkv3_spi.c index 16a66b4..578e041 100644 --- a/stlinkv3_spi.c +++ b/stlinkv3_spi.c @@ -473,7 +473,7 @@ .probe_opcode = default_spi_probe_opcode, }; -static int stlinkv3_spi_init(const struct programmer_cfg *cfg) +static int stlinkv3_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { uint16_t sck_freq_kHz = 1000; // selecting 1 MHz SCK is a good bet char *param_str; diff --git a/tests/tests.c b/tests/tests.c index 0912f35..76430b7 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -53,7 +53,7 @@ .device_id = NON_ZERO, }; -struct pci_dev *__wrap_pcidev_init(const struct programmer_cfg *cfg, void *devs, int bar) +struct pci_dev *__wrap_pcidev_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, void *devs, int bar) { LOG_ME; return &mock_pci_dev; diff --git a/usbblaster_spi.c b/usbblaster_spi.c index 75d5be7..a64a694 100644 --- a/usbblaster_spi.c +++ b/usbblaster_spi.c @@ -176,7 +176,7 @@ }; /* Returns 0 upon success, a negative number upon errors. */ -static int usbblaster_spi_init(const struct programmer_cfg *cfg) +static int usbblaster_spi_init(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg) { uint8_t buf[BUF_SIZE + 1] = { 0 }; struct ftdi_context ftdic; -- To view, visit https://review.coreboot.org/c/flashrom/+/72781 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0788399d9754cfb4fd83387bd5645e3feafcaece Gerrit-Change-Number: 72781 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in flashrom[master]: flashrom: Pass down flashprog to prog_init() fn
by Edward O'Callaghan (Code Review) 03 Feb '23

03 Feb '23

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/72780 ) Change subject: flashrom: Pass down flashprog to prog_init() fn ...................................................................... flashrom: Pass down flashprog to prog_init() fn Change-Id: I32be4ea9913454e205142b96bf8ba45f8be919f1 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M flashrom.c M include/programmer.h M libflashrom.c 3 files changed, 14 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/80/72780/1 diff --git a/flashrom.c b/flashrom.c index f26bb47..a0754e6 100644 --- a/flashrom.c +++ b/flashrom.c @@ -121,7 +121,8 @@ return rc; } -int programmer_init(const struct programmer_entry *prog, const char *param) +int programmer_init(struct flashrom_programmer **const flashprog, + const struct programmer_entry *prog, const char *param) { int ret; diff --git a/include/programmer.h b/include/programmer.h index db32b2c..233a6fe 100644 --- a/include/programmer.h +++ b/include/programmer.h @@ -95,7 +95,7 @@ extern const struct programmer_entry programmer_usbblaster_spi; extern const struct programmer_entry programmer_dirtyjtag_spi; -int programmer_init(const struct programmer_entry *prog, const char *param); +int programmer_init(struct flashrom_programmer **const flashprog, const struct programmer_entry *prog, const char *param); int programmer_shutdown(void); struct bitbang_spi_master { diff --git a/libflashrom.c b/libflashrom.c index 2e89fe5..b6466fb 100644 --- a/libflashrom.c +++ b/libflashrom.c @@ -204,7 +204,7 @@ list_programmers_linebreak(0, 80, 0); return 1; } - return programmer_init(programmer_table[prog], prog_param); + return programmer_init(flashprog, programmer_table[prog], prog_param); } int flashrom_programmer_shutdown(struct flashrom_programmer *const flashprog) -- To view, visit https://review.coreboot.org/c/flashrom/+/72780 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I32be4ea9913454e205142b96bf8ba45f8be919f1 Gerrit-Change-Number: 72780 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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[M] Change in flashrom[master]: internal: Move parallel logic into internal_par implementation
by Edward O'Callaghan (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Thomas Heijligen, Anastasia Klimchuk. Hello build bot (Jenkins), Thomas Heijligen, Anastasia Klimchuk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/71834 to look at the new patch set (#2). Change subject: internal: Move parallel logic into internal_par implementation ...................................................................... internal: Move parallel logic into internal_par implementation The parallel internal programmer is its own implementation. Move it and call into it from the top-level internal.c programmer implementation. Change-Id: Idabeceb59a36680f5fbb45d3ee4bd5dbf837373b Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M Makefile M include/programmer.h M internal.c A internal_par.c M meson.build 5 files changed, 101 insertions(+), 60 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/71834/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/71834 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Idabeceb59a36680f5fbb45d3ee4bd5dbf837373b Gerrit-Change-Number: 71834 Gerrit-PatchSet: 2 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newpatchset

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[M] Change in flashrom[master]: internal: Move parallel logic into internal_par implementation
by Edward O'Callaghan (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Thomas Heijligen, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/71834 ) Change subject: internal: Move parallel logic into internal_par implementation ...................................................................... Patch Set 1: (1 comment) File internal_par.c: https://review.coreboot.org/c/flashrom/+/71834/comment/44ca68c1_3ccbc74e PS1, Line 16: > I would add a paragraph here, because this is not an "independent" programmer. […] Actually it is a independent programmer and probably _should_ be registered just by itself. -- To view, visit https://review.coreboot.org/c/flashrom/+/71834 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Idabeceb59a36680f5fbb45d3ee4bd5dbf837373b Gerrit-Change-Number: 71834 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Sat, 04 Feb 2023 04:13:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: internal.c: Move sio register to own object
by Edward O'Callaghan (Code Review) 03 Feb '23

03 Feb '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/71577 ) ( 3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: internal.c: Move sio register to own object ...................................................................... internal.c: Move sio register to own object While super i/o is related to the internal programmer it isn't actually _the_ internal programmer. Move register logic to its own object consistent with other programmer types. Change-Id: I9a4c3e12bce5d22492c8d1b8f4a3f49d736dcf31 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/71577 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M Makefile M internal.c M meson.build A superio.c 4 files changed, 63 insertions(+), 29 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, but someone else must approve Anastasia Klimchuk: Looks good to me, approved diff --git a/Makefile b/Makefile index a7ab00b..2ebd370 100644 --- a/Makefile +++ b/Makefile @@ -584,7 +584,7 @@ ifeq ($(CONFIG_INTERNAL) $(CONFIG_INTERNAL_X86), yes yes) FEATURE_FLAGS += -D'CONFIG_INTERNAL=1' PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o \ - internal.o it87spi.o sb600spi.o amd_imc.o wbsio_spi.o mcp6x_spi.o \ + internal.o it87spi.o sb600spi.o superio.o amd_imc.o wbsio_spi.o mcp6x_spi.o \ ichspi.o dmi.o known_boards.o ACTIVE_PROGRAMMERS += internal endif diff --git a/internal.c b/internal.c index 808039d..c5fdb74 100644 --- a/internal.c +++ b/internal.c @@ -34,34 +34,6 @@ enum chipbustype internal_buses_supported = BUS_NONE; -#if defined(__i386__) || defined(__x86_64__) -void probe_superio(void) -{ - probe_superio_winbond(); - /* ITE probe causes SMSC LPC47N217 to power off the serial UART. - * Always probe for SMSC first, and if a SMSC Super I/O is detected - * at a given I/O port, do _not_ probe that port with the ITE probe. - * This means SMSC probing must be done before ITE probing. - */ - //probe_superio_smsc(); - probe_superio_ite(); -} - -int superio_count = 0; -#define SUPERIO_MAX_COUNT 3 - -struct superio superios[SUPERIO_MAX_COUNT]; - -int register_superio(struct superio s) -{ - if (superio_count == SUPERIO_MAX_COUNT) - return 1; - superios[superio_count++] = s; - return 0; -} - -#endif - static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) { diff --git a/meson.build b/meson.build index 36cb4f8..57ac438 100644 --- a/meson.build +++ b/meson.build @@ -247,6 +247,7 @@ 'internal.c', 'it87spi.c', 'sb600spi.c', + 'superio.c', 'amd_imc.c', 'wbsio_spi.c', 'mcp6x_spi.c', diff --git a/superio.c b/superio.c new file mode 100644 index 0000000..3121578 --- /dev/null +++ b/superio.c @@ -0,0 +1,42 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "programmer.h" + +int superio_count = 0; +#define SUPERIO_MAX_COUNT 3 + +struct superio superios[SUPERIO_MAX_COUNT]; + +int register_superio(struct superio s) +{ + if (superio_count == SUPERIO_MAX_COUNT) + return 1; + superios[superio_count++] = s; + return 0; +} + +void probe_superio(void) +{ + probe_superio_winbond(); + /* ITE probe causes SMSC LPC47N217 to power off the serial UART. + * Always probe for SMSC first, and if a SMSC Super I/O is detected + * at a given I/O port, do _not_ probe that port with the ITE probe. + * This means SMSC probing must be done before ITE probing. + */ + //probe_superio_smsc(); + probe_superio_ite(); +} -- To view, visit https://review.coreboot.org/c/flashrom/+/71577 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9a4c3e12bce5d22492c8d1b8f4a3f49d736dcf31 Gerrit-Change-Number: 71577 Gerrit-PatchSet: 5 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: dummyflasher: use new API to register shutdown function
by Alexander Goncharov (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Edward O'Callaghan, Anastasia Klimchuk. Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72408 ) Change subject: dummyflasher: use new API to register shutdown function ...................................................................... Patch Set 2: (1 comment) File dummyflasher.c: https://review.coreboot.org/c/flashrom/+/72408/comment/9e789263_e0994291 PS2, Line 1416: data->refs_cnt += ((dummy_buses_supported & BUS_PROG) != BUS_NONE); : data->refs_cnt += ((dummy_buses_supported & BUS_NONSPI) != BUS_NONE); : data->refs_cnt += ((dummy_buses_supported & BUS_SPI) != BUS_NONE); : : #if 0 : data->refs_cnt += (dummy_buses_supported & BUS_PROG) ? 1 : 0; : data->refs_cnt += (dummy_buses_supported & BUS_NONSPI) ? 1 : 0; : data->refs_cnt += (dummy_buses_supported & BUS_SPI) ? 1 : 0; : #endif > I have another idea! :) What if you add `refs_cnt++` into every if below. […] I thought about it at first sight. But this approach may potentially cause flashrom to crash. If the dummy programmer registers more than one bus, then the next accident can happen => If the first condition the programmer enters fails because `register_*_master()` could not register shutdown (`register_shutdown()`), then it will call shutdown immediately (`mst->shutdown(data)`, opaque.c:55). And since we only have one owner in refs_cnt at that moment, data will be released. When the dummy tries to enter the second condition and increase `data->refs_cnt`, flashrom will crash because this memory isn't valid anymore. This should be mentioned in the code, but I cannot come up with brief comment for that. -- To view, visit https://review.coreboot.org/c/flashrom/+/72408 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0c67c25b0f53cd8c564c4ea0f09f2728e856f6ea Gerrit-Change-Number: 72408 Gerrit-PatchSet: 2 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Fri, 03 Feb 2023 08:47:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Alexander Goncharov <chat(a)joursoir.net> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: ni845x_spi: pass global state through func params
by Alexander Goncharov (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Miklós Márton, Anastasia Klimchuk. Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72154 ) Change subject: ni845x_spi: pass global state through func params ...................................................................... Patch Set 3: (4 comments) File ni845x_spi.c: https://review.coreboot.org/c/flashrom/+/72154/comment/8e228805_709e6be8 PS2, Line 131: static int32 ni845x_spi_open_resource(char *resource_handle, uInt32 *opened_handle, : enum USB845x_type device_pid) > I am thinking, this could fit in one line: the hard limit for line length is 112 chars. […] OK, It takes 113 chars - it's no big deal. https://review.coreboot.org/c/flashrom/+/72154/comment/0fdc1a02_ba9ad6a4 PS2, Line 152: static int ni845x_spi_open(const char *serial, uInt32 *return_handle, : enum USB845x_type *device_pid) > this can be one line too Done https://review.coreboot.org/c/flashrom/+/72154/comment/bf52b72b_21093f01 PS2, Line 233: set_io_voltage_mV > Not sure you meant it: there is `set_io_voltage_mV` which is an existing second argument in the func […] This second argument (`set_io_voltage_mV`) contains a pointer to `io_voltage_in_mV` global var. If we add one more argument to this function, it will be pointer to `io_voltage_in_mV` too! So, let's just use the second argument. Code snippets that prove my words are below. ni845x_spi.c:447: ``` if (usb8452_spi_set_io_voltage(flash->chip->voltage.max, &io_voltage_in_mV, USE_LOWER)) { ... } ``` ni845x_spi.c:470: ``` if (usb8452_spi_set_io_voltage(flash->chip->voltage.min, &io_voltage_in_mV, USE_HIGHER)) { ... } ``` ni845x_spi.c:619: ``` if (usb8452_spi_set_io_voltage(requested_io_voltage_mV, &io_voltage_in_mV, USE_LOWER) < 0) { ... } ``` https://review.coreboot.org/c/flashrom/+/72154/comment/134fdc2c_2be02433 PS2, Line 290: if (set_io_voltage_mV) Miklós, how about dropping this condition? Maybe not in this patch, but in the one of the next. This argument should contain a valid pointer when you call the function to get the IO voltage that was set. Or am I missing something? -- To view, visit https://review.coreboot.org/c/flashrom/+/72154 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I5daeb0839a4cc18b82d38cc06eeba88a619bec61 Gerrit-Change-Number: 72154 Gerrit-PatchSet: 3 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Fri, 03 Feb 2023 08:07:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: ni845x_spi: pass global state through func params
by Alexander Goncharov (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Miklós Márton, Alexander Goncharov. Hello build bot (Jenkins), Miklós Márton, Anastasia Klimchuk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/72154 to look at the new patch set (#3). Change subject: ni845x_spi: pass global state through func params ...................................................................... ni845x_spi: pass global state through func params Instead of relying on global variables, pass and use their value or pointer to functions where possible. This patch prepares the programmer to move global singleton states into a struct. TOPIC=register_master_api Change-Id: I5daeb0839a4cc18b82d38cc06eeba88a619bec61 Signed-off-by: Alexander Goncharov <chat(a)joursoir.net> Ticket: https://ticket.coreboot.org/issues/391 --- M ni845x_spi.c 1 file changed, 27 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/72154/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/72154 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I5daeb0839a4cc18b82d38cc06eeba88a619bec61 Gerrit-Change-Number: 72154 Gerrit-PatchSet: 3 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-MessageType: newpatchset

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[S] Change in flashrom[master]: tests: add bus coverage test for dummy
by Anastasia Klimchuk (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Alexander Goncharov. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72665 ) Change subject: tests: add bus coverage test for dummy ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/72665 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iafe715feb5f5c0b5efd6827cdb2c3a314f542319 Gerrit-Change-Number: 72665 Gerrit-PatchSet: 2 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Fri, 03 Feb 2023 07:48:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: tests: add bus coverage test for dummy
by Alexander Goncharov (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Anastasia Klimchuk. Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72665 ) Change subject: tests: add bus coverage test for dummy ...................................................................... Patch Set 2: (1 comment) File tests/dummyflasher.c: https://review.coreboot.org/c/flashrom/+/72665/comment/695bb03c_a71edf47 PS1, Line 126: dummy_cover_buses_test_success > I would rename to `dummy_all_buses_test_success` Done -- To view, visit https://review.coreboot.org/c/flashrom/+/72665 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iafe715feb5f5c0b5efd6827cdb2c3a314f542319 Gerrit-Change-Number: 72665 Gerrit-PatchSet: 2 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Fri, 03 Feb 2023 07:39:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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