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[XS] Change in flashrom[main]: flashchips: Add Support for XMC XM25LU64C
by Anastasia Klimchuk (Code Review) 24 Oct '24

24 Oct '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/84775?usp=email ) Change subject: flashchips: Add Support for XMC XM25LU64C ...................................................................... flashchips: Add Support for XMC XM25LU64C Add initial support for the SPI flash chip XM25LU64C Datasheet link: https://www.xmcwh.com/uploads/954/XM25LU64C%20_%20Ver1.4.pdf XM25QU64C/XM25LU64C Tested with ch341a programmer: probe, read, write, erase Change-Id: I8d1af7fbfb4c45db09ed5ac82c683d273c8151c7 Signed-off-by: Kan Sun <ssunkkan(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/84775 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M flashchips.c M include/flashchips.h 2 files changed, 3 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Anastasia Klimchuk: Looks good to me, approved diff --git a/flashchips.c b/flashchips.c index b239b5e..f480078 100644 --- a/flashchips.c +++ b/flashchips.c @@ -22788,14 +22788,14 @@ { .vendor = "XMC", - .name = "XM25QU64C", + .name = "XM25QU64C/XM25LU64C", .bustype = BUS_SPI, .manufacture_id = ST_ID, .model_id = XMC_XM25QU64C, .total_size = 8192, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, .block_erasers = diff --git a/include/flashchips.h b/include/flashchips.h index 534304a..886ddc9 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -856,7 +856,7 @@ #define ST_M45PE80 0x4014 /* Same as XM25QH80B */ #define ST_M45PE16 0x4015 #define XMC_XM25QH64C 0x4017 /* Same as XM25QH64D */ -#define XMC_XM25QU64C 0x4117 +#define XMC_XM25QU64C 0x4117 /* Same as XM25LU64C */ #define XMC_XM25QU80B 0x5014 #define XMC_XM25QH16C 0x4015 /* Same as XM25QH16D */ #define XMC_XM25QU16C 0x5015 -- To view, visit https://review.coreboot.org/c/flashrom/+/84775?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I8d1af7fbfb4c45db09ed5ac82c683d273c8151c7 Gerrit-Change-Number: 84775 Gerrit-PatchSet: 4 Gerrit-Owner: Ssunk <ssunkkan(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[L] Change in flashrom[main]: cli_classic: Add rpmc command support
by Peter Marheine (Code Review) 24 Oct '24

24 Oct '24

Attention is currently required from: Anastasia Klimchuk, Matti Finder. Peter Marheine has posted comments on this change by Matti Finder. ( https://review.coreboot.org/c/flashrom/+/84840?usp=email ) Change subject: cli_classic: Add rpmc command support ...................................................................... Patch Set 1: (1 comment) File meson.build: https://review.coreboot.org/c/flashrom/+/84840/comment/583f569c_5db29044?us… : PS1, Line 179: add_project_arguments('-DCONFIG_RPMC_ENABLED=1', language : 'c') rpmc should be added as an option (in `meson_options.txt`), so users can assert they want it enabled and the build will fail if dependencies aren't met. If you do: ``` option('rpmc', type : 'feature', value : 'auto', description : 'Support for Replay Protected Monotonic Counter (RPMC) commands as specified by JESD260') ``` Then here libcrypto can be required sometimes: ``` libcrypto = dependency('libcrypto', required : get_option('rpmc'), version : '>=3.0.0') ... if libcrypto.found() # Add options for RPMC implementation ... endif ``` ..and you don't really need the `message()` anymore since a user can force the build to fail if they want RPMC support but are missing dependencies, instead of manually looking for the message. -- To view, visit https://review.coreboot.org/c/flashrom/+/84840?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I36c823bbee65f256eb6edabe6f058321c9a0cfa1 Gerrit-Change-Number: 84840 Gerrit-PatchSet: 1 Gerrit-Owner: Matti Finder <matti.finder(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Matti Finder <matti.finder(a)gmail.com> Gerrit-Comment-Date: Thu, 24 Oct 2024 00:17:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in flashrom[main]: Complete and fix progress feature implementation for all operations
by Sergii Dmytruk (Code Review) 23 Oct '24

23 Oct '24

Attention is currently required from: Aarya, Anastasia Klimchuk, Nikolai Artemiev. Sergii Dmytruk has posted comments on this change by Sergii Dmytruk. ( https://review.coreboot.org/c/flashrom/+/84102?usp=email ) Change subject: Complete and fix progress feature implementation for all operations ...................................................................... Patch Set 12: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/84102?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: If1e40fc97f443c4f0c0501cef11cff1f3f84c051 Gerrit-Change-Number: 84102 Gerrit-PatchSet: 12 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Wed, 23 Oct 2024 21:44:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[L] Change in flashrom[main]: cli_classic: Add rpmc command support
by Matti Finder (Code Review) 23 Oct '24

23 Oct '24

Matti Finder has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/84840?usp=email ) Change subject: cli_classic: Add rpmc command support ...................................................................... cli_classic: Add rpmc command support Added optional support for all the commands specified in JESD260. Added a new optional dependency to openssls libcrypto. Added parsing for the rpmc parameter sfdp table. Added necessary rpmc parameter information to flashchips struct and the flash hardening feature to enable rpmc commands. Tested on the Winbond W25R128JV as a 'SFDP-capable chip'. This patch was done to add rpmc command support to flashrom. This enables users to write root keys to their flash chips while they flash data on the chip. This might become usefull in the future as rpmc support is extended in coreboot. Also adds usefull debug tools to flashrom, which might be usefull in implementing coreboots rpmc support. Change-Id: I36c823bbee65f256eb6edabe6f058321c9a0cfa1 Signed-off-by: Matti Finder <matti.finder(a)gmail.com> --- M cli_classic.c M include/flash.h A include/rpmc.h M meson.build A rpmc.c M sfdp.c 6 files changed, 798 insertions(+), 83 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/40/84840/1 diff --git a/cli_classic.c b/cli_classic.c index 3343438..bbfc550 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -24,6 +24,7 @@ #include <string.h> #include <stdbool.h> #include <stdlib.h> +#include <stdint.h> #include <cli_classic.h> #include "flash.h" #include "flashchips.h" @@ -31,6 +32,10 @@ #include "programmer.h" #include "libflashrom.h" +#if CONFIG_RPMC_ENABLED == 1 +#include "rpmc.h" +#endif // CONFIG_RPMC_ENABLED + enum { OPTION_IFD = 0x0100, OPTION_FMAP, @@ -45,6 +50,16 @@ OPTION_WP_DISABLE, OPTION_WP_LIST, OPTION_PROGRESS, +#if CONFIG_RPMC_ENABLED == 1 + OPTION_RPMC_READ_DATA, + OPTION_RPMC_WRITE_ROOT_KEY, + OPTION_RPMC_UPDATE_HMAC_KEY, + OPTION_RPMC_INCREMENT_COUNTER, + OPTION_RPMC_GET_COUNTER, + OPTION_RPMC_COUNTER_ADDRESS, + OPTION_RPMC_KEY_DATA, + OPTION_RPMC_KEY_FILE, +#endif // CONFIG_RPMC_ENABLED }; struct cli_options { @@ -73,6 +88,16 @@ char *logfile; char *referencefile; const char *chip_to_probe; + +#if CONFIG_RPMC_ENABLED == 1 + bool rpmc_read_data; + bool rpmc_write_root_key; + bool rpmc_update_hmac_key; + bool rpmc_increment_counter; + bool rpmc_get_counter; + unsigned int rpmc_counter_address; + uint32_t rpmc_key_data, rpmc_previous_counter_value; +#endif // CONFIG_RPMC_ENABLED }; static void cli_classic_usage(const char *name) @@ -85,40 +110,50 @@ "\t\t [-n] [-N] [-f])]\n" "\t[-V[V[V]]] [-o <logfile>]\n\n", name); - printf(" -h | --help print this help text\n" - " -R | --version print version (release)\n" - " -r | --read <file> read flash and save to <file>\n" - " -w | --write (<file>|-) write <file> or the content provided\n" - " on the standard input to flash\n" - " -v | --verify (<file>|-) verify flash against <file>\n" - " or the content provided on the standard input\n" - " -E | --erase erase flash memory\n" - " -V | --verbose more verbose output\n" - " -c | --chip <chipname> probe only for specified flash chip\n" - " -f | --force force specific operations (see man page)\n" - " -n | --noverify don't auto-verify\n" - " -N | --noverify-all verify included regions only (cf. -i)\n" - " -x | --extract extract regions to files\n" - " -l | --layout <layoutfile> read ROM layout from <layoutfile>\n" - " --wp-disable disable write protection\n" - " --wp-enable enable write protection\n" - " --wp-list list supported write protection ranges\n" - " --wp-status show write protection status\n" - " --wp-range=<start>,<len> set write protection range (use --wp-range=0,0\n" - " to unprotect the entire flash)\n" - " --wp-region <region> set write protection region\n" - " --flash-name read out the detected flash name\n" - " --flash-size read out the detected flash size\n" - " --fmap read ROM layout from fmap embedded in ROM\n" - " --fmap-file <fmapfile> read ROM layout from fmap in <fmapfile>\n" - " --ifd read layout from an Intel Firmware Descriptor\n" - " -i | --include <region>[:<file>] only read/write image <region> from layout\n" - " (optionally with data from <file>)\n" - " --image <region>[:<file>] deprecated, please use --include\n" - " -o | --output <logfile> log output to <logfile>\n" - " --flash-contents <ref-file> assume flash contents to be <ref-file>\n" - " -L | --list-supported print supported devices\n" - " --progress show progress percentage on the standard output\n" + printf(" -h | --help print this help text\n" + " -R | --version print version (release)\n" + " -r | --read <file> read flash and save to <file>\n" + " -w | --write (<file>|-) write <file> or the content provided\n" + " on the standard input to flash\n" + " -v | --verify (<file>|-) verify flash against <file>\n" + " or the content provided on the standard input\n" + " -E | --erase erase flash memory\n" + " -V | --verbose more verbose output\n" + " -c | --chip <chipname> probe only for specified flash chip\n" + " -f | --force force specific operations (see man page)\n" + " -n | --noverify don't auto-verify\n" + " -N | --noverify-all verify included regions only (cf. -i)\n" + " -x | --extract extract regions to files\n" + " -l | --layout <layoutfile> read ROM layout from <layoutfile>\n" + " --wp-disable disable write protection\n" + " --wp-enable enable write protection\n" + " --wp-list list supported write protection ranges\n" + " --wp-status show write protection status\n" + " --wp-range=<start>,<len> set write protection range (use --wp-range=0,0\n" + " to unprotect the entire flash)\n" + " --wp-region <region> set write protection region\n" + " --flash-name read out the detected flash name\n" + " --flash-size read out the detected flash size\n" + " --fmap read ROM layout from fmap embedded in ROM\n" + " --fmap-file <fmapfile> read ROM layout from fmap in <fmapfile>\n" + " --ifd read layout from an Intel Firmware Descriptor\n" + " -i | --include <region>[:<file>] only read/write image <region> from layout\n" + " (optionally with data from <file>)\n" + " --image <region>[:<file>] deprecated, please use --include\n" + " -o | --output <logfile> log output to <logfile>\n" + " --flash-contents <ref-file> assume flash contents to be <ref-file>\n" + " -L | --list-supported print supported devices\n" + " --progress show progress percentage on the standard output\n" +#if CONFIG_RPMC_ENABLED == 1 + " --get-rpmc-status read the extended status\n" + " --write-root-key write the root key register for specified counter address\n" + " --update-hmac-key update the hmac key register, with the data from --key-data for specified counter address\n" + " --increment-counter <previous> increment rpmc counter\n" + " --get-counter get counter\n" + " --counter-address <number> specify counter address (default: 0)\n" + " --rpmc-root-key <keyfile> rpmc root key file\n" + " --key-data <keydata> hex number representing the current key data value to use (default: 0)\n" +#endif // CONFIG_RPMC_ENABLED " -p | --programmer <name>[:<param>] specify the programmer device. One of\n"); list_programmers_linebreak(4, 80, 0); printf(".\n\nYou can specify one of -h, -R, -L, " @@ -810,6 +845,38 @@ case OPTION_PROGRESS: options->show_progress = true; break; +#if CONFIG_RPMC_ENABLED == 1 + case OPTION_RPMC_READ_DATA: + cli_classic_validate_singleop(&operation_specified); + options->rpmc_read_data = true; + break; + case OPTION_RPMC_WRITE_ROOT_KEY: + cli_classic_validate_singleop(&operation_specified); + options->rpmc_write_root_key = true; + break; + case OPTION_RPMC_UPDATE_HMAC_KEY: + cli_classic_validate_singleop(&operation_specified); + options->rpmc_update_hmac_key = true; + break; + case OPTION_RPMC_INCREMENT_COUNTER: + cli_classic_validate_singleop(&operation_specified); + options->rpmc_increment_counter = true; + options->rpmc_previous_counter_value = strtoumax(optarg, NULL, 10); + break; + case OPTION_RPMC_GET_COUNTER: + cli_classic_validate_singleop(&operation_specified); + options->rpmc_get_counter = true; + break; + case OPTION_RPMC_COUNTER_ADDRESS: + options->rpmc_counter_address = strtoumax(optarg, NULL, 10); + break; + case OPTION_RPMC_KEY_DATA: + options->rpmc_key_data = strtoumax(optarg, NULL, 16); + break; + case OPTION_RPMC_KEY_FILE: + options->filename = strdup(optarg); + break; +#endif // CONFIG_RPMC_ENABLED default: cli_classic_abort_usage(NULL); break; @@ -847,39 +914,49 @@ struct cli_options options = { 0 }; static const char optstring[] = "r:Rw:v:nNVEfc:l:i:p:Lzho:x"; static const struct option long_options[] = { - {"read", 1, NULL, 'r'}, - {"write", 1, NULL, 'w'}, - {"erase", 0, NULL, 'E'}, - {"verify", 1, NULL, 'v'}, - {"noverify", 0, NULL, 'n'}, - {"noverify-all", 0, NULL, 'N'}, - {"extract", 0, NULL, 'x'}, - {"chip", 1, NULL, 'c'}, - {"verbose", 0, NULL, 'V'}, - {"force", 0, NULL, 'f'}, - {"layout", 1, NULL, 'l'}, - {"ifd", 0, NULL, OPTION_IFD}, - {"fmap", 0, NULL, OPTION_FMAP}, - {"fmap-file", 1, NULL, OPTION_FMAP_FILE}, - {"image", 1, NULL, 'i'}, // (deprecated): back compatibility. - {"include", 1, NULL, 'i'}, - {"flash-contents", 1, NULL, OPTION_FLASH_CONTENTS}, - {"flash-name", 0, NULL, OPTION_FLASH_NAME}, - {"flash-size", 0, NULL, OPTION_FLASH_SIZE}, - {"get-size", 0, NULL, OPTION_FLASH_SIZE}, // (deprecated): back compatibility. - {"wp-status", 0, NULL, OPTION_WP_STATUS}, - {"wp-list", 0, NULL, OPTION_WP_LIST}, - {"wp-range", 1, NULL, OPTION_WP_SET_RANGE}, - {"wp-region", 1, NULL, OPTION_WP_SET_REGION}, - {"wp-enable", 0, NULL, OPTION_WP_ENABLE}, - {"wp-disable", 0, NULL, OPTION_WP_DISABLE}, - {"list-supported", 0, NULL, 'L'}, - {"programmer", 1, NULL, 'p'}, - {"help", 0, NULL, 'h'}, - {"version", 0, NULL, 'R'}, - {"output", 1, NULL, 'o'}, - {"progress", 0, NULL, OPTION_PROGRESS}, - {NULL, 0, NULL, 0}, + {"read", 1, NULL, 'r'}, + {"write", 1, NULL, 'w'}, + {"erase", 0, NULL, 'E'}, + {"verify", 1, NULL, 'v'}, + {"noverify", 0, NULL, 'n'}, + {"noverify-all", 0, NULL, 'N'}, + {"extract", 0, NULL, 'x'}, + {"chip", 1, NULL, 'c'}, + {"verbose", 0, NULL, 'V'}, + {"force", 0, NULL, 'f'}, + {"layout", 1, NULL, 'l'}, + {"ifd", 0, NULL, OPTION_IFD}, + {"fmap", 0, NULL, OPTION_FMAP}, + {"fmap-file", 1, NULL, OPTION_FMAP_FILE}, + {"image", 1, NULL, 'i'}, // (deprecated): back compatibility. + {"include", 1, NULL, 'i'}, + {"flash-contents", 1, NULL, OPTION_FLASH_CONTENTS}, + {"flash-name", 0, NULL, OPTION_FLASH_NAME}, + {"flash-size", 0, NULL, OPTION_FLASH_SIZE}, + {"get-size", 0, NULL, OPTION_FLASH_SIZE}, // (deprecated): back compatibility. + {"wp-status", 0, NULL, OPTION_WP_STATUS}, + {"wp-list", 0, NULL, OPTION_WP_LIST}, + {"wp-range", 1, NULL, OPTION_WP_SET_RANGE}, + {"wp-region", 1, NULL, OPTION_WP_SET_REGION}, + {"wp-enable", 0, NULL, OPTION_WP_ENABLE}, + {"wp-disable", 0, NULL, OPTION_WP_DISABLE}, + {"list-supported", 0, NULL, 'L'}, + {"programmer", 1, NULL, 'p'}, + {"help", 0, NULL, 'h'}, + {"version", 0, NULL, 'R'}, + {"output", 1, NULL, 'o'}, + {"progress", 0, NULL, OPTION_PROGRESS}, +#if CONFIG_RPMC_ENABLED == 1 + {"get-rpmc-status", 0, NULL, OPTION_RPMC_READ_DATA}, + {"write-root-key", 0, NULL, OPTION_RPMC_WRITE_ROOT_KEY}, + {"update-hmac-key", 0, NULL, OPTION_RPMC_UPDATE_HMAC_KEY}, + {"increment-counter", 1, NULL, OPTION_RPMC_INCREMENT_COUNTER}, + {"get-counter", 0, NULL, OPTION_RPMC_GET_COUNTER}, + {"counter-address", 1, NULL, OPTION_RPMC_COUNTER_ADDRESS}, + {"key-data", 1, NULL, OPTION_RPMC_KEY_DATA}, + {"rpmc-root-key", 1, NULL, OPTION_RPMC_KEY_FILE}, +#endif // CONFIG_RPMC_ENABLED + {NULL, 0, NULL, 0}, }; /* @@ -1089,9 +1166,17 @@ options.set_wp_range || options.set_wp_region || options.enable_wp || options.disable_wp || options.print_wp_status || options.print_wp_ranges; + const bool any_rpmc_op = +#if CONFIG_RPMC_ENABLED == 1 + options.rpmc_read_data || options.rpmc_write_root_key || options.rpmc_update_hmac_key || + options.rpmc_increment_counter || options.rpmc_get_counter; +#else + false; +#endif // CONFIG_RPMC_ENABLED + const bool any_op = options.read_it || options.write_it || options.verify_it || options.erase_it || options.flash_name || options.flash_size || - options.extract_it || any_wp_op; + options.extract_it || any_wp_op || any_rpmc_op; if (!any_op) { msg_ginfo("No operations were specified.\n"); @@ -1227,6 +1312,19 @@ else if (options.verify_it) ret = do_verify(fill_flash, options.filename); +#if CONFIG_RPMC_ENABLED == 1 + if (options.rpmc_read_data) + ret = rpmc_read_data(fill_flash); + else if (options.rpmc_write_root_key) + ret = rpmc_write_root_key(fill_flash, options.filename, options.rpmc_counter_address); + else if (options.rpmc_update_hmac_key) { + ret = rpmc_update_hmac_key(fill_flash, options.filename, options.rpmc_key_data, options.rpmc_counter_address); + } else if (options.rpmc_increment_counter) + ret = rpmc_increment_counter(fill_flash, options.filename, options.rpmc_key_data, options.rpmc_counter_address, options.rpmc_previous_counter_value); + else if (options.rpmc_get_counter) + ret = rpmc_get_monotonic_counter(fill_flash, options.filename, options.rpmc_key_data, options.rpmc_counter_address); +#endif // CONFIG_RPMC_ENABLED + out_release: flashrom_layout_release(options.layout); out_shutdown: diff --git a/include/flash.h b/include/flash.h index d0e55af..aad3121 100644 --- a/include/flash.h +++ b/include/flash.h @@ -172,6 +172,11 @@ /* Whether chip has configuration register (RDCR/WRSR_EXT2 commands) */ #define FEATURE_CFGR (1 << 25) +/* + * Whether the chip supports serial flash hardening specified in JESD260 + */ +#define FEATURE_FLASH_HARDENING (1 << 26) + #define ERASED_VALUE(flash) (((flash)->chip->feature_bits & FEATURE_ERASED_ZERO) ? 0x00 : 0xff) #define UNERASED_VALUE(flash) (((flash)->chip->feature_bits & FEATURE_ERASED_ZERO) ? 0xff : 0x00) @@ -543,6 +548,37 @@ * and determines what protection range they select. */ enum decode_range_func decode_range; + + /* + * implement for different monotonic counter sizes assume 32-bit for now + */ + struct rpmc_config { + uint8_t op1_opcode; + uint8_t op2_opcode; + + unsigned int num_counters; + + /* + * Busy Polling Method : + * ‘0’: Poll for OP1 busy using OP2 Extended Status[0]. + * No OP1 Suspended State Support. + * ‘1’: Poll for OP1 busy using Read Status (05H). + * Suspended State is supported. + */ + enum busy_polling_methods { + POLL_OP2_EXTENDED_STATUS = 0, + POLL_READ_STATUS = 1 + } busy_polling_method; + + unsigned int update_rate; + + /* + * all times in microsecond (us) + */ + unsigned int polling_delay_read_counter_us; + unsigned int polling_short_delay_write_counter_us; + unsigned int polling_long_delay_write_counter_us; + } rpmc_ctx; }; typedef int (*chip_restore_fn_cb_t)(struct flashctx *flash, void *data); diff --git a/include/rpmc.h b/include/rpmc.h new file mode 100644 index 0000000..35fc32f --- /dev/null +++ b/include/rpmc.h @@ -0,0 +1,34 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2024 Matti Finder + * (written by Matti Finder <matti.finder(a)gmail.com>) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __RPMC_H__ +#define __RPMC_H__ 1 + +#include <stdint.h> +#include "flash.h" // for flashctx + +int rpmc_write_root_key(struct flashrom_flashctx * flash, const char * const keyfile, const unsigned int counter_address); + +int rpmc_update_hmac_key(struct flashrom_flashctx * flash, const char * const keyfile, const uint32_t key_data, const unsigned int counter_address); + +int rpmc_increment_counter(struct flashrom_flashctx * flash, const char * const keyfile, const uint32_t key_data, const unsigned int counter_address, const uint32_t previous_value); + +int rpmc_get_monotonic_counter(struct flashrom_flashctx * flash, const char * const keyfile, const uint32_t key_data, const unsigned int counter_address); + +int rpmc_read_data(struct flashrom_flashctx *flash); + + +#endif /* !__RPMC_H__ */ diff --git a/meson.build b/meson.build index 26d96d9..483ad5a 100644 --- a/meson.build +++ b/meson.build @@ -164,6 +164,7 @@ libusb1 = dependency('libusb-1.0', required : group_usb) libftdi1 = dependency('libftdi1', required : group_ftdi) libjaylink = dependency('libjaylink', required : group_jlink, version : '>=0.3.0') +libcrypto = dependency('libcrypto', required : false, version : '>=3.0.0') # ECAM is supported in libpci after 3.13.0 if libpci.version().version_compare('>=3.13.0') @@ -172,6 +173,14 @@ add_project_arguments('-DCONFIG_USE_LIBPCI_ECAM=0', language: 'c') endif +# Support additional rpmc commands if libcrypto is installed +if libcrypto.found() + message('found libcrypto dependency rpmc features enabled') + add_project_arguments('-DCONFIG_RPMC_ENABLED=1', language : 'c') + deps += libcrypto + srcs += 'rpmc.c' +endif + if host_machine.system() == 'windows' # Specifying an include_path that doesn't exist is an error, # but we only use this if the library is found in the same directory. diff --git a/rpmc.c b/rpmc.c new file mode 100644 index 0000000..4f5199f --- /dev/null +++ b/rpmc.c @@ -0,0 +1,447 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2024 Matti Finder + * (written by Matti Finder <matti.finder(a)gmail.com>) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "rpmc.h" +#include "flash.h" +#include <stdint.h> +#include <stddef.h> +#include <unistd.h> +#include <openssl/hmac.h> +#include <openssl/evp.h> +#include <openssl/rand.h> +#include <string.h> + +#define RPMC_OP1_MSG_HEADER_LENGTH 4 +#define RPMC_SIGNATURE_LENGTH 32 +#define RPMC_COUNTER_LENGTH 4 +#define RPMC_KEY_DATA_LENGTH 4 +#define RPMC_TAG_LENGTH 12 +#define RPMC_HMAC_KEY_LENGTH 32 +#define RPMC_TRUNCATED_SIG_LENGTH 28 + +// OP1 commands +#define RPMC_WRITE_ROOT_KEY_MSG_LENGTH (RPMC_OP1_MSG_HEADER_LENGTH + RPMC_HMAC_KEY_LENGTH + RPMC_TRUNCATED_SIG_LENGTH) +#define RPMC_UPDATE_HMAC_KEY_MSG_LENGTH (RPMC_OP1_MSG_HEADER_LENGTH + RPMC_KEY_DATA_LENGTH + RPMC_SIGNATURE_LENGTH) +#define RPMC_INCREMENT_MONOTONIC_COUNTER_MSG_LENGTH (RPMC_OP1_MSG_HEADER_LENGTH + RPMC_COUNTER_LENGTH + RPMC_SIGNATURE_LENGTH) +#define RPMC_GET_MONOTONIC_COUNTER_MSG_LENGTH (RPMC_OP1_MSG_HEADER_LENGTH + RPMC_TAG_LENGTH + RPMC_SIGNATURE_LENGTH) + +// OP2 commands +#define RPMC_READ_DATA_MSG_LENGTH 2 +#define RPMC_READ_DATA_ANSWER_LENGTH (1 + RPMC_TAG_LENGTH + RPMC_COUNTER_LENGTH + RPMC_SIGNATURE_LENGTH) + + +struct rpmc_status_register { + uint8_t status; + unsigned char tag[RPMC_TAG_LENGTH]; + uint32_t counter_data; + unsigned char signature[RPMC_SIGNATURE_LENGTH]; +}; + +static uint8_t get_extended_status(struct flashrom_flashctx * flash) +{ + const unsigned char extended_status_msg[RPMC_READ_DATA_MSG_LENGTH] = { + flash->chip->rpmc_ctx.op2_opcode, + 0 // dummy + }; + unsigned char status; + + if (spi_send_command(flash, RPMC_READ_DATA_MSG_LENGTH, 1, extended_status_msg, &status)) { + msg_gerr("Reading extended status failed\n"); + status = ~0; // msb 1 implies all else should be 0, we use that as our failure state + } + + return status; +} + +static int get_extended_status_long(struct flashrom_flashctx * flash, + struct rpmc_status_register * status, + // optional to check values tag and signature against + const unsigned char * const tag, + const unsigned char * const key) +{ + const unsigned int tag_offset = 1; + const unsigned int counter_data_offset = tag_offset + RPMC_TAG_LENGTH; + const unsigned int signature_offset = counter_data_offset + RPMC_COUNTER_LENGTH; + const unsigned char cmd[RPMC_READ_DATA_MSG_LENGTH] = { + flash->chip->rpmc_ctx.op2_opcode, + 0 // dummy + }; + unsigned char answer[RPMC_READ_DATA_ANSWER_LENGTH]; + + int ret = spi_send_command(flash, RPMC_READ_DATA_MSG_LENGTH, RPMC_READ_DATA_ANSWER_LENGTH, cmd, answer) != 0; + if (ret) { + msg_gerr("reading extended status failed\n"); + return ret; + } + + status->status = answer[0]; + + memcpy(status->tag, answer + tag_offset, RPMC_TAG_LENGTH); + + status->counter_data = answer[counter_data_offset]; + status->counter_data = (status->counter_data << 8) | answer[counter_data_offset + 1]; + status->counter_data = (status->counter_data << 8) | answer[counter_data_offset + 2]; + status->counter_data = (status->counter_data << 8) | answer[counter_data_offset + 3]; + + memcpy(status->signature, answer + signature_offset, RPMC_SIGNATURE_LENGTH); + + if (tag != NULL) { + if (memcmp(tag, status->tag, RPMC_TAG_LENGTH) != 0) { + msg_gwarn("Tag doesn't match counter might be false\n"); + ret = 1; + } + } + + if (key != NULL) { + unsigned char * signature = HMAC(EVP_sha256(), key, RPMC_HMAC_KEY_LENGTH, answer + tag_offset, signature_offset - tag_offset, NULL, NULL); + if (signature == NULL) { + msg_gerr("Could not generate signature\n"); + ret = 1; + } else if (memcmp(signature, status->signature, RPMC_SIGNATURE_LENGTH) != 0) { + msg_gerr("Signature doesn't match\n"); + ret = 1; + } + } + + return ret; +} + +static int poll_until_finished(struct flashrom_flashctx * flash) +{ + unsigned char poll_response; + + do { + const unsigned char status_poll_msg = 0x05; + + // since we aren't really a time critical application we just sleep for the longest time + if (usleep(flash->chip->rpmc_ctx.polling_long_delay_write_counter_us)) { + msg_gdbg("%s: usleep failed\n", __func__); + } + + switch (flash->chip->rpmc_ctx.busy_polling_method) { + case POLL_READ_STATUS: + if (spi_send_command(flash, 1, 1, &status_poll_msg, &poll_response)) { + msg_gerr("Polling Status-Register-1 failed\n"); + return 1; + } + break; + case POLL_OP2_EXTENDED_STATUS: + poll_response = get_extended_status(flash); + break; + default: + msg_gerr("Unsupported busy polling method found, this should not happen. Exiting...\n"); + return 1; + } + } while ((poll_response & 1) != 0); + + return 0; +} + + +static int calculate_hmac_key_register(const char * const keyfile, const uint32_t key_data, unsigned char * hmac_key_register) +{ + unsigned char key[RPMC_HMAC_KEY_LENGTH]; + unsigned char key_data_buf[RPMC_KEY_DATA_LENGTH]; + key_data_buf[0] = (key_data >> 24) & 0xff; + key_data_buf[1] = (key_data >> 16) & 0xff; + key_data_buf[2] = (key_data >> 8) & 0xff; + key_data_buf[3] = key_data & 0xff; + + if (keyfile == NULL || read_buf_from_file(key, RPMC_HMAC_KEY_LENGTH, keyfile) != 0) { + return 1; + } + + unsigned char * key_ptr = HMAC(EVP_sha256(), key, RPMC_HMAC_KEY_LENGTH, key_data_buf, RPMC_KEY_DATA_LENGTH, hmac_key_register, NULL); + if (key_ptr == NULL) { + msg_gerr("Could not calculate HMAC signature for hmac storage\n"); + return 1; + } + + return 0; +} + +static int basic_checks(struct flashrom_flashctx * flash, const unsigned int counter_address) +{ + if ((flash->chip->feature_bits & FEATURE_FLASH_HARDENING) == 0) { + msg_gerr("Flash hardening is not supported on this chip, aborting.\n"); + return 1; + } + + if (counter_address >= flash->chip->rpmc_ctx.num_counters) { + msg_gerr("Counter address is not in range, should be between 0 and %d.\n", flash->chip->rpmc_ctx.num_counters - 1); + return 1; + } + + return 0; +} + +static int check_errors(const uint8_t status, const unsigned int command) +{ + if (status == 0x80) { + return 0; + } + + if (status & (1 << 4)) { + msg_gerr("Previous counter value does not match.\n"); + } else if (status & (1 << 3)) { + msg_gerr("Hmac key register is uninitialized.\n"); + } else if (status & (1 << 1)) { + switch(command) { + case 0x0: + msg_gerr("Either Root Key Register Overwrite, Counter Address out of range or truncated signature mismatch.\n"); + break; + case 0x1: + msg_gerr("Counter is not initialized.\n"); + break; + } + } else if (status & (1 << 2)) { + msg_gerr("Payload size incorrect, counter address out of range, commandtype out of range or signature mismatch.\n"); + } + + return 1; +} + +static int send_and_wait(struct flashrom_flashctx * flash, const unsigned char * const msg, const size_t length) +{ + msg_gdbg("sending rpmc command\n"); + int ret = spi_send_command(flash, length, 0, msg, NULL); + if (ret) + return ret; + + // check operation status + ret = poll_until_finished(flash); + if (ret) + return ret; + + msg_gdbg("done sending rpmc command\n"); + + return 0; +} + +static int sign_send_wait_check(struct flashrom_flashctx * flash, + unsigned char * const msg, + const size_t msg_length, + const size_t signature_offset, + const char * const keyfile, + const uint32_t key_data) +{ + unsigned char hmac_key_register[RPMC_HMAC_KEY_LENGTH]; + + if (calculate_hmac_key_register(keyfile, key_data, hmac_key_register)) { + return 1; + } + + if (HMAC(EVP_sha256(), hmac_key_register, RPMC_HMAC_KEY_LENGTH, msg, signature_offset, msg + signature_offset, NULL) == NULL) { + msg_gerr("Could not generate HMAC signature\n"); + return 1; + } + + if (send_and_wait(flash, msg, msg_length)) { + return 1; + } + + if (check_errors(get_extended_status(flash), msg[1])){ + return 1; + } + + return 0; +} + +int rpmc_write_root_key(struct flashrom_flashctx * flash, const char * const keyfile, const unsigned int counter_address) +{ + const unsigned int key_offset = RPMC_OP1_MSG_HEADER_LENGTH; + const unsigned int signature_offset = key_offset + RPMC_HMAC_KEY_LENGTH; + const unsigned int signature_cutoff = RPMC_SIGNATURE_LENGTH - RPMC_TRUNCATED_SIG_LENGTH; + + unsigned char msg[RPMC_WRITE_ROOT_KEY_MSG_LENGTH]; + msg[0] = flash->chip->rpmc_ctx.op1_opcode; // Opcode + msg[1] = 0x00; // CmdType + msg[2] = counter_address; // CounterAddr + msg[3] = 0; // Reserved + + if (basic_checks(flash, counter_address)) { + return 1; + } + + if (keyfile == NULL || read_buf_from_file(msg + key_offset, RPMC_HMAC_KEY_LENGTH, keyfile) != 0) { + return 1; + } + + unsigned char * signature = HMAC(EVP_sha256(), msg + key_offset, RPMC_HMAC_KEY_LENGTH, msg, RPMC_OP1_MSG_HEADER_LENGTH, NULL, NULL); + if (signature == NULL) { + msg_gerr("Could not calculate HMAC signature for message\n"); + return 1; + } + + // need to truncate the signature a bit + memcpy(msg + signature_offset, signature + signature_cutoff, RPMC_TRUNCATED_SIG_LENGTH); + + if (send_and_wait(flash, msg, RPMC_WRITE_ROOT_KEY_MSG_LENGTH)) { + return 1; + } + + if (check_errors(get_extended_status(flash), msg[1])){ + return 1; + } + + msg_ginfo("Successfully wrote new root key for counter %u.\n", counter_address); + return 0; +} + +int rpmc_update_hmac_key(struct flashrom_flashctx * flash, const char * const keyfile, const uint32_t key_data, const unsigned int counter_address) +{ + const unsigned int signature_offset = RPMC_OP1_MSG_HEADER_LENGTH + RPMC_KEY_DATA_LENGTH; + unsigned char msg[RPMC_UPDATE_HMAC_KEY_MSG_LENGTH]; + msg[0] = flash->chip->rpmc_ctx.op1_opcode; // Opcode + msg[1] = 0x01; // CmdType + msg[2] = counter_address; // CounterAddr + msg[3] = 0; // Reserved + msg[4] = (key_data >> 24) & 0xff; + msg[5] = (key_data >> 16) & 0xff; + msg[6] = (key_data >> 8) & 0xff; + msg[7] = key_data & 0xff; + + if (basic_checks(flash, counter_address)) { + return 1; + } + + if (sign_send_wait_check(flash, msg, RPMC_UPDATE_HMAC_KEY_MSG_LENGTH, signature_offset, keyfile, key_data)) { + return 1; + } + + msg_ginfo("Successfully updated hmac key to 0x%08x for counter %u.\n", key_data, counter_address); + return 0; +} + +int rpmc_increment_counter(struct flashrom_flashctx * flash, const char * const keyfile, const uint32_t key_data, const unsigned int counter_address, const uint32_t previous_value) +{ + const unsigned int signature_offset = RPMC_OP1_MSG_HEADER_LENGTH + RPMC_COUNTER_LENGTH; + unsigned char msg[RPMC_INCREMENT_MONOTONIC_COUNTER_MSG_LENGTH]; + msg[0] = flash->chip->rpmc_ctx.op1_opcode; // Opcode + msg[1] = 0x02; // CmdType + msg[2] = counter_address; // CounterAddr + msg[3] = 0; // Reserved + // CounterData + msg[4] = (previous_value >> 24) & 0xff; + msg[5] = (previous_value >> 16) & 0xff; + msg[6] = (previous_value >> 8) & 0xff; + msg[7] = previous_value & 0xff; + + if (basic_checks(flash, counter_address)) { + return 1; + } + + if (sign_send_wait_check(flash, msg, RPMC_INCREMENT_MONOTONIC_COUNTER_MSG_LENGTH, signature_offset, keyfile, key_data)) { + return 1; + } + + msg_ginfo("Successfully incremented counter %u.\n", counter_address); + return 0; +} + +int rpmc_get_monotonic_counter(struct flashrom_flashctx * flash, const char * const keyfile, const uint32_t key_data, const unsigned int counter_address) +{ + unsigned char hmac_key_register[RPMC_HMAC_KEY_LENGTH]; + const unsigned int tag_offset = RPMC_OP1_MSG_HEADER_LENGTH; + const unsigned int signature_offset = tag_offset + RPMC_TAG_LENGTH; + unsigned char msg[RPMC_GET_MONOTONIC_COUNTER_MSG_LENGTH]; + msg[0] = flash->chip->rpmc_ctx.op1_opcode; // Opcode + msg[1] = 0x03; // CmdType + msg[2] = counter_address; // CounterAddr + msg[3] = 0; // Reserved + + if (basic_checks(flash, counter_address)) { + return 1; + } + + if (RAND_bytes(msg + tag_offset, RPMC_TAG_LENGTH) != 1) { + msg_gerr("Could not generate random tag.\n"); + return 1; + } + + msg_gdbg("Random tag is:"); + for (size_t i = 0; i < RPMC_TAG_LENGTH; i++) { + msg_gdbg(" 0x%02x", msg[tag_offset + i]); + } + msg_gdbg("\n"); + + if (calculate_hmac_key_register(keyfile, key_data, hmac_key_register)) { + return 1; + } + + if (HMAC(EVP_sha256(), hmac_key_register, RPMC_HMAC_KEY_LENGTH, msg, signature_offset, msg + signature_offset, NULL) == NULL) { + msg_gerr("Could not generate HMAC signature\n"); + return 1; + } + + if (send_and_wait(flash, msg, RPMC_GET_MONOTONIC_COUNTER_MSG_LENGTH)) { + return 1; + } + + struct rpmc_status_register status; + if (get_extended_status_long(flash, &status, msg + tag_offset, hmac_key_register)) { + return 1; + } + + if (check_errors(status.status, msg[1])) { + return 1; + } + + msg_ginfo("Returned counter value %u for counter %u\n", status.counter_data, counter_address); + return 0; +} + +int rpmc_read_data(struct flashrom_flashctx * flash) +{ + // hack around not having a counter address + if (basic_checks(flash, 0)) { + return 1; + } + + struct rpmc_status_register status; + + if (get_extended_status_long(flash, &status, NULL, NULL)) { + return 1; + } + + msg_ginfo("Reading rpmc data returned:\n"); + + // pretty print status + char bin_buffer[9]; + uint8_t status_bits = status.status; + for (int i = 7; i >= 0; i--){ + bin_buffer[i] = '0' + (status_bits & 1); + status_bits = status_bits >> 1; + } + bin_buffer[8] = '\0'; + msg_ginfo("Extended Status: 0b%s\n", bin_buffer); + + msg_ginfo("Tag:\n"); + for (size_t i = 0; i < RPMC_TAG_LENGTH; i++){ + msg_ginfo("0x%02x ", status.tag[i]); + } + msg_ginfo("\n"); + + msg_ginfo("Counter: %u\n", status.counter_data); + + msg_ginfo("Signature:\n"); + for (size_t i = 0; i < RPMC_SIGNATURE_LENGTH; i++){ + msg_ginfo("0x%02x ", status.signature[i]); + } + msg_ginfo("\n"); + + return 0; +} diff --git a/sfdp.c b/sfdp.c index 8683779..e3bcefd 100644 --- a/sfdp.c +++ b/sfdp.c @@ -252,6 +252,86 @@ return 0; } +static unsigned int bits_to_counter_delay(const uint8_t bits) +{ + unsigned int value = bits & 0xf; + + switch ((bits & (0b11 << 4)) >> 4) { + case 0b00: + value *= 1; + break; + case 0b01: + value *= 16; + break; + case 0b10: + value *= 128; + break; + case 0b11: + value *= 1000; + break; + } + + return value; +} + +static int parse_rpmc_parameter_table(struct flashchip * const chip, const uint8_t * const buf, const uint16_t len) +{ + if (len != 2 * 4) { + msg_cdbg("Length of RPMC parameter table is wrong, skipping it\n"); + return 1; + } + + msg_cdbg("Parsing rpmc parameter table...\n"); + + // first dword + uint32_t first_dword = ((unsigned int)buf[(4 * 0) + 0]); + first_dword |= ((unsigned int)buf[(4 * 0) + 1]) << 8; + first_dword |= ((unsigned int)buf[(4 * 0) + 2]) << 16; + first_dword |= ((unsigned int)buf[(4 * 0) + 3]) << 24; + + if ((first_dword & 0b1) != 0) { + // flash hardening is not supported + msg_cdbg("Flash Hardening not supported\n"); + goto done; + } + + chip->feature_bits |= FEATURE_FLASH_HARDENING; + + chip->rpmc_ctx.busy_polling_method = (first_dword & (1 << 2)) >> 2; + msg_cspew("Busy polling method: %u\n", chip->rpmc_ctx.busy_polling_method); + + chip->rpmc_ctx.num_counters = ((first_dword & (0xf << 4)) >> 4) + 1; + msg_cspew("Number of counters: %u\n", chip->rpmc_ctx.num_counters); + + chip->rpmc_ctx.op1_opcode = (first_dword & (0xff << 8)) >> 8; + msg_cspew("OP1 opcode: 0x%02x\n", chip->rpmc_ctx.op1_opcode); + + chip->rpmc_ctx.op2_opcode = (first_dword & (0xff << 16)) >> 16; + msg_cspew("OP2 opcode: 0x%02x\n", chip->rpmc_ctx.op2_opcode); + + chip->rpmc_ctx.update_rate = 5 * (2 << ((first_dword & (0xf << 24)) >> 24)); + msg_cspew("Update rate: %u seconds\n", chip->rpmc_ctx.update_rate); + + // second dword + uint32_t second_dword = ((unsigned int)buf[(4 * 1) + 0]); + second_dword |= ((unsigned int)buf[(4 * 1) + 1]) << 8; + second_dword |= ((unsigned int)buf[(4 * 1) + 2]) << 16; + second_dword |= ((unsigned int)buf[(4 * 1) + 3]) << 24; + + chip->rpmc_ctx.polling_delay_read_counter_us = bits_to_counter_delay(second_dword & 0xf); + msg_cspew("Read counter polling delay: %u us\n", chip->rpmc_ctx.polling_delay_read_counter_us); + + chip->rpmc_ctx.polling_short_delay_write_counter_us = bits_to_counter_delay((second_dword >> 8) & 0xf); + msg_cspew("Write counter short polling delay: %u us\n", chip->rpmc_ctx.polling_short_delay_write_counter_us); + + chip->rpmc_ctx.polling_long_delay_write_counter_us = bits_to_counter_delay((second_dword >> 16) & 0xf) * 1000; + msg_cspew("Write counter long polling delay: %u us\n", chip->rpmc_ctx.polling_long_delay_write_counter_us); + +done: + msg_cdbg("done.\n"); + return 0; +} + int probe_spi_sfdp(struct flashctx *flash) { int ret = 0; @@ -359,23 +439,34 @@ } msg_cspew("\n"); - if (i == 0) { /* Mandatory JEDEC SFDP parameter table */ - if (hdrs[i].id != 0) - msg_cdbg("ID of the mandatory JEDEC SFDP " - "parameter table is not 0 as demanded " - "by JESD216 (warning only).\n"); - if (hdrs[i].v_major != 0x01) { - msg_cdbg("The chip contains an unknown " - "version of the JEDEC flash " - "parameters table, skipping it.\n"); - } else if (len != 4 * 4 && len < 9 * 4) { - msg_cdbg("Length of the mandatory JEDEC SFDP " - "parameter table is wrong (%d B), " - "skipping it.\n", len); - } else if (sfdp_fill_flash(flash->chip, tbuf, len) == 0) - ret = 1; + // TODO: implement parsing for other pages + switch (hdrs[i].id){ + case 0: // Mandatory JEDEC SFDP parameter table + if (hdrs[i].v_major != 0x01) { + msg_cdbg("The chip contains an unknown " + "version of the JEDEC flash " + "parameters table, skipping it.\n"); + } else if (len != 4 * 4 && len < 9 * 4) { + msg_cdbg("Length of the mandatory JEDEC SFDP " + "parameter table is wrong (%d B), " + "skipping it.\n", len); + } else if (sfdp_fill_flash(flash->chip, tbuf, len) == 0) { + ret = 1; + } + break; + case 0x03: // RPMC parameter table as specified in JESD260 + if (hdrs[i].v_major != 1) { + msg_cdbg("The chip contains an unknown version of the RPMC parameter parameters table, skipping it.\n"); + } else if (parse_rpmc_parameter_table(flash->chip, tbuf, len) == 0) { + ret = 1; + } + break; + default: + msg_cdbg("Support for SFDP Page with ID 0x%02x not implemented, skipping it.\n", hdrs[i].id); + break; } + free(tbuf); } -- To view, visit https://review.coreboot.org/c/flashrom/+/84840?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I36c823bbee65f256eb6edabe6f058321c9a0cfa1 Gerrit-Change-Number: 84840 Gerrit-PatchSet: 1 Gerrit-Owner: Matti Finder <matti.finder(a)gmail.com>

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[XS] Change in flashrom[main]: writeprotect: Fix inaccurate return code
by Anastasia Klimchuk (Code Review) 23 Oct '24

23 Oct '24

Attention is currently required from: Nikolai Artemiev, Sergii Dmytruk. Anastasia Klimchuk has posted comments on this change by Nikolai Artemiev. ( https://review.coreboot.org/c/flashrom/+/84826?usp=email ) Change subject: writeprotect: Fix inaccurate return code ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/84826?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I29e9069c7781fbb238f30aa9a9285b692b0c7200 Gerrit-Change-Number: 84826 Gerrit-PatchSet: 2 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Wed, 23 Oct 2024 01:11:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in flashrom[main]: flashchips: add GD25F128F
by Victor Lim (Code Review) 22 Oct '24

22 Oct '24

Victor Lim has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/84827?usp=email ) Change subject: flashchips: add GD25F128F ...................................................................... flashchips: add GD25F128F GD25F128F: 3V 128Mbit, high performance Tested on ch347 with erase, write, read, and protection Will send datasheet via email Change-Id: I14c0905f50e92492287d50f8377790b997c4acfe Signed-off-by: Victor <vlim(a)gigadevice.com> --- M flashchips.c M include/flashchips.h 2 files changed, 46 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/27/84827/1 diff --git a/flashchips.c b/flashchips.c index b239b5e..8279d1a 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8188,6 +8188,51 @@ .decode_range = DECODE_RANGE_SPI25, }, +{ + .vendor = "GigaDevice", + .name = "GD25F128F", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25F128F, + .total_size = 16384, + .page_size = 256, + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2 | FEATURE_WRSR3, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, + .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */ + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + .reg_bits = + { + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like TB */ + }, + .decode_range = DECODE_RANGE_SPI25, + }, + { .vendor = "GigaDevice", .name = "GD25F256F", diff --git a/include/flashchips.h b/include/flashchips.h index 534304a..9cb4cd0 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -402,6 +402,7 @@ #define GIGADEVICE_GD25VQ80C 0x4214 #define GIGADEVICE_GD25VQ16C 0x4215 #define GIGADEVICE_GD25F64F 0x4317 +#define GIGADEVICE_GD25F128F 0x4318 #define GIGADEVICE_GD25F256F 0x4319 #define GIGADEVICE_GD25LQ40 0x6013 #define GIGADEVICE_GD25LQ80 0x6014 -- To view, visit https://review.coreboot.org/c/flashrom/+/84827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I14c0905f50e92492287d50f8377790b997c4acfe Gerrit-Change-Number: 84827 Gerrit-PatchSet: 1 Gerrit-Owner: Victor Lim <vlim(a)gigadevice.com>

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[XS] Change in flashrom[main]: writeprotect: Fix inaccurate return code
by Nikolai Artemiev (Code Review) 22 Oct '24

22 Oct '24

Attention is currently required from: Anastasia Klimchuk, Sergii Dmytruk. Hello Anastasia Klimchuk, Sergii Dmytruk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/84826?usp=email to look at the new patch set (#2). Change subject: writeprotect: Fix inaccurate return code ...................................................................... writeprotect: Fix inaccurate return code If hardware protection is requested but not supported by the flash chip, return an error code indicating that the protection mode is unsupported, rather than indicating that all WP features are unsupported. TEST=ninja test Change-Id: I29e9069c7781fbb238f30aa9a9285b692b0c7200 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M writeprotect.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/26/84826/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/84826?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I29e9069c7781fbb238f30aa9a9285b692b0c7200 Gerrit-Change-Number: 84826 Gerrit-PatchSet: 2 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>

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[XS] Change in flashrom[main]: writeprotect: Fix inaccurate return code
by Nikolai Artemiev (Code Review) 22 Oct '24

22 Oct '24

Nikolai Artemiev has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/84826?usp=email ) Change subject: writeprotect: Fix inaccurate return code ...................................................................... writeprotect: Fix inaccurate return code If the user requests hardware protection on a chip that doesn't support it, return an error code indicating that the protection mode is unsupported, rather than indicating that the chip is unsupported, since other WP operations may still be available. TEST=ninja test Change-Id: I29e9069c7781fbb238f30aa9a9285b692b0c7200 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M writeprotect.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/26/84826/1 diff --git a/writeprotect.c b/writeprotect.c index 411089d..964c311 100644 --- a/writeprotect.c +++ b/writeprotect.c @@ -482,7 +482,7 @@ case FLASHROM_WP_MODE_HARDWARE: if (!bits->srp_bit_present) - return FLASHROM_WP_ERR_CHIP_UNSUPPORTED; + return FLASHROM_WP_ERR_MODE_UNSUPPORTED; bits->srl = 0; bits->srp = 1; -- To view, visit https://review.coreboot.org/c/flashrom/+/84826?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I29e9069c7781fbb238f30aa9a9285b692b0c7200 Gerrit-Change-Number: 84826 Gerrit-PatchSet: 1 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com>

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[S] Change in flashrom[main]: VERSION: Change name pattern to match tag name from now on
by Peter Marheine (Code Review) 21 Oct '24

21 Oct '24

Attention is currently required from: Anastasia Klimchuk, Patrick Rudolph. Peter Marheine has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/84811?usp=email ) Change subject: VERSION: Change name pattern to match tag name from now on ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/84811?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I2bd2e57e42c29ea5a9d8bc334b86c6fa5c4b46a4 Gerrit-Change-Number: 84811 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Mon, 21 Oct 2024 22:47:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[L] Change in flashrom[main]: Complete and fix progress feature implementation for all operations
by Anastasia Klimchuk (Code Review) 21 Oct '24

21 Oct '24

Attention is currently required from: Aarya, Nikolai Artemiev, Sergii Dmytruk. Anastasia Klimchuk has posted comments on this change by Sergii Dmytruk. ( https://review.coreboot.org/c/flashrom/+/84102?usp=email ) Change subject: Complete and fix progress feature implementation for all operations ...................................................................... Patch Set 12: (1 comment) File cli_output.c: https://review.coreboot.org/c/flashrom/+/84102/comment/ac590576_87cb2203?us… : PS9, Line 164: progress_separator = (fmt[strlen(fmt) - 1] == '\n' ? NEWLINE : MIDLINE); > I don't think it's worth calling `strlen()` twice like that in case of lots of logging lines. […] Yes good points, done -- To view, visit https://review.coreboot.org/c/flashrom/+/84102?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: If1e40fc97f443c4f0c0501cef11cff1f3f84c051 Gerrit-Change-Number: 84102 Gerrit-PatchSet: 12 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Mon, 21 Oct 2024 11:43:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>

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