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[M] Change in flashrom[master]: tree/: Convert unlock func ptr into enumerate values
by Edward O'Callaghan (Code Review) 14 Mar '23

14 Mar '23

Attention is currently required from: Angel Pons, Anastasia Klimchuk. Hello Felix Singer, build bot (Jenkins), Angel Pons, Anastasia Klimchuk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/69933 to look at the new patch set (#6). Change subject: tree/: Convert unlock func ptr into enumerate values ...................................................................... tree/: Convert unlock func ptr into enumerate values Converting the blockprotect unlock function pointer within the flashchip struct into enum values allows for the flashchips db to be turn into pure, declarative data. A nice side-effect of this is to reduce link-time symbol space of chipdrivers and increase modularity of the spi25_statusreg.c and related implementations. BUG=none TEST=ninja test. Change-Id: Ie5c5db1b09d07e1a549990d6f5a622fae4c83233 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M 82802ab.c M flashrom.c M include/chipdrivers.h M include/flash.h M printlock.c M spi25_statusreg.c M tests/chip.c M tests/chip_wp.c 8 files changed, 150 insertions(+), 74 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/33/69933/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/69933 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie5c5db1b09d07e1a549990d6f5a622fae4c83233 Gerrit-Change-Number: 69933 Gerrit-PatchSet: 6 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newpatchset

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[M] Change in flashrom[master]: tree/: Convert unlock func ptr into enumerate values
by Edward O'Callaghan (Code Review) 14 Mar '23

14 Mar '23

Attention is currently required from: Angel Pons, Liam Flaherty, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69933 ) Change subject: tree/: Convert unlock func ptr into enumerate values ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/69933/comment/a330e245_ae87c7df PS4, Line 9: By converting > I think you don't need "By", just start with Converting. […] Seem to be a subjective usage of English. -- To view, visit https://review.coreboot.org/c/flashrom/+/69933 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie5c5db1b09d07e1a549990d6f5a622fae4c83233 Gerrit-Change-Number: 69933 Gerrit-PatchSet: 5 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Liam Flaherty <liamflaherty(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Liam Flaherty <liamflaherty(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Tue, 14 Mar 2023 04:44:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: flashchips.c: Drop 'unlock' func for chips with WP topologies
by Edward O'Callaghan (Code Review) 14 Mar '23

14 Mar '23

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/73714 ) Change subject: flashchips.c: Drop 'unlock' func for chips with WP topologies ...................................................................... flashchips.c: Drop 'unlock' func for chips with WP topologies Use the proper status register topology data via writeprotect to correctly unlock the chip over boutique unlock functions for chips that have WP data to support it. Change-Id: Ib24e91b28cb3d87ba74019e23f88209b95a21c5d Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M flashchips.c 1 file changed, 14 insertions(+), 46 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/14/73714/1 diff --git a/flashchips.c b/flashchips.c index 6764c33..1a37ce1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2438,7 +2438,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1700, 2000}, @@ -5173,7 +5172,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */ - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -5256,7 +5254,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */ - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -5342,7 +5339,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */ - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -6454,7 +6450,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, - .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */ .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1695, 1950}, @@ -6620,7 +6615,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, - .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */ .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1695, 1950}, @@ -6748,7 +6742,6 @@ }, /* TODO: 2nd status reg (read 0x35, write 0x31) and 3rd status reg (read 0x15, write 0x11) */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, - .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, @@ -6883,7 +6876,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -6930,7 +6922,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, - .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */ .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, @@ -7052,7 +7043,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, - .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */ .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, @@ -8941,7 +8931,6 @@ }, }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and dual I/O supported */ .voltage = {2700, 3600}, @@ -9174,7 +9163,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6: error flag */ - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, @@ -9216,7 +9204,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6: continuously program mode */ - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B), dual I/O read (0xBB) supported */ .voltage = {2700, 3600}, @@ -9263,7 +9250,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B), dual I/O read supported */ .voltage = {2700, 3600}, @@ -9310,7 +9296,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */ - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, @@ -9357,7 +9342,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */ - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, @@ -9405,7 +9389,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */ - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, @@ -11383,7 +11366,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_N25Q, /* TODO: config, lock, flag regs */ - .unlock = SPI_DISABLE_BLOCKPROTECT_N25Q, /* TODO: per 64kB sector lock registers */ .write = SPI_CHIP_WRITE256, /* Multi I/O supported */ .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1700, 2000}, @@ -11428,7 +11410,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_N25Q, /* TODO: config, lock, flag regs */ - .unlock = SPI_DISABLE_BLOCKPROTECT_N25Q, /* TODO: per 64kB sector lock registers */ .write = SPI_CHIP_WRITE256, /* Multi I/O supported */ .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, @@ -11473,7 +11454,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_N25Q, /* TODO: config, lock, flag regs */ - .unlock = SPI_DISABLE_BLOCKPROTECT_N25Q, /* TODO: per 64kB sector lock registers */ .write = SPI_CHIP_WRITE256, /* Multi I/O supported */ .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1700, 2000}, @@ -11518,7 +11498,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_N25Q, /* TODO: config, lock, flag regs */ - .unlock = SPI_DISABLE_BLOCKPROTECT_N25Q, /* TODO: per 64kB sector lock registers */ .write = SPI_CHIP_WRITE256, /* Multi I/O supported */ .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, @@ -12168,7 +12147,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_N25Q, /* TODO: config, lock, flag regs */ - .unlock = SPI_DISABLE_BLOCKPROTECT_N25Q, /* TODO: per 64kB sector lock registers */ .write = SPI_CHIP_WRITE256, /* Multi I/O supported */ .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, @@ -16491,7 +16469,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_SRWD, - .unlock = SPI_DISABLE_BLOCKPROTECT_BP2_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, @@ -16985,7 +16962,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, - .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, @@ -17609,7 +17585,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -17658,7 +17633,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -17708,7 +17682,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1650, 1950}, @@ -17756,7 +17729,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1650, 1950}, @@ -17927,7 +17899,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -17982,7 +17953,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -18037,7 +18007,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -18139,7 +18108,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1700, 1950}, @@ -18189,7 +18157,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -18240,7 +18207,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -18292,7 +18258,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -18343,7 +18308,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ @@ -18394,7 +18358,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ @@ -18446,7 +18409,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ @@ -18498,7 +18460,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_TB_BPL, - .unlock = SPI_DISABLE_BLOCKPROTECT_BP2_SRWD, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1700, 1950}, @@ -18715,7 +18676,6 @@ .block_erase = SPI_BLOCK_ERASE_C7, } }, - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1650, 1950}, @@ -18765,7 +18725,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -18816,7 +18775,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -18907,7 +18865,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ @@ -18957,7 +18914,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ @@ -20290,7 +20246,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, @@ -20382,7 +20337,6 @@ } }, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ - .unlock = SPI_DISABLE_BLOCKPROTECT, .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {2700, 3600}, -- To view, visit https://review.coreboot.org/c/flashrom/+/73714 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib24e91b28cb3d87ba74019e23f88209b95a21c5d Gerrit-Change-Number: 73714 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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[M] Change in flashrom[master]: tree/: Convert unlock func ptr into enumerate values
by Edward O'Callaghan (Code Review) 14 Mar '23

14 Mar '23

Attention is currently required from: Edward O'Callaghan, Angel Pons, Liam Flaherty. Hello Felix Singer, build bot (Jenkins), Angel Pons, Liam Flaherty, Anastasia Klimchuk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/69933 to look at the new patch set (#5). Change subject: tree/: Convert unlock func ptr into enumerate values ...................................................................... tree/: Convert unlock func ptr into enumerate values By converting the blockprotect unlock function pointer within the flashchip struct into enum values allows for the flashchips db to be turn into pure, declarative data. A nice side-effect of this is to reduce link-time symbol space of chipdrivers and increase modularity of the spi25_statusreg.c and related implementations. BUG=none TEST=ninja test. Change-Id: Ie5c5db1b09d07e1a549990d6f5a622fae4c83233 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M 82802ab.c M flashrom.c M include/chipdrivers.h M include/flash.h M printlock.c M spi25_statusreg.c M tests/chip.c M tests/chip_wp.c 8 files changed, 150 insertions(+), 74 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/33/69933/5 -- To view, visit https://review.coreboot.org/c/flashrom/+/69933 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie5c5db1b09d07e1a549990d6f5a622fae4c83233 Gerrit-Change-Number: 69933 Gerrit-PatchSet: 5 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Liam Flaherty <liamflaherty(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Liam Flaherty <liamflaherty(a)chromium.org> Gerrit-MessageType: newpatchset

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[S] Change in flashrom[master]: meson_cross: Introduce meson cross file for DJGPP/DOS
by Thomas Heijligen (Code Review) 13 Mar '23

13 Mar '23

Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73439 ) Change subject: meson_cross: Introduce meson cross file for DJGPP/DOS ...................................................................... Patch Set 3: (1 comment) File meson_cross/i586_djgpp_dos.txt: https://review.coreboot.org/c/flashrom/+/73439/comment/a02d823b_3b87f958 PS3, Line 22: gnu99 > are gnu extensions actually needed or can one consider just std c99 ? TL;DR: yes. Flashrom needs some gnu extensions. For all other platforms they are handled in `meson.build` using `add_project_argument()` to make the required symbols visible. This method is not working with DJGPP. Or at least I couldn't get it to work. -- To view, visit https://review.coreboot.org/c/flashrom/+/73439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iabda73942c1e64cd46604c78533982374f78e1a4 Gerrit-Change-Number: 73439 Gerrit-PatchSet: 3 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 13 Mar 2023 10:31:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: fmap: ignore areas with zero size
by Edward O'Callaghan (Code Review) 13 Mar '23

13 Mar '23

Attention is currently required from: Peter Marheine. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73571 ) Change subject: fmap: ignore areas with zero size ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/73571 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie20971f779acece7a0b3b8f38796fff128ce689a Gerrit-Change-Number: 73571 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Mon, 13 Mar 2023 06:03:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: MAINTAINERS: Add Nikolai Artemiev for raiden_debug_spi
by Anastasia Klimchuk (Code Review) 13 Mar '23

13 Mar '23

Attention is currently required from: Felix Singer, Nikolai Artemiev. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73697 ) Change subject: MAINTAINERS: Add Nikolai Artemiev for raiden_debug_spi ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/73697 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie70eafb301b3363caa8e670b67a16cd25c7e15a8 Gerrit-Change-Number: 73697 Gerrit-PatchSet: 3 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Mon, 13 Mar 2023 03:35:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: MAINTAINERS: Add Nikolai Artemiev for raiden_debug_spi
by Edward O'Callaghan (Code Review) 13 Mar '23

13 Mar '23

Attention is currently required from: Felix Singer, Nikolai Artemiev, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73697 ) Change subject: MAINTAINERS: Add Nikolai Artemiev for raiden_debug_spi ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/73697 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie70eafb301b3363caa8e670b67a16cd25c7e15a8 Gerrit-Change-Number: 73697 Gerrit-PatchSet: 3 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Mon, 13 Mar 2023 02:46:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: MAINTAINERS: Add Nikolai Artemiev for raiden_debug_spi
by Nikolai Artemiev (Code Review) 13 Mar '23

13 Mar '23

Attention is currently required from: Felix Singer, Anastasia Klimchuk. Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/73697 ) Change subject: MAINTAINERS: Add Nikolai Artemiev for raiden_debug_spi ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/73697/comment/0402e6fe_1df0dec9 PS2, Line 7: maintainer > Add Nikolai Artemiev for raiden_debug_spi Done File MAINTAINERS: https://review.coreboot.org/c/flashrom/+/73697/comment/8a6337a2_76f89432 PS2, Line 157: RAIDEN DEBUG SPI > We keep it in abc order, so this one should go between Linux mtd and Stlink. […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/73697 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie70eafb301b3363caa8e670b67a16cd25c7e15a8 Gerrit-Change-Number: 73697 Gerrit-PatchSet: 3 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Mon, 13 Mar 2023 02:32:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: MAINTAINERS: Add Nikolai Artemiev for raiden_debug_spi
by Nikolai Artemiev (Code Review) 13 Mar '23

13 Mar '23

Attention is currently required from: Felix Singer, Nikolai Artemiev. Hello Felix Singer, build bot (Jenkins), Anastasia Klimchuk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/73697 to look at the new patch set (#3). Change subject: MAINTAINERS: Add Nikolai Artemiev for raiden_debug_spi ...................................................................... MAINTAINERS: Add Nikolai Artemiev for raiden_debug_spi BUG=none BRANCH=none TEST=none Change-Id: Ie70eafb301b3363caa8e670b67a16cd25c7e15a8 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M MAINTAINERS 1 file changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/97/73697/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/73697 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie70eafb301b3363caa8e670b67a16cd25c7e15a8 Gerrit-Change-Number: 73697 Gerrit-PatchSet: 3 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: newpatchset

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