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Hello Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Verified+1 by build bot (Jenkins)
Change subject: flashchips: Add support for MXIC MX25U25643G
......................................................................
flashchips: Add support for MXIC MX25U25643G
It is similar to the MX25U25635F and shares its RDID.
Tested by ch341a programmer : read, write and erase.
Datasheet is available at the following URL:
https://www.mxic.com.tw/en-us/products/NOR-Flash/Serial-NOR-Flash/Pages/spe…
Change-Id: Id6c4254a02800f04c091009d19a628435fc20fce
Signed-off-by: xianzheng <xianzheng(a)mxic.com.cn>
---
M flashchips.c
M include/flashchips.h
2 files changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/27/78027/2
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Gerrit-Change-Number: 78027
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Hello Anastasia Klimchuk, Nikolai Artemiev, Sergii Dmytruk, Stefan Reinauer, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Verified+1 by build bot (Jenkins)
Change subject: flashchips: add WP features for W25X* analogous to tested W25X20
......................................................................
flashchips: add WP features for W25X* analogous to tested W25X20
These chips were not tested physically, just added since they are very similar to
just added and tested W25X20.
However basic logic test were done via running
--wp-list with dummy emulating those IDs
While there are per-chip datasheets like
https://www.winbond.com/resource-files/W25X05CL_G%2008012019.pdf
the combined datasheets that shows differences between WP modes
of different chips are more useful:
https://www.winbond.com/resource-files/w25x10a-20a-40a-80a%20revf%20080709.…https://media.digikey.com/pdf/data%20sheets/winbond%20pdfs/w25x16,16a,32,64…
Signed-off-by: Vasily Galkin <galkin-vv(a)ya.ru>
Change-Id: Ie69660a6f69e3cac31c5565792f401e69d43f8b8
---
M flashchips.c
1 file changed, 50 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/31/77531/4
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Name of user not set #1005084 has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/78027?usp=email )
Change subject: flashchips: Add support for MXIC MX25U25643G
......................................................................
flashchips: Add support for MXIC MX25U25643G
It is similar to the MX25U25635F and shares its RDID.
Tested by ch341a programmer : read, write and erase.
Datasheet is available at the following URL:
https://www.mxic.com.tw/en-us/products/NOR-Flash/Serial-NOR-Flash/Pages/spe…
Change-Id: Id6c4254a02800f04c091009d19a628435fc20fce
Signed-off-by: xianzheng <xianzheng(a)mxic.com.cn>
---
M flashchips.c
M include/flashchips.h
2 files changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/27/78027/1
diff --git a/flashchips.c b/flashchips.c
index ce68e95..05c6d43 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -1,6 +1,7 @@
/*
* This file is part of the flashrom project.
*
+ * jennifer add 20230920
* Copyright (C) 2000 Silicon Integrated System Corporation
* Copyright (C) 2004 Tyan Corp
* Copyright (C) 2005-2008 coresystems GmbH <stepan(a)openbios.org>
@@ -10207,7 +10208,7 @@
{
.vendor = "Macronix",
- .name = "MX25U25635F",
+ .name = "MX25U25635F/MX25U25643G",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25U25635F,
diff --git a/include/flashchips.h b/include/flashchips.h
index 6e191eb..dbe7cdb 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -529,7 +529,7 @@
#define MACRONIX_MX25U3235E 0x2536 /* Same as MX25U6435F */
#define MACRONIX_MX25U6435E 0x2537 /* Same as MX25U6435F */
#define MACRONIX_MX25U12835E 0x2538 /* Same as MX25U12835F */
-#define MACRONIX_MX25U25635F 0x2539
+#define MACRONIX_MX25U25635F 0x2539 /* Same as MX25U25643G */
#define MACRONIX_MX25U51245G 0x253a
#define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */
#define MACRONIX_MX25L6495F 0x9517
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Scott Chao has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/77887?usp=email )
Change subject: flashrom_tester: Align WP output format with upstream
......................................................................
Patch Set 2: Code-Review+1
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Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63516?usp=email )
Change subject: flashchips: Add support for XMC XM25QH80B
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/63516/comment/cbba4c15_f51c4cb6 :
PS3, Line 20776: SPI_PRETTYPRINT_STATUS_REGISTER_BP2_SRWD
> I am not entirely sure about this one, we have 4 different functions to prettyprint with BP2 and it […]
This function is correct, it matches the chip's status register contents.
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Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/77531?usp=email )
Change subject: flashchips: add WP features for W25X* analogous to tested W25X20
......................................................................
Patch Set 3:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/77531/comment/73b7fae6_54a4d378 :
PS3, Line 19730: .decode_range = DECODE_RANGE_SPI25,
This chip seems to have unusual ranges, does DECODE_RANGE_SPI25 decode them correctly?
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Hello Edward O'Callaghan, Nikolai Artemiev, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/77999?usp=email
to look at the new patch set (#2).
Change subject: raiden: Support target index with generic REQ_ENABLE
......................................................................
raiden: Support target index with generic REQ_ENABLE
Some devices such as the GSC knows how it is wired to AP and EC flash
chips, and can be told which specific device to talk to. Other devices
such as Servo Micro and HyperDebug are generic, and do not know how they
are wired, the caller is responsible for first configure the appropriate
MUXes or buffers, and then tell the debugger which port to use (Servo
Micro has just one SPI port, HyperDebug is the first that has multiple).
The Raiden protocol allows both the cases of USB devices knowing their
wiring and not.
If I were to declare the protocol in Rust, this is how the information
of the Raiden protocol "enable request" would be encoded:
```
enum {
EnableGeneric(u8),
EnableAp,
EnableEc,
...
}
```
The first label `EnableGeneric(u8)` is to be used with HyperDebug that
does not know how its ports are wired, and allow access by index.
The other labels `EnableAp` and `EnableEc` are to be used with the GSC.
The actual transmission of the enum above uses the bRequest and low byte
of wValue of a USB control request, but that is a detail and not
conceptually important.
Until now, `-p raiden_debug_spi:target=AP` or `...:target=EC` could be
used to make flashrom use `EnableAp` or `EnableEc`, and if neither was
given, it would default to `EnableGeneric`, which now that wValue is
used means `EnableGeneric(0)`.
I find it rather straight-forward, that `-p raiden_debug_spi:target=1`,
`...:target=2`, etc. should translate to `EnableGeneric(1)`, etc.
This CL archieves this, by encoding the parameter to `EnableGeneric` as
the second byte of the request_enable integer value.
TEST=run flashrom with HyperDebug
Signed-off-by: Jes B. Klinke <jbk(a)chromium.org>
Change-Id: I03bf4f3210186fb5937b42e298761907b03e08b7
---
M raiden_debug_spi.c
1 file changed, 10 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/99/77999/2
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Jes Klinke has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/77999?usp=email )
Change subject: raiden: Support target index with generic REQ_ENABLE
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
This is a copy of: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/…
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Jes Klinke has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/77999?usp=email )
Change subject: raiden: Support target index with generic REQ_ENABLE
......................................................................
raiden: Support target index with generic REQ_ENABLE
Some devices such as the GSC knows how it is wired to AP and EC flash
chips, and can be told which specific device to talk to. Other devices
such as Servo Micro and HyperDebug are generic, and do not know how they
are wired, the caller is responsible for first configure the appropriate
MUXes or buffers, and then tell the debugger which port to use (Servo
Micro has just one SPI port, HyperDebug is the first that has multiple).
The Raiden protocol allows both the cases of USB devices knowing their
wiring and not.
If I were to declare the protocol in Rust, this is how the information
of the "enable request" would be encoded:
```
enum {
EnableGeneric(u8),
EnableAp,
EnableEc,
...
}
```
The first label `EnableGeneric(u8)` is to be used with HyperDebug that
does not know how its ports are wired, and allow access by index.
The other labels `EnableAp` and `EnableEc` are to be used with the GSC.
The actual transmission of the enum above uses the bRequest and low byte
of wValue of a USB control request, but that is a detail and not
conceptually important.
Until now, `target=AP` or `target=EC` could be used to make flashrom use
`EnableAp` or `EnableEc`, and if neither was given, it would default to
`EnableGeneric`, which now that wValue is used means `EnableGeneric(0)`.
I find it rather straight-forward, that `target=1`, `target=2`,
etc. should translate to `EnableGeneric(1)`, etc.
This CL archieves this, by encoding the parameter to `EnableGeneric` as
the second byte of the request_enable integer value.
TEST=run flashrom with HyperDebug
Signed-off-by: Jes B. Klinke <jbk(a)chromium.org>
Change-Id: I03bf4f3210186fb5937b42e298761907b03e08b7
---
M raiden_debug_spi.c
1 file changed, 10 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/99/77999/1
diff --git a/raiden_debug_spi.c b/raiden_debug_spi.c
index c5642ff..4f2e35b 100644
--- a/raiden_debug_spi.c
+++ b/raiden_debug_spi.c
@@ -1460,7 +1460,11 @@
char *target_str = extract_programmer_param_str(cfg, "target");
if (target_str) {
- if (!strcasecmp(target_str, "ap"))
+ char *endptr;
+ int index = strtol(target_str, &endptr, 0);
+ if (*target_str && !*endptr && index >= 0 && index < 256) {
+ request_enable = RAIDEN_DEBUG_SPI_REQ_ENABLE | (index << 8);
+ } else if (!strcasecmp(target_str, "ap"))
request_enable = get_ap_request_type(cfg);
else if (!strcasecmp(target_str, "ec"))
request_enable = RAIDEN_DEBUG_SPI_REQ_ENABLE_EC;
@@ -1470,7 +1474,9 @@
}
}
free(target_str);
- msg_pinfo("Raiden target: %d\n", request_enable);
+ if (request_enable >= 0)
+ msg_pinfo("Raiden target: %d,%d\n",
+ request_enable & 0xFF, (request_enable >> 8) & 0xFF);
return request_enable;
}
@@ -1587,8 +1593,8 @@
LIBUSB_ENDPOINT_OUT |
LIBUSB_REQUEST_TYPE_VENDOR |
LIBUSB_RECIPIENT_INTERFACE,
- request_enable,
- 0,
+ request_enable & 0xFF,
+ (request_enable >> 8) & 0xFF,
device->interface_descriptor->bInterfaceNumber,
NULL,
0,
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