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[XS] Change in flashrom[main]: erasure_layout: Add region boundaries to printed info message
by Aarya (Code Review) 21 Oct '23

21 Oct '23

Attention is currently required from: Anastasia Klimchuk. Aarya has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/78492?usp=email ) Change subject: erasure_layout: Add region boundaries to printed info message ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/78492?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I511a79754cff15e7dba26f5313d7015830780f60 Gerrit-Change-Number: 78492 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Sat, 21 Oct 2023 10:52:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in flashrom[main]: erasure_layout: Add region boundaries to printed info message
by Anastasia Klimchuk (Code Review) 21 Oct '23

21 Oct '23

Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/78492?usp=email ) Change subject: erasure_layout: Add region boundaries to printed info message ...................................................................... erasure_layout: Add region boundaries to printed info message Change-Id: I511a79754cff15e7dba26f5313d7015830780f60 Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> --- M erasure_layout.c 1 file changed, 4 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/92/78492/1 diff --git a/erasure_layout.c b/erasure_layout.c index f360653..d166d50 100644 --- a/erasure_layout.c +++ b/erasure_layout.c @@ -174,11 +174,13 @@ } if (start_diff) { - msg_cinfo("Region start not sector aligned! Extending start boundaries...\n"); + msg_cinfo("Region start 0x%08x not sector aligned! Extending start boundaries by 0x%08x.\n", + *region_start, start_diff); *region_start = *region_start - start_diff; } if (end_diff) { - msg_cinfo("Region end not sector aligned! Extending end boundaries...\n"); + msg_cinfo("Region end 0x%08x not sector aligned! Extending end boundaries by 0x%08x.\n", + *region_end, end_diff); *region_end = *region_end + end_diff; } } -- To view, visit https://review.coreboot.org/c/flashrom/+/78492?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I511a79754cff15e7dba26f5313d7015830780f60 Gerrit-Change-Number: 78492 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newchange

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[XS] Change in flashrom[main]: flashchips: Mark FM25F01 as tested for read/write/probe/erase
by Anastasia Klimchuk (Code Review) 20 Oct '23

20 Oct '23

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/78397?usp=email ) Change subject: flashchips: Mark FM25F01 as tested for read/write/probe/erase ...................................................................... flashchips: Mark FM25F01 as tested for read/write/probe/erase As reported on the mailing list: https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/thread/JSCQ… Change-Id: Ibb65a4cb3345eb67c049aa4d8bfd3260f4bf96db Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/78397 Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M flashchips.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Edward O'Callaghan: Looks good to me, approved build bot (Jenkins): Verified diff --git a/flashchips.c b/flashchips.c index e156ffb..9210de2 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6042,7 +6042,7 @@ .page_size = 256, /* OTP: 256B total; enter 0x3A */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, .block_erasers = { -- To view, visit https://review.coreboot.org/c/flashrom/+/78397?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ibb65a4cb3345eb67c049aa4d8bfd3260f4bf96db Gerrit-Change-Number: 78397 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[main]: erasure_layout: Fix double invocation of erasers
by Peter Marheine (Code Review) 20 Oct '23

20 Oct '23

Attention is currently required from: Aarya, Alexander Goncharov, Anastasia Klimchuk, Sam McNally. Peter Marheine has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/77747?usp=email ) Change subject: erasure_layout: Fix double invocation of erasers ...................................................................... Patch Set 4: (1 comment) Patchset: PS2: > I did some more investigation and traced when this double-erase started: […] I agree that the new condition seems unnecessary, since it duplicates the loop's termination condition and we know the loop terminates. The block at line 245 should simply be deleted. -- To view, visit https://review.coreboot.org/c/flashrom/+/77747?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I92351eba0fd29114ce98b4a839358e92d176af28 Gerrit-Change-Number: 77747 Gerrit-PatchSet: 4 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Peter Marheine <pmarheine(a)chromium.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Fri, 20 Oct 2023 04:59:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aarya <aarya.chaumal(a)gmail.com> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[L] Change in flashrom[main]: tests: Unit tests for erase function selection algo
by Peter Marheine (Code Review) 20 Oct '23

20 Oct '23

Attention is currently required from: Aarya, Anastasia Klimchuk, Edward O'Callaghan, Nikolai Artemiev, Simon Buhrow, Thomas Heijligen. Peter Marheine has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67535?usp=email ) Change subject: tests: Unit tests for erase function selection algo ...................................................................... Patch Set 14: (2 comments) File tests/erase_func_algo.c: https://review.coreboot.org/c/flashrom/+/67535/comment/ae68dff3_9bb37321 : PS3, Line 238: void **state > I found something in cmocka docs, around this page https://api.cmocka.org/group__cmocka__exec. […] I think it's worth doing that, but you don't need to expose much detail. If you call `_cmocka_run_group_tests`, then you need to be given a list of test cases which can be allocated in any way desired. It would also be useful to make each test case in `g_state` its own actual test case so it's easier to read the results rather than lumping a bunch of test cases into one test. To that end, I imagine providing a function that returns a bunch of test cases: ``` static const struct test_case { // ... } test_cases[] = { // ... }; struct test_state { uint8_t chip_contents[1024]; const struct test_case *test_case; }; static int setup(void **state) { const struct test_case *test_case = *state; *state = malloc(sizeof(struct test_state)); state->test_case = test_case; // Initialize other test state as desired return 0; } static int teardown(void **state) { free(*state); return 0; } const CMUnitTest *get_erase_func_algo_tests(size_t *num_tests) { CMUnitTest *out = calloc(ARRAY_SIZE(test_cases), sizeof(*test_cases)); for (size_t i = 0; i < ARRAY_SIZE(test_cases); i++) { out[i] = (CMUnitTest){ .setup_func = setup, .teardown_func = teardown, .initial_state = &test_cases[i], .test_func = run_erase_and_verify, }; } *num_tests = ARRAY_SIZE(test_cases); return out; } ``` Then in main run those test cases: ``` size_t n_erase_tests; const CMUnitTest *erase_tests = get_erase_func_algo_tests(&n_erase_tests); _cmocka_run_group_tests("erase stuff", erase_tests, n_erase_tests, NULL, NULL); ``` File tests/erase_func_algo.c: https://review.coreboot.org/c/flashrom/+/67535/comment/6afc7c8c_9753c252 : PS14, Line 61: struct test_case test_cases[TEST_CASES_NUM]; /* Data for running tests. */ I'd prefer to make this a `const struct test_case *` just to capture that the test case data is immutable, but then it seems even be better to replace `ind` with a pointer to a const `test_case` so functions that receive test state don't have access to irrelevant data (and the only place the table of test cases needs to be wrangled is in the functions that iterate over them to generate each test case). -- To view, visit https://review.coreboot.org/c/flashrom/+/67535?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I8f3fdefb76e71f6f8dc295d9dead5f38642aace7 Gerrit-Change-Number: 67535 Gerrit-PatchSet: 14 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Simon Buhrow Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alexander Goncharov <chat(a)joursoir.net> Gerrit-CC: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-CC: Peter Marheine <pmarheine(a)chromium.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Simon Buhrow Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Fri, 20 Oct 2023 02:55:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[XS] Change in flashrom[main]: flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry
by Hsuan-ting Chen (Code Review) 19 Oct '23

19 Oct '23

Attention is currently required from: Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer. Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/78348?usp=email ) Change subject: flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry ...................................................................... Patch Set 2: (5 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/78348/comment/3734bd01_fb32eaa1 : PS1, Line 9: Q128E and Q127C/Q128C have compatible main functions, their differences : are > Do you have a link to datasheet? Thank you! https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-0… (added to the comment) https://review.coreboot.org/c/flashrom/+/78348/comment/7340a796_43437544 : PS1, Line 31: flashrom_tester with flashrom binary could pass with Q128E > Which specifically flashrom commands did that run? Probe/read/write/erase/write-protect ? Yes, all of them are tested. Updated. File flashchips.c: https://review.coreboot.org/c/flashrom/+/78348/comment/eb066b2c_3f4f3b96 : PS1, Line 6802: /* FIXME: 128E's OTP: 3072B total and doesn't support QPI */ > QPI part of this might be an issue. […] I have two questions about these: 1. According to the [GD25Q128C datasheet](https://www.endrich.com/sixcms/media.php/2/GD25Q128C-Rev2.pdf) page 8, GD25Q128C has QPI, [GD25Q127C datasheet](https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00220-GD25Q127C-Rev2.3.pdf) page 4, GD25Q127C doesn't has QPI. So the best solution might be: separate to "GD25Q128C" and "GD25Q127C/GD25Q128E" instead? (And I think there was already some discussion about it: https://review.coreboot.org/c/flashrom/+/52883/2/flashchips.c#6274) 2. Could you help me understand what will happen if there are 3 different chip entries? Will we always get the very first match with `flashrom --flash-name`? https://review.coreboot.org/c/flashrom/+/78348/comment/f2cad5c8_c6f3c61d : PS1, Line 6833: .reg_bits = : { : .srp = {STATUS1, 7, RW}, : .srl = {STATUS2, 0, RW}, : .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}}, : .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */ : .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */ : .cmp = {STATUS2, 6, RW}, : } > Are all these registers the same for new chip you are adding Yes, they are exactly the same, based on the datasheet. > and have you tested write-protect operations? (current chip definition marks write-protect as tested). Yes, we've tested. File include/flashchips.h: https://review.coreboot.org/c/flashrom/+/78348/comment/09fd21c0_3e337dc0 : PS1, Line 393: Same as GD25Q128B, GD25B128B, GD25Q127C, and GD25Q128E, can be distinguished by SFDP > With this patch, the same model id GIGADEVICE_GD25Q128 will be used for 5 different chips, used to b […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/78348?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I3300671b1cf74b3ea0469b9c5a833489ab4914f5 Gerrit-Change-Number: 78348 Gerrit-PatchSet: 2 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Thu, 19 Oct 2023 10:56:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[XS] Change in flashrom[main]: flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry
by Hsuan-ting Chen (Code Review) 19 Oct '23

19 Oct '23

Attention is currently required from: Hsuan-ting Chen, Nikolai Artemiev, Stefan Reinauer. Hello Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/78348?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry ...................................................................... flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry Datasheet for Q128E: https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-0… Q128E and Q127C/Q128C have compatible main functions, their differences are: * Q128E uses 55 nm process, while Q127C/Q128C use 65nm * Q128E does not support QPI * Q128E have OTP: 3072B, while Q127C/Q128C are 1536B * Q128E's fast read clock frequency is 133MHz, while Q127C/Q128C are 104MHZ We also tested that Q128E could pass flashrom_tester while probing it as 127C/128C, so the main functionalities are compatible. Change the chip name from GD25Q127C/GD25Q128C to GD25Q127C/GD25Q128C/GD25Q128E to make it more accurate. Chip revision history: - The 'GD25Q127C/GD25Q128C' definition was added in `commit e0c7abf219b81ad049d09a4671ebc9196153d308` as 'GD25Q128C' and later renamed to 'GD25Q127C/GD25Q128C' BUG=b:304863141, b:293545382 BRANCH=none TEST=flashrom_tester with flashrom binary could pass with Q128E, which contains probe, read, write, erase, and write protect Signed-off-by: Hsuan Ting Chen <roccochen(a)google.com> Change-Id: I3300671b1cf74b3ea0469b9c5a833489ab4914f5 --- M flashchips.c M include/flashchips.h 2 files changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/48/78348/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/78348?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I3300671b1cf74b3ea0469b9c5a833489ab4914f5 Gerrit-Change-Number: 78348 Gerrit-PatchSet: 2 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: newpatchset

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[XS] Change in flashrom[main]: flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry
by Hsuan-ting Chen (Code Review) 19 Oct '23

19 Oct '23

Hsuan-ting Chen has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/78505?usp=email ) Change subject: flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry ...................................................................... Abandoned Duplicate of 78348 -- To view, visit https://review.coreboot.org/c/flashrom/+/78505?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I5ab797bfa8f08e54cb29ed2d82eeef6604ac944d Gerrit-Change-Number: 78505 Gerrit-PatchSet: 1 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: abandon

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[XS] Change in flashrom[main]: flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry
by Hsuan-ting Chen (Code Review) 19 Oct '23

19 Oct '23

Hsuan-ting Chen has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/78505?usp=email ) Change subject: flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry ...................................................................... flashchips: Add GD25Q128E name to the GD25Q127C/GD25Q128C entry Datasheet for Q128E: https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-0… Q128E and Q127C/Q128C have compatible main functions, their differences are: * Q128E uses 55 nm process, while Q127C/Q128C use 65nm * Q128E does not support QPI * Q128E have OTP: 3072B, while Q127C/Q128C are 1536B * Q128E's fast read clock frequency is 133MHz, while Q127C/Q128C are 104MHZ We also tested that Q128E could pass flashrom_tester while probing it as 127C/128C, so the main functionalities are compatible. Change the chip name from GD25Q127C/GD25Q128C to GD25Q127C/GD25Q128C/GD25Q128E to make it more accurate. Chip revision history: - The 'GD25Q127C/GD25Q128C' definition was added in `commit e0c7abf219b81ad049d09a4671ebc9196153d308` as 'GD25Q128C' and later renamed to 'GD25Q127C/GD25Q128C' BUG=b:304863141, b:293545382 BRANCH=none TEST=flashrom_tester with flashrom binary could pass with Q128E, which contains probe, read, write, erase, and write protect Signed-off-by: Hsuan Ting Chen <roccochen(a)google.com> Change-Id: I5ab797bfa8f08e54cb29ed2d82eeef6604ac944d --- M flashchips.c M include/flashchips.h 2 files changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/78505/1 diff --git a/flashchips.c b/flashchips.c index e156ffb..3b73ba9 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6792,13 +6792,14 @@ { .vendor = "GigaDevice", - .name = "GD25Q127C/GD25Q128C", + .name = "GD25Q127C/GD25Q128C/GD25Q128E", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q128, .total_size = 16384, .page_size = 256, /* OTP: 1536B total; read 0x48; write 0x42, erase 0x44 */ + /* FIXME: 128E's OTP: 3072B total and doesn't support QPI */ /* QPI: enable 0x38, disable 0xFF */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_WRSR2, .tested = TEST_OK_PREWB, diff --git a/include/flashchips.h b/include/flashchips.h index 962e65e..fa518c1 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -390,7 +390,7 @@ #define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B (which has OTP) */ #define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ -#define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */ +#define GIGADEVICE_GD25Q128 0x4018 /* Same as GD25Q128B, GD25Q127C, GD25Q128C, and GD25Q128E, can be distinguished by SFDP */ #define GIGADEVICE_GD25Q256D 0x4019 #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ -- To view, visit https://review.coreboot.org/c/flashrom/+/78505?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I5ab797bfa8f08e54cb29ed2d82eeef6604ac944d Gerrit-Change-Number: 78505 Gerrit-PatchSet: 1 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-MessageType: newchange

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[M] Change in flashrom[main]: ichspi: Add support for C740 PCH
by Anastasia Klimchuk (Code Review) 17 Oct '23

17 Oct '23

Attention is currently required from: David Hendricks, Kyösti Mälkki, Patrick Georgi, Patrick Rudolph, Patrick Rudolph. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/78186?usp=email ) Change subject: ichspi: Add support for C740 PCH ...................................................................... Patch Set 5: Code-Review+2 (1 comment) File ich_descriptors.c: https://review.coreboot.org/c/flashrom/+/78186/comment/b5ea4a51_c1932956 : PS4, Line 490: to be compatible with 500 Series PCH below > Updated to code to make it more clear that nm=5 should be used and why it should be used. Done -- To view, visit https://review.coreboot.org/c/flashrom/+/78186?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I80eebc0fcc14de9df823aceaee77870ad136f94a Gerrit-Change-Number: 78186 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <rudolphpatrick05(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <rudolphpatrick05(a)gmail.com> Gerrit-Comment-Date: Tue, 17 Oct 2023 08:30:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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