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[S] Change in flashrom[main]: flashchips: Add support for Boya BY25D40
by Dmitry Mikushin (Code Review) 01 Apr '24

01 Apr '24

Attention is currently required from: Anastasia Klimchuk, Dmitry Mikushin, Nikolai Artemiev, Stefan Reinauer. Hello Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/81604?usp=email to look at the new patch set (#2). Change subject: flashchips: Add support for Boya BY25D40 ...................................................................... flashchips: Add support for Boya BY25D40 Read tested on YW500U3M industrial camera Change-Id: I2b34090822370667640bffb291e8d56493d0da00 Signed-off-by: Dmitry Mikushin <dmitry(a)kernelgen.org> --- M flashchips.c M include/flashchips.h 2 files changed, 41 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/04/81604/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/81604?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I2b34090822370667640bffb291e8d56493d0da00 Gerrit-Change-Number: 81604 Gerrit-PatchSet: 2 Gerrit-Owner: Dmitry Mikushin <dmitry(a)kernelgen.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Dmitry Mikushin <dmitry(a)kernelgen.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newpatchset

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[S] Change in flashrom[main]: flashchips: Add support for Boya BY25D40
by Dmitry Mikushin (Code Review) 01 Apr '24

01 Apr '24

Dmitry Mikushin has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/81604?usp=email ) Change subject: flashchips: Add support for Boya BY25D40 ...................................................................... flashchips: Add support for Boya BY25D40 Read tested on YW500U3M industrial camera Change-Id: I2b34090822370667640bffb291e8d56493d0da00 --- M flashchips.c M include/flashchips.h 2 files changed, 41 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/04/81604/1 diff --git a/flashchips.c b/flashchips.c index 7a40f07..c88db12 100644 --- a/flashchips.c +++ b/flashchips.c @@ -3569,10 +3569,48 @@ { .vendor = "Boya/BoHong Microelectronics", + .name = "B.25D40", + .bustype = BUS_SPI, + .manufacture_id = BOYA_BOHONG_ID, + .model_id = BOYA_BOHONG_B_25D40, + .total_size = 512, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PR, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_SRWD, + .unlock = SPI_DISABLE_BLOCKPROTECT_BP2_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Boya/BoHong Microelectronics", .name = "B.25D80A", .bustype = BUS_SPI, .manufacture_id = BOYA_BOHONG_ID, - .model_id = BOYA_BOHONG_B__25D80A, + .model_id = BOYA_BOHONG_B_25D80A, .total_size = 1024, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, diff --git a/include/flashchips.h b/include/flashchips.h index 103e6ea..26a52da 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -211,7 +211,8 @@ /* Boya/BoHong Microelectronics Inc. */ #define BOYA_BOHONG_ID 0x68 -#define BOYA_BOHONG_B__25D80A 0x4014 +#define BOYA_BOHONG_B_25D40 0x4013 +#define BOYA_BOHONG_B_25D80A 0x4014 #define BOYA_BOHONG_B_25D16A 0x4015 #define BOYA_BOHONG_B_25Q128AS 0x4018 -- To view, visit https://review.coreboot.org/c/flashrom/+/81604?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I2b34090822370667640bffb291e8d56493d0da00 Gerrit-Change-Number: 81604 Gerrit-PatchSet: 1 Gerrit-Owner: Dmitry Mikushin <dmitry(a)kernelgen.org> Gerrit-MessageType: newchange

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[S] Change in flashrom[main]: flashchips: Add support for Boya BY25D40
by Dmitry Mikushin (Code Review) 01 Apr '24

01 Apr '24

Dmitry Mikushin has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/81603?usp=email ) Change subject: flashchips: Add support for Boya BY25D40 ...................................................................... Abandoned Incomplete patch -- To view, visit https://review.coreboot.org/c/flashrom/+/81603?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I224cbc5e8cc7a89f45d7ecae5c614adb0476c331 Gerrit-Change-Number: 81603 Gerrit-PatchSet: 1 Gerrit-Owner: Dmitry Mikushin <dmitry(a)kernelgen.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in flashrom[main]: flashchips: Add support for Boya BY25D40
by Dmitry Mikushin (Code Review) 01 Apr '24

01 Apr '24

Dmitry Mikushin has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/81603?usp=email ) Change subject: flashchips: Add support for Boya BY25D40 ...................................................................... flashchips: Add support for Boya BY25D40 Read tested on YW500U3M industrial camera Change-Id: I224cbc5e8cc7a89f45d7ecae5c614adb0476c331 --- M flashchips.c 1 file changed, 39 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/03/81603/1 diff --git a/flashchips.c b/flashchips.c index 7a40f07..c88db12 100644 --- a/flashchips.c +++ b/flashchips.c @@ -3569,10 +3569,48 @@ { .vendor = "Boya/BoHong Microelectronics", + .name = "B.25D40", + .bustype = BUS_SPI, + .manufacture_id = BOYA_BOHONG_ID, + .model_id = BOYA_BOHONG_B_25D40, + .total_size = 512, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PR, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_SRWD, + .unlock = SPI_DISABLE_BLOCKPROTECT_BP2_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Boya/BoHong Microelectronics", .name = "B.25D80A", .bustype = BUS_SPI, .manufacture_id = BOYA_BOHONG_ID, - .model_id = BOYA_BOHONG_B__25D80A, + .model_id = BOYA_BOHONG_B_25D80A, .total_size = 1024, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, -- To view, visit https://review.coreboot.org/c/flashrom/+/81603?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I224cbc5e8cc7a89f45d7ecae5c614adb0476c331 Gerrit-Change-Number: 81603 Gerrit-PatchSet: 1 Gerrit-Owner: Dmitry Mikushin <dmitry(a)kernelgen.org> Gerrit-MessageType: newchange

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[S] Change in flashrom[main]: flashchips: Add support for MXIC MX25L3273F
by DZ (Code Review) 31 Mar '24

31 Mar '24

Attention is currently required from: Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer. Hello Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/81562?usp=email to look at the new patch set (#6). Change subject: flashchips: Add support for MXIC MX25L3273F ...................................................................... flashchips: Add support for MXIC MX25L3273F The MX25L3273F has been tested by ch341a programmer : read, write, erase and wp. We have tested --wp-enable, --wp-disable, --wp-list and --wp-range commands for write-protect feature. MX25L3273F datasheet is available at the following URL: https://www.mxic.com.tw/Lists/Datasheet/Attachments/8661/MX25L3273F,%203V,%… Change-Id: I4adaaa796d1db34702e7b0ed8e6fb167a3a5f6d7 Signed-off-by: DanielZhang <danielzhang(a)mxic.com.cn> --- M flashchips.c 1 file changed, 45 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/81562/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/81562?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I4adaaa796d1db34702e7b0ed8e6fb167a3a5f6d7 Gerrit-Change-Number: 81562 Gerrit-PatchSet: 6 Gerrit-Owner: DZ <danielzhang(a)mxic.com.cn> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newpatchset

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[S] Change in flashrom[main]: flashchips: Add support for MXIC MX25L3239E
by DZ (Code Review) 31 Mar '24

31 Mar '24

Attention is currently required from: Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer. Hello Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/81563?usp=email to look at the new patch set (#2). Change subject: flashchips: Add support for MXIC MX25L3239E ...................................................................... flashchips: Add support for MXIC MX25L3239E The MX25L3239E has been tested by ch341a programmer : read, write, erase and wp. We have tested --wp-enable, --wp-disable, --wp-list and --wp-range commands for write-protect feature. MX25L3239E datasheet is available at the following URL: https://www.mxic.com.tw/Lists/Datasheet/Attachments/8613/MX25L3239E,%203V,%… Change-Id: Ic7a848028fe937deb1bf83ef2a9dddf1330334b6 Signed-off-by: DanielZhang <danielzhang(a)mxic.com.cn> --- M flashchips.c M include/flashchips.h 2 files changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/63/81563/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/81563?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ic7a848028fe937deb1bf83ef2a9dddf1330334b6 Gerrit-Change-Number: 81563 Gerrit-PatchSet: 2 Gerrit-Owner: DZ <danielzhang(a)mxic.com.cn> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newpatchset

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[S] Change in flashrom[main]: classic_cli_manpage.rst: Update doc for custom_rst of raiden_debug_spi
by Anastasia Klimchuk (Code Review) 30 Mar '24

30 Mar '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/81114?usp=email ) Change subject: classic_cli_manpage.rst: Update doc for custom_rst of raiden_debug_spi ...................................................................... classic_cli_manpage.rst: Update doc for custom_rst of raiden_debug_spi Update technical details for custom_rst of raiden_debug_spi to help users better understand their configuration options. BUG=b:161745002 BRANCH=none TEST=`meson compile -C testdir` and view ./testdir/doc/html/classic_cli_manpage.html Change-Id: Ie2b084a3ed9bf40f91bfa81dbc95ec69d99d5ad0 Signed-off-by: Hsuan Ting Chen <roccochen(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/81114 Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M doc/classic_cli_manpage.rst 1 file changed, 10 insertions(+), 2 deletions(-) Approvals: Anastasia Klimchuk: Looks good to me, approved build bot (Jenkins): Verified diff --git a/doc/classic_cli_manpage.rst b/doc/classic_cli_manpage.rst index c46edf6..f40d19e 100644 --- a/doc/classic_cli_manpage.rst +++ b/doc/classic_cli_manpage.rst @@ -899,11 +899,19 @@ The servo device serial number can be found via ``lsusb``. Raiden will poll the ``ap`` target waiting for the system power to settle on the AP and EC flash devices. -The optional ``custom_rst=true`` parameter changes the timeout value from 3ms to 10ms:: +The optional ``custom_rst=true`` parameter alters the behavior of the reset process:: flashrom -p raiden_debug_spi:custom_rst=<true|false> -syntax, where ``custom_rst=false`` is the implicit default timeout of 3ms. More information about the ChromiumOS servo +syntax, where: + +``custom_rst=false`` is the implicit default timeout of 3ms + +and ``custom_rst=true`` set ``RAIDEN_DEBUG_SPI_REQ_ENABLE_AP_CUSTOM`` instead of ``RAIDEN_DEBUG_SPI_REQ_ENABLE_AP``. +This custom reset will modify the timeout from 3ms to 10ms and will not set ``EC_RST_L``, meaning neither the EC nor the AP will be reset. With this setting, it's the user's responsibility to manage the reset signal manually or by configuring the GPIO. +Failure to handle the reset signal appropriately will likely result in flashing errors. + +More information about the ChromiumOS servo hardware is available at `servos website <https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/do…>`_. -- To view, visit https://review.coreboot.org/c/flashrom/+/81114?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ie2b084a3ed9bf40f91bfa81dbc95ec69d99d5ad0 Gerrit-Change-Number: 81114 Gerrit-PatchSet: 4 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Hsuan Ting Chen <roccochen(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[main]: erasure_layout: do not copy region buffers if they are null
by Anastasia Klimchuk (Code Review) 30 Mar '24

30 Mar '24

Attention is currently required from: Aarya, Alexander Goncharov, Nikolai Artemiev. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/81548?usp=email ) Change subject: erasure_layout: do not copy region buffers if they are null ...................................................................... Patch Set 1: (1 comment) File erasure_layout.c: https://review.coreboot.org/c/flashrom/+/81548/comment/84d5dcf4_1a0fb98d : PS1, Line 263: old_start_buf = (uint8_t *)malloc(old_start - region_start); : if (!old_start_buf) { : msg_cerr("Not enough memory!\n"); : ret = -1; : goto _end; : } : old_end_buf = (uint8_t *)malloc(region_end - old_end); : if (!old_end_buf) { : msg_cerr("Not enough memory!\n"); : ret = -1; : goto _end; : } Oh I think this piece is also somewhat relevant to the patch. I remember looking at this code with suspicion few times, but I always forgot to follow up. Thank you for finding time and cleaning that up! The suspicion I had was that `old_start_buf` and `old_end_buf` are allocated for potentially 0 size (because `old_start - region_start` and `region_end - old_end` are checked later). And when they are 0 size they are not needed! However allocating for 0 size, while not having any practical purpose, probably prevented `memcpy` below (at the `_end` label) from failing, because malloc linux lan page says > If size is 0, then malloc() returns either NULL, or a unique pointer value that can later be successfully passed to free(). So I think this allocation should go under if conditions `if (old_start - region_start)` `if (region_end - old_end)` because otherwise there is nothing to allocate Do you think this can go in the same this patch? -- To view, visit https://review.coreboot.org/c/flashrom/+/81548?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I99aad4119f9c11bea75e3419926cc833bc1f68c5 Gerrit-Change-Number: 81548 Gerrit-PatchSet: 1 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)chromium.org> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Sat, 30 Mar 2024 08:30:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in flashrom[main]: flashchips: Add support for MXIC MX25L12850F
by Anastasia Klimchuk (Code Review) 30 Mar '24

30 Mar '24

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/81350?usp=email ) Change subject: flashchips: Add support for MXIC MX25L12850F ...................................................................... flashchips: Add support for MXIC MX25L12850F The MX25L12850F has been tested by ch341a programmer : read, write, erase and wp. We have tested --wp-enable, --wp-disable, --wp-list and --wp-range commands for write-protect feature. MX25L12850F datasheet is available at the following URL: https://www.macronix.com/Lists/Datasheet/Attachments/8632/MX25L12850F,%203V… Change-Id: I71ac70d273904f94d015401f9d8df587084efad0 Signed-off-by: DanielZhang <danielzhang(a)mxic.com.cn> Reviewed-on: https://review.coreboot.org/c/flashrom/+/81350 Reviewed-by: Alexander Goncharov <chat(a)joursoir.net> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M flashchips.c M include/flashchips.h 2 files changed, 47 insertions(+), 1 deletion(-) Approvals: Alexander Goncharov: Looks good to me, but someone else must approve build bot (Jenkins): Verified Anastasia Klimchuk: Looks good to me, approved diff --git a/flashchips.c b/flashchips.c index 74953d1..7a40f07 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9045,6 +9045,52 @@ { .vendor = "Macronix", + .name = "MX25L12850F", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L12805D, + .total_size = 16384, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP} + }, + + .decode_range = DECODE_RANGE_SPI25, + }, + + { + .vendor = "Macronix", .name = "MX25L1605", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, diff --git a/include/flashchips.h b/include/flashchips.h index 932e458..103e6ea 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -516,7 +516,7 @@ #define MACRONIX_MX25L1605 0x2015 /* MX25L1605 (64k 0x20); MX25V16066 (4k 0x20, 32k 0x52, 64k 0xD8); MX25L1605A/MX25L1606E/MX25L1608E (4k 0x20, 64k 0x52); MX25L1605D/MX25L1608D/MX25L1673E (4k 0x20) */ #define MACRONIX_MX25L3205 0x2016 /* MX25L3205, MX25L3205A (64k 0x20); MX25L3205D/MX25L3208D (4k 0x20); MX25L3206E/MX25L3208E (4k 0x20, 64k 0x52); MX25L3233F/MX25L3273E (4k 0x20, 32k 0x52) */ #define MACRONIX_MX25L6405 0x2017 /* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6408E (4k 0x20); MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E (4k 0x20, 32k 0x52) */ -#define MACRONIX_MX25L12805D 0x2018 /* MX25L12805D (no 32k); MX25L12865E, MX25L12835F, MX25L12845E, MX25L12873F, MX25L12833F (32k 0x52) */ +#define MACRONIX_MX25L12805D 0x2018 /* MX25L12805D (no 32k); MX25L12865E, MX25L12835F, MX25L12845E, MX25L12873F, MX25L12833F, MX25L12850F (32k 0x52) */ #define MACRONIX_MX25L25635F 0x2019 /* Same as MX25L25639F, but the latter seems to not support REMS */ #define MACRONIX_MX25L1635D 0x2415 #define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */ -- To view, visit https://review.coreboot.org/c/flashrom/+/81350?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I71ac70d273904f94d015401f9d8df587084efad0 Gerrit-Change-Number: 81350 Gerrit-PatchSet: 5 Gerrit-Owner: DZ <danielzhang(a)mxic.com.cn> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[main]: flashchips: Add support for MXIC MX25L3239E
by DZ (Code Review) 30 Mar '24

30 Mar '24

DZ has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/81563?usp=email ) Change subject: flashchips: Add support for MXIC MX25L3239E ...................................................................... flashchips: Add support for MXIC MX25L3239E The MX25L3239E has been tested by ch341a programmer : read, write, erase and wp. We have tested --wp-enable, --wp-disable, --wp-list and --wp-range commands for write-protect feature. MX25L12850F datasheet is available at the following URL: https://www.mxic.com.tw/en-us/support/design-support/Pages/technical-docume… Change-Id: Ic7a848028fe937deb1bf83ef2a9dddf1330334b6 Signed-off-by: DanielZhang <danielzhang(a)mxic.com.cn> --- M flashchips.c M include/flashchips.h 2 files changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/63/81563/1 diff --git a/flashchips.c b/flashchips.c index 204f34f..f567855 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9466,6 +9466,54 @@ .decode_range = DECODE_RANGE_SPI25_BIT_CMP, }, + { + .vendor = "Macronix", + .name = "MX25L3239E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L3239E, + .total_size = 4096, + .page_size = 256, + /* OTP: 1024B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_CFGR | FEATURE_SCUR , + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 128} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */ + .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {CONFIG, 3, OTP}, + .wps = {SECURITY, 7, OTP}, /* This bit is set by WPSEL command */ + }, + + .decode_range = DECODE_RANGE_SPI25, + }, + { .vendor = "Macronix", .name = "MX25L3235D", diff --git a/include/flashchips.h b/include/flashchips.h index d0a858b..42a5a52 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -536,6 +536,7 @@ #define MACRONIX_MX25L6495F 0x9517 #define MACRONIX_MX25L3255E 0x9e16 #define MACRONIX_MX77L25650F 0x7519 +#define MACRONIX_MX25L3239E 0x2536 #define MACRONIX_MX25R1635F 0x2815 #define MACRONIX_MX25R3235F 0x2816 -- To view, visit https://review.coreboot.org/c/flashrom/+/81563?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ic7a848028fe937deb1bf83ef2a9dddf1330334b6 Gerrit-Change-Number: 81563 Gerrit-PatchSet: 1 Gerrit-Owner: DZ <danielzhang(a)mxic.com.cn> Gerrit-MessageType: newchange

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