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Change subject: buspirate_spi.c: Refactor singleton states into reentrant pattern
......................................................................
Patch Set 5: Code-Review+1
(1 comment)
File buspirate_spi.c:
https://review.coreboot.org/c/flashrom/+/52958/comment/af0b0ab4_862f1979
PS4, Line 315: int buspirate_spi_init(void)
> I agree it is large. Also I agree this is out of scope for this commit. […]
It's ok. I mean if you get time please follow up splitting the function up please as I think it will unroll out all the clean up path complexity.
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Change subject: bitbang_spi.c: fix bitbang_spi_send_command to make the delay symmetric
......................................................................
Patch Set 25: Code-Review-1
(1 comment)
Patchset:
PS25:
> Edward, have you seen Nico's comments on CB:49255 yet?
Also CB:49264
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Change subject: bitbang_spi.c: fix bitbang_spi_send_command to make the delay symmetric
......................................................................
Patch Set 25:
(1 comment)
Patchset:
PS25:
Edward, have you seen Nico's comments on CB:49255 yet?
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Change subject: bitbang_spi.c: fix spi sequence in time and rename
......................................................................
Patch Set 16: Code-Review-1
(1 comment)
Patchset:
PS16:
SCK and MOSI should be changed at once and some bitbang programmers
do so. We must not rely on the order. This change is only necessary
to cover up the bugs introduced in the previous commit.
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Change subject: bitbang_spi.c: fix spi sequence in time and rename
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Patch Set 16: Code-Review+2
(1 comment)
Patchset:
PS13:
> This is a timing issue, and the signal changes sent should be earlier than received. […]
Can you add a TEST=`..` line in the commit message please?
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Change subject: bitbang_spi.c: fix bitbang_spi_send_command to make the delay symmetric
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Patch Set 25: Code-Review+2
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Change subject: flashchips: add support for Winbond W25Q01JV
......................................................................
Patch Set 4:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/54968/comment/2256e774_461975ec
PS1, Line 17757: /* Full chip erase is fastest, typically takes 200s */
> > Well, maybe there is one low-hanging fruit: For the erase commandline
> > option (-E), we could iterate over the list in reverse order?
>
> Sounds like a very good idea. Do we have to account for region erases, though?
Yeah, seemed too easy. You are right, IIRC, we allow not block aligned regions,
so this optimization would apply to a `-E` for the full flash only. (Otherwise,
flashrom would see the flash-erase op, realize that it needs to back up every-
thing outside the region, erase, and restore the backup.)
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