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Change subject: Correct get_flash_region() to use inclusive upper bounds
......................................................................
Patch Set 6:
(2 comments)
File flashrom.c:
https://review.coreboot.org/c/flashrom/+/82496/comment/28a45641_d25f224b?us… :
PS6, Line 2240: start = region->end + 1;
> Just want to double-check: This and all other layout-related occurrences in `layout. […]
I think that's right. I only identified `get_flash_region` as a problem, and that was added along with all the code that uses it at about the same time.
File include/layout.h:
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Peter Marheine has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/82677?usp=email )
Change subject: Add clarification to struct flash_region on chipoff_t
......................................................................
Add clarification to struct flash_region on chipoff_t
Although chipoff_t is fairly clearly documented on its own, it seems
fairly frequent that developers will treat the end address of a flash
region as an exclusive upper bound rather than the inclusive one it
should be; for example CB:82496 fixes an incorrect use that affected
multiple sites, and CB:73571 stemmed from a similar cause. Add a
clarifying comment to call attention to this, to help programmers avoid
making similar mistakes in the future.
Change-Id: I80b61a87ca31bd5a116224aadb4e211ee6841e1f
Signed-off-by: Peter Marheine <pmarheine(a)chromium.org>
---
M include/layout.h
1 file changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/82677/1
diff --git a/include/layout.h b/include/layout.h
index 5614bea..d03a15b 100644
--- a/include/layout.h
+++ b/include/layout.h
@@ -37,6 +37,11 @@
struct flash_region {
char *name;
+ /*
+ * Note that because start and end are chipoff_t, end is an inclusive upper
+ * bound: the length of a region is (end - start + 1) bytes and it is
+ * impossible to represent a region with zero length.
+ */
chipoff_t start;
chipoff_t end;
bool read_prot;
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Change subject: Correct get_flash_region() to use inclusive upper bounds
......................................................................
Patch Set 6:
(1 comment)
File include/layout.h:
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Change subject: add gcc-14 -Werror=calloc-transposed-args compatibility
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
Fixes compilation with GCC14 on Fedora 40 for me.
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Anastasia Klimchuk has posted comments on this change by Peter Marheine. ( https://review.coreboot.org/c/flashrom/+/82393?usp=email )
Change subject: erasure_layout: Fix get_flash_region bug
......................................................................
Patch Set 13:
(4 comments)
Patchset:
PS13:
I got some last moment thoughts...
File erasure_layout.c:
https://review.coreboot.org/c/flashrom/+/82393/comment/afce5561_615cb6d6?us… :
PS13, Line 368: for (unsigned int addr = region_start; addr <= region_end; addr += len) {
I looked at this loop and got a bit suspicious. Specifically, will it properly get to the other side of protected region and continue after the end of protected region?
And I really only now thought about it. And now I am realising that current test cases do not cover this case, when protected region somewhere in the middle of the chip (which is always the case in real life).
The unit test has protected region which ends right at the end of chip memory :\ To represent what I am thinking about now, it could be e.g. between bytes 6-12, and we want to make sure bytes 13-15 are also processed.
What do you think? I can try modify the test cases, maybe at the end of this week. Or if you want you can?
File tests/erase_func_algo.c:
https://review.coreboot.org/c/flashrom/+/82393/comment/8fa90395_825e150d?us… :
PS9, Line 953: const size_t num_unparameterized = 1;
> I don't understand what you're suggesting as an alternative. […]
I forgot what exactly was on my mind when I was asking , sorry :(
Probably I was confused because parameterized tests are initialized in a loop, and non-param with a memcpy.
File tests/erase_func_algo.c:
https://review.coreboot.org/c/flashrom/+/82393/comment/4e231d09_e567a183?us… :
PS13, Line 766:
: #define START_PROTECTED_REGION 8
: #define END_PROTECTED_REGION 15
This was what I thought in the other comment: have this both in the middle of a chip (5-12, something like that). Which might also need to adjust layout regions. It's easier to have the same protected region, and variations of layout regions in every test case.
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Change subject: Correct get_flash_region() to use inclusive upper bounds
......................................................................
Patch Set 6:
(2 comments)
File flashrom.c:
https://review.coreboot.org/c/flashrom/+/82496/comment/aa48d700_675c6ee4?us… :
PS6, Line 2240: start = region->end + 1;
Just want to double-check: This and all other layout-related occurrences in `layout.c` (like `included_regions_overlap` and `layout_sanity_checks`) don't need to be changed. Is my understanding correct?
File include/layout.h:
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Change subject: Correct get_flash_region() to use inclusive upper bounds
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS6:
I am wondering, this path in ichspi (ich_get_region) is the same in Chrome OS, is it possible to do a few test runs on a device?
There are unit tests in the following patch, but they are implementing test version of get_flash_region and this changes the ich one.
Otherwise I have no other comments!
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Change subject: tests/erase: record the opcode for each erase
......................................................................
Patch Set 8: Code-Review+2
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Change subject: flashchips: Correct feature_bits for MX25L128*
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Thank you so much for testing and fixing! So do I understand correctly that now everything works wit […]
1. Before this patch: All WP-related options were accessible only through the `-p interna` programmer.
2. With this patch: We can now work with them through the debugger and `-p raiden_debug_spi` programmer.
If there's any other scenario setup worth trying, please let me know
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