February 2023 - flashrom-gerrit

[S] Change in flashrom[master]: tests: add bus coverage test for dummy
by Anastasia Klimchuk (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Alexander Goncharov. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72665 ) Change subject: tests: add bus coverage test for dummy ...................................................................... Patch Set 1: Code-Review+1 (2 comments) Patchset: PS1: just one little comment File tests/dummyflasher.c: https://review.coreboot.org/c/flashrom/+/72665/comment/4ef5f5ca_f1791f3a PS1, Line 126: dummy_cover_buses_test_success I would rename to `dummy_all_buses_test_success` -- To view, visit https://review.coreboot.org/c/flashrom/+/72665 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iafe715feb5f5c0b5efd6827cdb2c3a314f542319 Gerrit-Change-Number: 72665 Gerrit-PatchSet: 1 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Comment-Date: Fri, 03 Feb 2023 05:16:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: dummyflasher: use new API to register shutdown function
by Alexander Goncharov (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Edward O'Callaghan, Anastasia Klimchuk. Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/72408 ) Change subject: dummyflasher: use new API to register shutdown function ...................................................................... Patch Set 2: (1 comment) File dummyflasher.c: https://review.coreboot.org/c/flashrom/+/72408/comment/cce6a0d1_52e92a26 PS2, Line 1416: data->refs_cnt += ((dummy_buses_supported & BUS_PROG) != BUS_NONE); : data->refs_cnt += ((dummy_buses_supported & BUS_NONSPI) != BUS_NONE); : data->refs_cnt += ((dummy_buses_supported & BUS_SPI) != BUS_NONE); : : #if 0 : data->refs_cnt += (dummy_buses_supported & BUS_PROG) ? 1 : 0; : data->refs_cnt += (dummy_buses_supported & BUS_NONSPI) ? 1 : 0; : data->refs_cnt += (dummy_buses_supported & BUS_SPI) ? 1 : 0; : #endif Which one is more appropriate? -- To view, visit https://review.coreboot.org/c/flashrom/+/72408 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0c67c25b0f53cd8c564c4ea0f09f2728e856f6ea Gerrit-Change-Number: 72408 Gerrit-PatchSet: 2 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Thu, 02 Feb 2023 13:38:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in flashrom[master]: tests: add bus coverage test for dummy
by Alexander Goncharov (Code Review) 02 Feb '23

02 Feb '23

Alexander Goncharov has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/72665 ) Change subject: tests: add bus coverage test for dummy ...................................................................... tests: add bus coverage test for dummy Dummy programmer has a shared data between *_masters. To make sure the dummy has no memory leakage, we need a test that will covers initialization and shutdown of the programmer with different bus types, i.e. programmer specific, non-SPI and SPI. TEST=ninja test Change-Id: Iafe715feb5f5c0b5efd6827cdb2c3a314f542319 Signed-off-by: Alexander Goncharov <chat(a)joursoir.net> --- M tests/dummyflasher.c M tests/tests.c M tests/tests.h 3 files changed, 38 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/65/72665/1 diff --git a/tests/dummyflasher.c b/tests/dummyflasher.c index c41f9df..5a85cf3 100644 --- a/tests/dummyflasher.c +++ b/tests/dummyflasher.c @@ -123,6 +123,24 @@ run_basic_lifecycle(state, &dummy_io, &programmer_dummy, NULL); } +void dummy_cover_buses_test_success(void **state) +{ + struct io_mock_fallback_open_state dummy_fallback_open_state = { + .noc = 0, + .paths = { NULL }, + }; + const struct io_mock dummy_io = { + .fallback_open_state = &dummy_fallback_open_state, + }; + + run_basic_lifecycle(state, &dummy_io, &programmer_dummy, "bus=lpc+fwh"); + run_basic_lifecycle(state, &dummy_io, &programmer_dummy, "bus=spi"); + run_basic_lifecycle(state, &dummy_io, &programmer_dummy, "bus=prog"); + run_basic_lifecycle(state, &dummy_io, &programmer_dummy, "bus=parallel+fwh+prog"); + run_basic_lifecycle(state, &dummy_io, &programmer_dummy, "bus=spi+prog"); + run_basic_lifecycle(state, &dummy_io, &programmer_dummy, "bus=parallel+lpc+spi"); +} + #else SKIP_TEST(dummy_basic_lifecycle_test_success) SKIP_TEST(dummy_probe_lifecycle_test_success) @@ -131,4 +149,5 @@ SKIP_TEST(dummy_init_success_invalid_param_test_success) SKIP_TEST(dummy_init_success_unhandled_param_test_success) SKIP_TEST(dummy_null_prog_param_test_success) + SKIP_TEST(dummy_cover_buses_test_success) #endif /* CONFIG_DUMMY */ diff --git a/tests/tests.c b/tests/tests.c index 0912f35..35abb51 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -447,6 +447,7 @@ cmocka_unit_test(dummy_init_success_invalid_param_test_success), cmocka_unit_test(dummy_init_success_unhandled_param_test_success), cmocka_unit_test(dummy_null_prog_param_test_success), + cmocka_unit_test(dummy_cover_buses_test_success), cmocka_unit_test(nicrealtek_basic_lifecycle_test_success), cmocka_unit_test(raiden_debug_basic_lifecycle_test_success), cmocka_unit_test(dediprog_basic_lifecycle_test_success), diff --git a/tests/tests.h b/tests/tests.h index bdcfdae..59a00f3 100644 --- a/tests/tests.h +++ b/tests/tests.h @@ -51,6 +51,7 @@ void dummy_init_success_invalid_param_test_success(void **state); void dummy_init_success_unhandled_param_test_success(void **state); void dummy_null_prog_param_test_success(void **state); +void dummy_cover_buses_test_success(void **state); void nicrealtek_basic_lifecycle_test_success(void **state); void raiden_debug_basic_lifecycle_test_success(void **state); void dediprog_basic_lifecycle_test_success(void **state); -- To view, visit https://review.coreboot.org/c/flashrom/+/72665 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iafe715feb5f5c0b5efd6827cdb2c3a314f542319 Gerrit-Change-Number: 72665 Gerrit-PatchSet: 1 Gerrit-Owner: Alexander Goncharov <chat(a)joursoir.net> Gerrit-MessageType: newchange

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[S] Change in flashrom[master]: jedec.c: Trivial code style fix
by Edward O'Callaghan (Code Review) 01 Feb '23

01 Feb '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/72606 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: jedec.c: Trivial code style fix ...................................................................... jedec.c: Trivial code style fix Change-Id: I42ebdda07512d0a84a6bd6d0630f96c40f039259 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72606 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M jedec.c 1 file changed, 15 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/jedec.c b/jedec.c index b44b9c6..e97468e 100644 --- a/jedec.c +++ b/jedec.c @@ -196,8 +196,7 @@ if (probe_timing_enter) programmer_delay(flash, probe_timing_enter); /* Reset chip to a clean slate */ - if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) - { + if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_exit) programmer_delay(flash, 10); @@ -239,8 +238,7 @@ } /* Issue JEDEC Product ID Exit command */ - if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) - { + if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_exit) programmer_delay(flash, 10); -- To view, visit https://review.coreboot.org/c/flashrom/+/72606 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I42ebdda07512d0a84a6bd6d0630f96c40f039259 Gerrit-Change-Number: 72606 Gerrit-PatchSet: 3 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: jedec.c: Collapse probe_jedec() indirection
by Edward O'Callaghan (Code Review) 01 Feb '23

01 Feb '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/72504 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: jedec.c: Collapse probe_jedec() indirection ...................................................................... jedec.c: Collapse probe_jedec() indirection Change-Id: I57c27bcf25c5d9ce10fb9c74d9be6ab3544ac7ba Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72504 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M jedec.c 1 file changed, 17 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/jedec.c b/jedec.c index 697a239..b44b9c6 100644 --- a/jedec.c +++ b/jedec.c @@ -165,11 +165,12 @@ return 1; } -static int probe_jedec_common(struct flashctx *flash, unsigned int mask) +int probe_jedec(struct flashctx *flash) { - chipaddr bios = flash->virtual_memory; + const chipaddr bios = flash->virtual_memory; const struct flashchip *chip = flash->chip; - bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); + const bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); + const unsigned int mask = getaddrmask(flash->chip); uint8_t id1, id2; uint32_t largeid1, largeid2; uint32_t flashcontent1, flashcontent2; @@ -518,12 +519,6 @@ return 0; } -int probe_jedec(struct flashctx *flash) -{ - const unsigned int mask = getaddrmask(flash->chip); - return probe_jedec_common(flash, mask); -} - struct unlockblock { unsigned int size; unsigned int count; -- To view, visit https://review.coreboot.org/c/flashrom/+/72504 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I57c27bcf25c5d9ce10fb9c74d9be6ab3544ac7ba Gerrit-Change-Number: 72504 Gerrit-PatchSet: 3 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: jedec.c: Collapse erase_chip_block_jedec() indirection
by Edward O'Callaghan (Code Review) 01 Feb '23

01 Feb '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/72503 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: jedec.c: Collapse erase_chip_block_jedec() indirection ...................................................................... jedec.c: Collapse erase_chip_block_jedec() indirection Change-Id: I6e4a63e4935d4b69b66cbd1888f62b6af066a2ac Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72503 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M jedec.c 1 file changed, 24 insertions(+), 16 deletions(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/jedec.c b/jedec.c index 43ec0df..697a239 100644 --- a/jedec.c +++ b/jedec.c @@ -345,12 +345,20 @@ return 0; } -static int erase_chip_jedec_common(struct flashctx *flash, unsigned int mask) +/* erase chip with block_erase() prototype */ +int erase_chip_block_jedec(struct flashctx *flash, unsigned int addr, unsigned int blocksize) { - chipaddr bios = flash->virtual_memory; - bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); + const unsigned int mask = getaddrmask(flash->chip); + const chipaddr bios = flash->virtual_memory; + const bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); unsigned int delay_us = 0; + if ((addr != 0) || (blocksize != flash->chip->total_size * 1024)) { + msg_cerr("%s called with incorrect arguments\n", + __func__); + return -1; + } + if(flash->chip->probe_timing != TIMING_ZERO) delay_us = 10; @@ -510,19 +518,6 @@ return 0; } -/* erase chip with block_erase() prototype */ -int erase_chip_block_jedec(struct flashctx *flash, unsigned int addr, - unsigned int blocksize) -{ - const unsigned int mask = getaddrmask(flash->chip); - if ((addr != 0) || (blocksize != flash->chip->total_size * 1024)) { - msg_cerr("%s called with incorrect arguments\n", - __func__); - return -1; - } - return erase_chip_jedec_common(flash, mask); -} - int probe_jedec(struct flashctx *flash) { const unsigned int mask = getaddrmask(flash->chip); -- To view, visit https://review.coreboot.org/c/flashrom/+/72503 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6e4a63e4935d4b69b66cbd1888f62b6af066a2ac Gerrit-Change-Number: 72503 Gerrit-PatchSet: 3 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: jedec.c: Collapse erase_block_jedec() indirection
by Edward O'Callaghan (Code Review) 01 Feb '23

01 Feb '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/72501 ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: jedec.c: Collapse erase_block_jedec() indirection ...................................................................... jedec.c: Collapse erase_block_jedec() indirection Change-Id: Ia9b539d7fb4a54ba6cc56730e96d35044e291844 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72501 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M jedec.c 1 file changed, 15 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/jedec.c b/jedec.c index 20f2ff3..43ec0df 100644 --- a/jedec.c +++ b/jedec.c @@ -313,11 +313,11 @@ return 0; } -static int erase_block_jedec_common(struct flashctx *flash, unsigned int block, - unsigned int blocksize, unsigned int mask) +int erase_block_jedec(struct flashctx *flash, unsigned int block, unsigned int size) { chipaddr bios = flash->virtual_memory; bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); + const unsigned int mask = getaddrmask(flash->chip); unsigned int delay_us = 0; if(flash->chip->probe_timing != TIMING_ZERO) @@ -529,13 +529,6 @@ return probe_jedec_common(flash, mask); } -int erase_block_jedec(struct flashctx *flash, unsigned int page, - unsigned int size) -{ - const unsigned int mask = getaddrmask(flash->chip); - return erase_block_jedec_common(flash, page, size, mask); -} - struct unlockblock { unsigned int size; unsigned int count; -- To view, visit https://review.coreboot.org/c/flashrom/+/72501 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia9b539d7fb4a54ba6cc56730e96d35044e291844 Gerrit-Change-Number: 72501 Gerrit-PatchSet: 4 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: jedec.c: Collapse erase_sector_jedec() indirection
by Edward O'Callaghan (Code Review) 01 Feb '23

01 Feb '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/72500 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: jedec.c: Collapse erase_sector_jedec() indirection ...................................................................... jedec.c: Collapse erase_sector_jedec() indirection Change-Id: I9cc9e8c88c0442dc2602bbb2de2073113e9c484b Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72500 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M jedec.c 1 file changed, 15 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/jedec.c b/jedec.c index d3665b8..20f2ff3 100644 --- a/jedec.c +++ b/jedec.c @@ -281,11 +281,11 @@ return 1; } -static int erase_sector_jedec_common(struct flashctx *flash, unsigned int page, - unsigned int pagesize, unsigned int mask) +int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int size) { chipaddr bios = flash->virtual_memory; bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); + const unsigned int mask = getaddrmask(flash->chip); unsigned int delay_us = 0; if(flash->chip->probe_timing != TIMING_ZERO) @@ -529,13 +529,6 @@ return probe_jedec_common(flash, mask); } -int erase_sector_jedec(struct flashctx *flash, unsigned int page, - unsigned int size) -{ - const unsigned int mask = getaddrmask(flash->chip); - return erase_sector_jedec_common(flash, page, size, mask); -} - int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int size) { -- To view, visit https://review.coreboot.org/c/flashrom/+/72500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9cc9e8c88c0442dc2602bbb2de2073113e9c484b Gerrit-Change-Number: 72500 Gerrit-PatchSet: 3 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: jedec.c: Make getaddrmask() ret const correct
by Edward O'Callaghan (Code Review) 01 Feb '23

01 Feb '23

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/72499 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: jedec.c: Make getaddrmask() ret const correct ...................................................................... jedec.c: Make getaddrmask() ret const correct Change-Id: If9701a6d56159d0dfc047aa91b2a80c80fb33e5f Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72499 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M jedec.c 1 file changed, 20 insertions(+), 19 deletions(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/jedec.c b/jedec.c index c4ee0c7..d3665b8 100644 --- a/jedec.c +++ b/jedec.c @@ -121,7 +121,7 @@ int probe_jedec_29gl(struct flashctx *flash) { - unsigned int mask = getaddrmask(flash->chip); + const unsigned int mask = getaddrmask(flash->chip); chipaddr bios = flash->virtual_memory; const struct flashchip *chip = flash->chip; @@ -412,9 +412,7 @@ int failed = 0; chipaddr dst = flash->virtual_memory + start; chipaddr olddst; - unsigned int mask; - - mask = getaddrmask(flash->chip); + const unsigned int mask = getaddrmask(flash->chip); olddst = dst; for (i = 0; i < len; i++) { @@ -438,9 +436,7 @@ chipaddr bios = flash->virtual_memory; chipaddr dst = bios + start; chipaddr d = dst; - unsigned int mask; - - mask = getaddrmask(flash->chip); + const unsigned int mask = getaddrmask(flash->chip); retry: /* Issue JEDEC Start Program command */ @@ -518,9 +514,7 @@ int erase_chip_block_jedec(struct flashctx *flash, unsigned int addr, unsigned int blocksize) { - unsigned int mask; - - mask = getaddrmask(flash->chip); + const unsigned int mask = getaddrmask(flash->chip); if ((addr != 0) || (blocksize != flash->chip->total_size * 1024)) { msg_cerr("%s called with incorrect arguments\n", __func__); @@ -531,27 +525,21 @@ int probe_jedec(struct flashctx *flash) { - unsigned int mask; - - mask = getaddrmask(flash->chip); + const unsigned int mask = getaddrmask(flash->chip); return probe_jedec_common(flash, mask); } int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int size) { - unsigned int mask; - - mask = getaddrmask(flash->chip); + const unsigned int mask = getaddrmask(flash->chip); return erase_sector_jedec_common(flash, page, size, mask); } int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int size) { - unsigned int mask; - - mask = getaddrmask(flash->chip); + const unsigned int mask = getaddrmask(flash->chip); return erase_block_jedec_common(flash, page, size, mask); } -- To view, visit https://review.coreboot.org/c/flashrom/+/72499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If9701a6d56159d0dfc047aa91b2a80c80fb33e5f Gerrit-Change-Number: 72499 Gerrit-PatchSet: 3 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in flashrom[master]: flashrom_tester: Add positive check to verify_fail_test
by Edward O'Callaghan (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Evan Benn. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/71974 ) Change subject: flashrom_tester: Add positive check to verify_fail_test ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/71974 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ibbcc97086466b67cfab4f6c32140bb5f2c456beb Gerrit-Change-Number: 71974 Gerrit-PatchSet: 9 Gerrit-Owner: Evan Benn <evanbenn(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Evan Benn <evanbenn(a)google.com> Gerrit-Comment-Date: Thu, 02 Feb 2023 01:22:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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flashrom-gerrit February 2023