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Change subject: doc: Add meson test command to TLDR for meson instructions
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS1:
> Many users just want to compile things and don't care about running the tests, so I think it's reaso […]
That's a good idea, and I forgot about TLDR in README. I added there too.
About marking optional: I thought about it for a bit. There is currently a `meson install` command in both docs, which is also optional and not everyone needs it.
Peter, do you think we should mark both as optional?
I have the thought of, maybe people would understand that if they just need to compile than they just run compile, and if they need tests they run tests?
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Change subject: doc: Add meson test command to TLDR for meson instructions
......................................................................
doc: Add meson test command to TLDR for meson instructions
Running tests is one of the regular things to do in dev process,
same as compile, so it should be highlighted in the TLDR section
of the document.
The patch adds test command to TLDR version in README file, and
in dedicated meson instructions doc.
Change-Id: I67d5f4decdac15e6a72f4372135dab7d44396594
Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org>
---
M README.rst
M doc/dev_guide/building_from_source.rst
2 files changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/89/78689/2
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Change subject: flashchips: Split GD25Q127C/GD25Q128C and add GD25Q128E
......................................................................
Patch Set 3:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/78348/comment/27bcd5ca_403a16fe :
PS1, Line 6802: /* FIXME: 128E's OTP: 3072B total and doesn't support QPI */
> 1. Yes, I think you need to separate the two chip definitions. […]
Sure, then let's go for `128C` and `127C/128E`.
Thanks for the clarification.
I saw the comment shows `can be distinguished by SFDP` does that mean `flashrom` is able to distinguish them? Or is it impossible and we still need to add `-c` manually?
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Hello Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: flashchips: Split GD25Q127C/GD25Q128C and add GD25Q128E
......................................................................
flashchips: Split GD25Q127C/GD25Q128C and add GD25Q128E
Q127C and Q128C are not the same. Q127C doesn't support QPI but Q128C
does. So we need to split the existing GD25Q127C/GD25Q128C into two
separated entries. We also introduce the new flashchip Q128E and merge
it into Q127C.
Datasheet for Q128E: https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-0…
Q128E and Q127C/Q128C have compatible main functions, their differences
are:
* Q128E uses 55 nm process, while Q127C/Q128C use 65nm
* Q128E/Q127C does not support QPI
* Q128E have OTP: 3072B, while Q127C/Q128C are 1536B
* Q128E's fast read clock frequency is 133MHz, while Q127C/Q128C are
104MHZ
So we decided to merge Q128E into Q127C.
We also tested that Q128E could pass flashrom_tester while probing it as
127C/128C, so the main functionalities are compatible.
Change the chip name from GD25Q127C/GD25Q128C to two entries
GD25Q127C/GD25Q128E and GD25Q128C to make it more accurate.
Chip revision history:
- The 'GD25Q127C/GD25Q128C' definition was added in
`commit e0c7abf219b81ad049d09a4671ebc9196153d308` as 'GD25Q128C' and
later renamed to 'GD25Q127C/GD25Q128C'
BUG=b:304863141, b:293545382
BRANCH=none
TEST=flashrom_tester with flashrom binary could pass with Q128E,
which contains probe, read, write, erase, and write protect
Signed-off-by: Hsuan Ting Chen <roccochen(a)google.com>
Change-Id: I3300671b1cf74b3ea0469b9c5a833489ab4914f5
---
M flashchips.c
M include/flashchips.h
2 files changed, 52 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/48/78348/3
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Change subject: doc: Add meson test command to TLDR for meson instructions
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> I am sorry. […]
Many users just want to compile things and don't care about running the tests, so I think it's reasonable to omit from the main page. It would be okay to include as well, though I'd like to call tests out as optional since they're not meaningful to most users.
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Change subject: Remove dependency on C23 __has_include()
......................................................................
Patch Set 3:
(3 comments)
Patchset:
PS1:
> I totally agree with all your and Alexander's propositions, however have no knowledge of how to test […]
Well done, thank you!
Please try using `cc.check_header` in Meson to check whether the specified header is usable. You can find an example by searching for `cc.check_header('sys/utsname.h')`. I assume that all tests will then be verified by Jenkins.
File Makefile:
https://review.coreboot.org/c/flashrom/+/77089/comment/5243b176_7772b912 :
PS3, Line 209:
drop extra line
https://review.coreboot.org/c/flashrom/+/77089/comment/b87050e5_3eb13c3b :
PS3, Line 240:
drop extra line
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Change subject: doc: Add meson test command to TLDR for meson instructions
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> There's also TLDR section in `README. […]
I am sorry. I created it as a resolved comment, but it is not => make unresolved
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Change subject: doc: Add meson test command to TLDR for meson instructions
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
There's also TLDR section in `README.rst` file that is used as the main page on our site, so I suggest adding meson test command to that file as well
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Change subject: flashchips: Add Puya P25Q21H/11H/06H
......................................................................
Patch Set 6: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/58134/comment/c025e00d_bf1b98c8 :
PS6, Line 10: https://datasheet.lcsc.com/szlcsc/1908281813_PUYA-P25Q21H-SSH-IT_C414061.pdf
I cannot access this _part_ of the site from Switzerland / Russia.
Error Code: Access Denied
I used datasheet from this site (https://semic-boutique.com/wp-content/uploads/2016/05/P25Q21H-SSH-IT.pdf) to review the patch
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58134/comment/4ee58ba1_f6c7f6fe :
PS6, Line 14141: 256
The document that I used says: "3*512-Byte Security Registers With OTP Lock".
Is it the same in the one from lcsc.com?
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Change subject: raiden: Support target index with generic REQ_ENABLE
......................................................................
Patch Set 5: Code-Review+1
(4 comments)
Patchset:
PS2:
> I have added a few more cases to the test. […]
Yes, existing test is running `run_basic_lifecycle` which expects the lifecycle to run successfully.
There is another method in our test framework, which tests initialisation error (invalid value for programmer param for example). This is `run_init_error_path` here https://review.coreboot.org/plugins/gitiles/flashrom/+/refs/heads/main/test…
If you would like to add a test to verify that init fails with invalid value of param, you can use run_init_error_path for that. I suspect `raiden_debug_io` would not need that many mocks, maybe even no mocks at all: if init fails early those mocks are never called.
File doc/classic_cli_manpage.rst:
https://review.coreboot.org/c/flashrom/+/77999/comment/7c68030b_c99e4595 :
PS4, Line 873:
> I have attempted to merge your suggested paragraph into the existing documentation.
Looks really good
File doc/classic_cli_manpage.rst:
https://review.coreboot.org/c/flashrom/+/77999/comment/a1844fc0_7b8a005a :
PS5, Line 871:
trailing whitespace
Otherwise the text is very good!
File tests/raiden_debug_spi.c:
https://review.coreboot.org/c/flashrom/+/77999/comment/3154708d_7bf2511b :
PS5, Line 112:
: snprintf(raiden_debug_param, sizeof(raiden_debug_param),
: "address=%d,target=AP", USB_DEVICE_ADDRESS);
: run_basic_lifecycle(state, &raiden_debug_io, &programmer_raiden_debug_spi, raiden_debug_param);
:
: snprintf(raiden_debug_param, sizeof(raiden_debug_param),
: "address=%d,target=ec", USB_DEVICE_ADDRESS);
: run_basic_lifecycle(state, &raiden_debug_io, &programmer_raiden_debug_spi, raiden_debug_param);
:
: snprintf(raiden_debug_param, sizeof(raiden_debug_param),
: "address=%d,target=0", USB_DEVICE_ADDRESS);
: run_basic_lifecycle(state, &raiden_debug_io, &programmer_raiden_debug_spi, raiden_debug_param);
:
: snprintf(raiden_debug_param, sizeof(raiden_debug_param),
: "address=%d,target=1", USB_DEVICE_ADDRESS);
: run_basic_lifecycle(state, &raiden_debug_io, &programmer_raiden_debug_spi, raiden_debug_param);
This is great, thank you so much for adding test coverage!
The only thing: let's make each test case a separate test. Which means, initial test case stays in `raiden_debug_basic_lifecycle_test_success` function, and the other 4 you add into their own test functions.
I don't mind long names for test functions, so you can name them for example:
raiden_debug_targetAP_basic_lifecycle_test_success
raiden_debug_targetEC_basic_lifecycle_test_success
raiden_debug_target0_basic_lifecycle_test_success
raiden_debug_target1_basic_lifecycle_test_success
The definitions of `raiden_debug_fallback_open_state` and `raiden_debug_io` at the beginning of each function you can just copy-paste.
Then you need to add 4 new functions into:
tests/tests.c
tests/tests.h
and at the bottom of this file add SKIP_TEST macro.
And that should be it!
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