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Change subject: Add initial CH347T SPI programmer
......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
qianfan,
I wanted to check with you about your patch.
As you know, as a complete coincidence, we now have two patches implementing a programmer for ch347: CB:70573 and yours. After several discussions, we decided to take CB:70573 as a baseline patch for ch347.
There are technical reasons for this decision:
1) CB:70573 has less layers of indirection
2) the preference is for arrays and manual shifts/masks because they are the only portable way of guaranteeing things end up in the right place
3) the general style (naming, function ordering) follows the style of flashrom more closely
4) CB:70573 does not use global state for a programmer
Important thing for now is to figure out if there are some useful features from your patch that can be introduced on the top of CB:70573 ? What do you think?
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70573 )
Change subject: ch347_spi.c: Add initial support for the WCH CH347
......................................................................
Patch Set 3:
(5 comments)
Patchset:
PS3:
> Nicholas, just to check: is this patch still needed? It seems like CB:70529 + CB:71066 add new progr […]
After a number of discussions in several irc channels, the conclusion is: this patch is going ahead and anything extra from CB:70529 can be added on the top.
Few things that are missing to add a new programmer:
There a few things need to be added to this patch:
1) add new programmer to meson build system (currently only added to make)
2) add man page entry for new programmer
3) add to test_build.sh
4) add yourself to MAINTAINERS file (if you agree!)
This is a coincidence, but: there is one more new programmer being under review at the moment in CB:71801 . The programmer is independent of this one, but it can be a useful example as of all the places that need to be updated when introducing new programmer.
Thank you for your work!
File ch347_spi.c:
https://review.coreboot.org/c/flashrom/+/70573/comment/4f38919c_e448ce7b
PS3, Line 62: /* TODO: Set this depending on the mode */
new line before
https://review.coreboot.org/c/flashrom/+/70573/comment/95361b93_0ce0253b
PS3, Line 68: ch347_data->handle = NULL;
new line before
https://review.coreboot.org/c/flashrom/+/70573/comment/4fba5271_da300058
PS3, Line 69: free(data);
> Both my code and `ft2232_spi` allocate memory for the data passed around in flashctx, so I would thi […]
Yes please, free the data :)
Nicholas, you did the right thing, thank you for not introducing the global state in a new programmer.
The reason `ch341a_spi` still has global state (and therefore does not have data to free) is because removing global state was blocked by refactoring of `programmer_delay`, which took a long time in review. However, that refactoring merged, and now `ch341a_spi` is unblocked and global state will be removed soon.
Another relevant point is that: if programmer has a lifecycle unit test, the test can check that there are no memory leaks at shutdown. `ch341a_spi` already has unit test. Maybe, at some point later, we can add a unit test for `ch347_spi`. Not now of course, but this would be a good idea for future, especially that existing test for ch341 can be taken as a starting point.
https://review.coreboot.org/c/flashrom/+/70573/comment/14f4aa3f_05ffdf34
PS3, Line 123: Could not read write response
It is confusing, given that both "read" and "write" are the operations, what does it mean "Could not read write response" ? is it read response or write response?
If you looks at the source code, you can see this is in the context of `ch347_write` so probably about "write response" but imagine a user looking into the logs.
TLDR: Lets make it clear this is about write operation.
Could not parse response from write operation?
Maybe something else, this is just my suggestion.
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Hello build bot (Jenkins), Simon Buhrow, Thomas Heijligen, Edward O'Callaghan, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/65844
to look at the new patch set (#84).
Change subject: flashrom.c: Add functions for new erase selction algorithm
......................................................................
flashrom.c: Add functions for new erase selction algorithm
1) Add function to flatten out the addresses of the flash chip as per
the different erase functions. This function will return a list of
layouts which is dynamically allocated. So after use all the layouts as
well as the list itself should be freed. The free_erase_layout function
does that.
2) Add function to align start and end address of the region (in struct
walk_info) to some erase sector boundaries and modify the region start
and end addresses to match nearest erase sector boundaries. This
function will be used in the new algorithm for erase function selection.
3) Add function that returns a list of sectors (as seen by the first
erase function) that need erasing.
4) Add a function to call the erase algorithm.
Change-Id: Ic57ca1cca3d1646543f6b5939ba9c35db8d08256
Signed-off-by: Aarya Chaumal <aarya.chaumal(a)gmail.com>
---
A erasure_layout.c
A erasure_layout.h
2 files changed, 471 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/44/65844/84
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Change subject: flashrom.c: Supplement `chip->unlock()` calls with wp unlocking
......................................................................
Patch Set 12: Code-Review+2
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Change subject: writeprotect: add WP function to expose register state and WP bit masks
......................................................................
Patch Set 4:
(2 comments)
Patchset:
PS4:
rebase
File include/writeprotect.h:
https://review.coreboot.org/c/flashrom/+/69847/comment/355e4286_515cbeca
PS1, Line 96: wp_cfg_to_reg_values
> Add a unit-test
ping
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Hello Felix Singer, build bot (Jenkins), Thomas Heijligen, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/71801
to look at the new patch set (#6).
Change subject: programmer: Add bitbanging programmer driver for Linux libgpiod
......................................................................
programmer: Add bitbanging programmer driver for Linux libgpiod
With this driver, any single board computer, old smartphone, etc. with
a few spare GPIOs can be used for flashrom.
Tested by reading of a 2048 kB flash chip on a Qualcomm MSM8916 SoC
@800 MHz, ran the following command:
time flashrom -p linux_gpiod:gpiochip=0,cs=18,sck=19,mosi=13,miso=56 -r test.bin
This command uses /dev/gpiochip0 with the specified GPIO numbers for the
SPI lines. All arguments are mandatory.
Output:
[...]
Found GigaDevice flash chip "GD25LQ16" (2048 kB, SPI) on linux_gpiod.
[...]
real 1m 33.96s
Change-Id: Icad3eb7764f28feaea51bda3a7893da724c86d06
Signed-off-by: Steve Markgraf <steve(a)steve-m.de>
---
M Documentation/building.md
M MAINTAINERS
M Makefile
M README
M flashrom.8.tmpl
M include/programmer.h
A linux_gpiod.c
M meson.build
M meson_options.txt
M programmer_table.c
M test_build.sh
M util/manibuilder/Dockerfile.alpine
M util/manibuilder/Dockerfile.centos
M util/manibuilder/Dockerfile.debian-debootstrap
M util/manibuilder/Dockerfile.fedora
M util/manibuilder/Dockerfile.ubuntu-debootstrap
M util/shell.nix
17 files changed, 289 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/01/71801/6
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