Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/67713
to look at the new patch set (#4).
Change subject: flashchips.c: Add write protect support for W25Q16.V
......................................................................
flashchips.c: Add write protect support for W25Q16.V
Enable WRSR2 feature flag and define reg_bits and decode_range for
W25Q16.V to enable write protect support.
TEST=flashrom --wp-{enable,disable,range,list,status}
Change-Id: I6c0b35f82b47a1169bccfd08222e9e3b3be30d75
Signed-off-by: Khoa Hoang <admin(a)khoahoang.com>
---
M flashchips.c
1 file changed, 25 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/13/67713/4
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Gerrit-Change-Id: I6c0b35f82b47a1169bccfd08222e9e3b3be30d75
Gerrit-Change-Number: 67713
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Jonathon Hall has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/67744 )
Change subject: internal: Pass programmer_cfg() through to MTD init
......................................................................
Abandoned
Dup of 496331a6727d146145f843141e6bc0a1e73b60ff
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Gerrit-Change-Number: 67744
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Jonathon Hall has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67695 )
Change subject: drivers: Move (un)map_flash_region from programmer to par_master
......................................................................
Patch Set 5:
(2 comments)
Patchset:
PS5:
> I found more issues. […]
I'll bring back the mappers for the SPI masters. IMO, if I have to bring back the infrastructure, I would rather preserve behavior for all of the other masters I'm unable to test, so I'll probably restore ICH7 and ICH9 swseq as well if it works out cleanly. I definitely don't want to go refactoring lots of programmers in this patch ;-)
So I can shoehorn a way for SPI masters to set the mapper in par_master, or move the mappers back up to registered_master, or possibly add a mapper to spi_master. I'm leaning toward spi_master I think if I can get it handled cleanly.
I don't think we need mappers for any of the opaque masters. (linux_mtd and nicintel_eeprom already used fallback, I tested ichspi.)
Have a good vacation, I'll probably leave more updates and comments here as I go but no rush!
File serprog.c:
https://review.coreboot.org/c/flashrom/+/67695/comment/1a4d1525_61d19f6a
PS5, Line 919: 1024
> we have a `KiB` macro
Ack
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Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67695 )
Change subject: drivers: Move (un)map_flash_region from programmer to par_master
......................................................................
Patch Set 5:
(5 comments)
Patchset:
PS5:
I found more issues. The internal wbsio spi_master, uses an hybrid of memory mapping and spi commands.
The sb600 promontory faces similar problems.
Unfortunately I'm on vacation the next weeks, so I've limited resources to look into all the issues coming with this change. But at this point already a huge thank you for all this work.
File atapromise.c:
https://review.coreboot.org/c/flashrom/+/67695/comment/2d146c62_d81ea3b1
PS2, Line 133: atapromise_map
> Removed this, also updated the comment in fallback_map() since returning NULL is the desired behavio […]
Done
File atavia.c:
https://review.coreboot.org/c/flashrom/+/67695/comment/729a6eaa_8d905911
PS2, Line 147: atavia_map
> I kept this around for now since I can't test it and it doesn't hurt the overall structure. […]
Done
File serprog.c:
https://review.coreboot.org/c/flashrom/+/67695/comment/a816598f_0a913cbd
PS2, Line 582: .map_flash_region = serprog_map,
> Ah I see it now, I replaced the mapper with max_rom_decode for all bus types.
Done
File serprog.c:
https://review.coreboot.org/c/flashrom/+/67695/comment/9178b9ea_64821af5
PS5, Line 919: 1024
we have a `KiB` macro
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Maciej Pijanowski has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/66212 )
Change subject: writeprotect_ranges.c: add more range functions
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS3:
> Sergii, I realised your chain is waiting for attention for a while. […]
I'm afraid we will not be able to test all of them. I've tested some I could access with the results published here: https://github.com/flashrom/flashrom/issues/185#issuecomment-1253434497
The list of the chips comes mostly from the linked issue. We wanted to add support for all of them and hoped for some support in testing, but as you can see in the issue, there are no volounteers currently.
Sergii suggested we might flag somehow the ones we tested and the ones which are purely based on the datasheet. Any thoughts on moving forward are appreciated.
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Felix Singer has submitted this change. ( https://review.coreboot.org/c/flashrom/+/67752 )
Change subject: internal.c: Pass `programmer_cfg` to `try_mtd()`
......................................................................
internal.c: Pass `programmer_cfg` to `try_mtd()`
Programmer params are now passed via the `programmer_cfg` struct, but
the internal programmer did not pass them to the `try_mtd()` function
which was still using `NULL`. This problem resulted in a segmentation
fault when trying to use the internal programmer.
TEST=Make sure internal programmer does not segfault on Haswell ULT.
Change-Id: I9e74bd68a1f9509a201dc518dbff96c27d68a3c3
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67752
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Thomas Heijligen <src(a)posteo.de>
Reviewed-by: Felix Singer <felixsinger(a)posteo.net>
Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org>
---
M include/programmer.h
M internal.c
2 files changed, 29 insertions(+), 4 deletions(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
Thomas Heijligen: Looks good to me, approved
Edward O'Callaghan: Looks good to me, approved
diff --git a/include/programmer.h b/include/programmer.h
index a7cea5e..17abfd2 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -375,12 +375,15 @@
void probe_superio_ite(void);
int init_superio_ite(const struct programmer_cfg *cfg);
-#if CONFIG_LINUX_MTD == 1
/* trivial wrapper to avoid cluttering internal_init() with #if */
-static inline int try_mtd(void) { return programmer_linux_mtd.init(NULL); };
+static inline int try_mtd(const struct programmer_cfg *cfg)
+{
+#if CONFIG_LINUX_MTD == 1
+ return programmer_linux_mtd.init(cfg);
#else
-static inline int try_mtd(void) { return 1; };
+ return 1;
#endif
+}
/* mcp6x_spi.c */
int mcp6x_spi_init(int want_spi);
diff --git a/internal.c b/internal.c
index 43aa51b..6a8db5e 100644
--- a/internal.c
+++ b/internal.c
@@ -215,7 +215,7 @@
*/
internal_buses_supported = BUS_NONSPI;
- if (try_mtd() == 0) {
+ if (try_mtd(cfg) == 0) {
ret = 0;
goto internal_init_exit;
}
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64968 )
Change subject: ichspi.c: Use mmio_W,R(ich_spibar + X) macros consistently
......................................................................
Patch Set 6:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/64968/comment/406aa05a_711a3b48
PS6, Line 7: ichspi.c: Use mmio_W,R(ich_spibar + X) macros consistently
I rather would like to use the functions instead of the macros.
https://review.coreboot.org/c/flashrom/+/64968/comment/95abb93c_b21e8c6b
PS6, Line 14: TEST=builds
As far as I can see, the binary shouldn't change. Please make sure this is the case.
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