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Change subject: ichspi.c: Implement read_write_status for wp
......................................................................
Patch Set 7: Code-Review+2
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Hello build bot (Jenkins), Subrata Banik, Nikolai Artemiev, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/64540
to look at the new patch set (#7).
Change subject: ichspi.c: Implement read_write_status for wp
......................................................................
ichspi.c: Implement read_write_status for wp
The ichspi hwseq path has a opaque master specialisation that
allows for reading and writing STATUS1 registers. Hook the callbacks
with a implementation to allow for this so that writeprotect maybe
supported though this path.
Change-Id: I7ecbe8491ecea3697922c91af26ca62276e86317
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M ichspi.c
1 file changed, 74 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/40/64540/7
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64375 )
Change subject: writeprotect.c: Allow opaque masters to hook spi_{rw}_register()
......................................................................
Patch Set 6:
(1 comment)
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/64375/comment/0ee45d4c_3eec94f2
PS5, Line 33: if ((flash->mst->buses_supported & BUS_PROG) && flash->mst->opaque.write_register) {
: return flash->mst->opaque.write_register(flash, reg, value);
: }
> I am inclined to move this specalisation to actually within writeprotect. […]
Ack
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64375 )
Change subject: writeprotect.c: Allow opaque masters to hook spi_{rw}_register()
......................................................................
Patch Set 6:
(1 comment)
File include/programmer.h:
https://review.coreboot.org/c/flashrom/+/64375/comment/adbb6ce2_ca72ef45
PS6, Line 405: int (*read_register)(const struct flashctx *flash, enum flash_reg reg, uint8_t *value);
: int (*write_register)(const struct flashctx *flash, enum flash_reg reg, uint8_t value);
> If these are meant to stay WP only, they should have "wp_" prefix.
That is a fair point however this was intentional since r/w register is not necessarily specific to only writeprotect.c it is just that the use-case happens to be that right now.
The hooks are intended to be general purpose, another use-case I have potentially in mind is for libflashrom to facilitate dumping register state.
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64668 )
Change subject: cli_output.c: Format progress output to show in single line
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
Makes sense to me.
Daniel, Richard, does this look good for you as authors of progress API?
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64663 )
Change subject: libflashrom: Allow getting the progress_state from the flashctx
......................................................................
Patch Set 2:
(2 comments)
Patchset:
PS2:
I think I can answer some of these, let me try! :)
> have you tested if the current implementation works?
There is a testing information in commit message, I asked to add earlier.
> I'm a bit confused about when update_progress() should get called.
Previous patch CB:49643 introduces update_progress() calls into many programmers. For me, it was easier to understand when looking at CB:49643
> Does it do anything on a modern Intel system at all?
This question, maybe someone can confirm, but what I see is that CB:49643 is not changing ichspi.c at all, so I guess Intel systems are not touched?
> There are odd paths like spi_chip_read() calls into the master, which may
> call spi_read_chunked() which calls update_progress(). But spi_chip_read()
> calls it as well? I wonder what was the reason to do it at the chip and
> programmer levels.
This is interesting, I had a closer look into `spi_chip_read()` and `spi_read_chunked()` and I see now what you mean. It is possible that update_progress is called by both functions, however not always, but only in some cases.
I looked into flashrom_progress_cb in cli_output.c and it calculates percent progress, and then it produces output only of percent has changed. So it won't produce the same repeated lines like
READ 66% complete...
READ 66% complete...
It will be only line in such case.
What would be a better way to wire update_progress into spi infra, what do you think?
File include/libflashrom.h:
https://review.coreboot.org/c/flashrom/+/64663/comment/d262150c_4a0fb9d9
PS2, Line 85: typedef void(flashrom_progress_callback)(struct flashrom_flashctx *flashctx);
> Why doesn't it get the progress passed directly?
I think I can answer this one. There is a progress_state in flashctx, so no need to pass another one.
The earlier versions in CB:49643 had two arguments: flashctx and progress_state and it was confusing on which exactly state is used. The patch owner was asked to remove the second argument during review. I can understand because there is a progress_state in flashctx already.
I hope I answered your question! At least, to the extent how I understand the question.
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Change subject: writeprotect.c: Allow opaque masters to hook spi_{rw}_register()
......................................................................
Patch Set 6:
(1 comment)
File include/programmer.h:
https://review.coreboot.org/c/flashrom/+/64375/comment/b2805ef9_e950968d
PS6, Line 405: int (*read_register)(const struct flashctx *flash, enum flash_reg reg, uint8_t *value);
: int (*write_register)(const struct flashctx *flash, enum flash_reg reg, uint8_t value);
If these are meant to stay WP only, they should have "wp_" prefix.
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Change subject: Add reviewers group to allow +1, -1 changes.
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
Patchset:
PS2:
Looks reasonable.
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Hello build bot (Jenkins), Subrata Banik, Nikolai Artemiev, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/64375
to look at the new patch set (#6).
Change subject: writeprotect.c: Allow opaque masters to hook spi_{rw}_register()
......................................................................
writeprotect.c: Allow opaque masters to hook spi_{rw}_register()
Allow specialisation in opaque masters, such as ichspi hwseq, to
write to status registers.
Change-Id: I3ab0d7f5f48338c8ecb118a69651c203fbc516ac
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M include/programmer.h
M writeprotect.c
2 files changed, 26 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/64375/6
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64375 )
Change subject: spi25_statusreg.c: Allow opaque masters to hook spi_{rw}_register()
......................................................................
Patch Set 5: Code-Review-1
(1 comment)
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/64375/comment/e19c8ce1_3afee909
PS5, Line 33: if ((flash->mst->buses_supported & BUS_PROG) && flash->mst->opaque.write_register) {
: return flash->mst->opaque.write_register(flash, reg, value);
: }
I am inclined to move this specalisation to actually within writeprotect.c I feel this layer violates as-is and that flashrom probably should be refactored some to wrap up the spi command issuing semantics and master selection behind some kind of internal API.
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