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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/58570
to look at the new patch set (#24).
Change subject: spi25_statusreg,flashchips: add SR2 read/write support
......................................................................
spi25_statusreg,flashchips: add SR2 read/write support
This patch adds support for reading and writing the second status
register and enables it on a limited set of flash chips.
Chip support for RDSR2/WRSR2/extended WRSR is represented using feature
flags to be consistent with how other SPI capabilities are represented.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
TEST=logged SR2 read/write values during wp commands
BRANCH=none
Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
M spi.h
M spi25_statusreg.c
4 files changed, 53 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/58570/24
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58475 )
Change subject: spi25_statusreg: make register read/write functions generic
......................................................................
Patch Set 20: Code-Review+1
(2 comments)
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/58475/comment/dace9460_ac724415
PS20, Line 67: unlikley
unlikely (typo)
https://review.coreboot.org/c/flashrom/+/58475/comment/fda637b6_b264ffbc
PS20, Line 74: i -= 10;
I can't understand this after reading the comment. The comment says only wait for initial 100ms if the register is SR1. At line 74 initial 100ms already done. Why does `i` value matter at all? The loop is expected to have only one iteration for SR1?
So just to be clear, my confusion is: why `i` value is modified, from reading the comment it seems like it doesn't matter in this case?
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58737 )
Change subject: ichspi: Extract initialisation of swseq and hwseq into a function
......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
Rebased because of the latest changes in CB:58735
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Change subject: ichspi: Split very long init function into two
......................................................................
Patch Set 8:
(3 comments)
Patchset:
PS7:
> Thank you so much Nicolas for help!
Nicolas, sorry for delay, I uploaded new version which (hopefully) fixes ich_spibar and ich_generation initialisation. Is it possible for you to try run it again on your machine? Thank you so much!
PS7:
> My memory tries to tell me something... back in 2012 we were […]
Wow this is a very special computer that you found! ;) Does it still work?
10 years ago... this is impressive! Maybe you can keep it as a memory even if it doesn't work anymore :)
If it still works... maybe you can keep it to test things sometimes?
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/58735/comment/0a290381_292b00e5
PS7, Line 1771: ich_generation = ich_gen;
: ich_spibar = spibar;
> These two are globals and also affect the ICH7 paths. I guess we […]
Thank you so much for your analysis! This is helpful.
ich_spibar is used in program_opcodes ichspi.c#L566, which is called at some point of init (as I understand?), and ich_generation is needed for run_opcode ichspi.c#L1081 ? I missed this :( global state makes it hard to understand what is used where, I am hoping to remove global state one day.
I moved initialisation of both ich_spibar and ich_generation back into entry point ich_init_spi. This last patchset I tested on the device that I have, and now of course it needs to be tested on ICH7.
The question that I have in mind: does the code looks good enough to re-test it again? At the moment I have no way to run init_ich7_spi code, so I only know that the code builds.
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