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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67878 )
Change subject: dirtyjtag: Add DirtyJTAG programmer
......................................................................
Patch Set 14:
(2 comments)
File flashrom.8.tmpl:
https://review.coreboot.org/c/flashrom/+/67878/comment/338b7408_0f7199e9
PS13, Line 1580: .SS
: .BR "mediatek_i2c_spi " programmer
: .IP
: This programmer supports SPI flash programming for chips attached to some
: Mediatek display controllers, themselves accessed through I2C (tunneling
: SPI flash commands through an I2C connection with the host).
: .sp
: The programmer is designed to support the TSUMOP82JUQ integrated display driver
: and scaler as used in the Google Meet Series One Desk 27 (which runs a version
: of ChromeOS and uses flashrom in its \fBtsum-scaler-updater\fP scripts that
: ship with the OS). Other chips may use compatible protocols but have not been
: tested with this programmer, and external chip IOs may need to be controlled
: through other non-flashrom means to configure the chip in order for it to
: operate as expected.
: .sp
: \fBdevpath\fP and \fBbus\fP options select the I2C bus to use, as described
: previously. \fBallow_brick\fP defaults to no, and must explicitly be set to
: "yes" in order for the programmer to operate. This is required because there is
: no mechanism in the driver to positively identify that a given I2C bus is
: actually connected to a supported device.
Yep, definitely a bad rebase.
https://review.coreboot.org/c/flashrom/+/67878/comment/59a89817_b45ab8f7
PS13, Line 1528: .BR "realtek_mst_i2c_spi " and " parade_lspcon " programmers
Bad rebase? Why are docs about `mediatek_i2c_spi` gone?
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Attention is currently required from: Felix Singer, Nico Huber, Thomas Heijligen, Angel Pons, Alexander Goncharov.
Hello Felix Singer, build bot (Jenkins), Nico Huber, Thomas Heijligen, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/67878
to look at the new patch set (#14).
Change subject: dirtyjtag: Add DirtyJTAG programmer
......................................................................
dirtyjtag: Add DirtyJTAG programmer
Add a new programmer driver for the DirtyJTAG project (a USB-JTAG
firmware for STM32 MCUs).
Successfully tested with DirtyJTAG 1.4 running on an Olimex STM32-H103
development board and a SST25VF020B SPI flash chip.
Change-Id: Ic43e9a014ed7d04e429e73b30c9dcfdde1a78913
Signed-off-by: Jean THOMAS <virgule(a)jeanthomas.me>
---
M Makefile
A dirtyjtag_spi.c
M flashrom.8.tmpl
M include/programmer.h
M meson.build
M meson_options.txt
M programmer_table.c
M test_build.sh
8 files changed, 380 insertions(+), 27 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/67878/14
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Hello Felix Singer, build bot (Jenkins), Nico Huber, Thomas Heijligen, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/67878
to look at the new patch set (#13).
Change subject: dirtyjtag: Add DirtyJTAG programmer
......................................................................
dirtyjtag: Add DirtyJTAG programmer
Add a new programmer driver for the DirtyJTAG project (a USB-JTAG
firmware for STM32 MCUs).
Successfully tested with DirtyJTAG 1.4 running on an Olimex STM32-H103
development board and a SST25VF020B SPI flash chip.
Change-Id: Ic43e9a014ed7d04e429e73b30c9dcfdde1a78913
Signed-off-by: Jean THOMAS <virgule(a)jeanthomas.me>
---
M Makefile
A dirtyjtag_spi.c
M flashrom.8.tmpl
M include/programmer.h
M meson.build
M meson_options.txt
M programmer_table.c
M test_build.sh
8 files changed, 363 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/67878/13
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Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/68180 )
Change subject: flashchips.c: mark WP of 9 entries as tested
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
> Aren't we missing MX chips from https://github. […]
No, in these changes those chips don't have WP definitions. https://review.coreboot.org/q/topic:more_wp will add them and mark appropriately (after this is merged and those changes are rebased).
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/66754 )
Change subject: writeprotect.c: skip unnecessary writes
......................................................................
Patch Set 2:
(1 comment)
File writeprotect.c:
https://review.coreboot.org/c/flashrom/+/66754/comment/a88e88d4_2f8fd2a9
PS1, Line 159: new
> I'm also not sure if test terminology is more appropriate here than old/new or current/new, but one […]
The key point here is that it is consistent and in keeping with the rest of the file.
In direct answer to the question - it is the 'expected bits the caller requested' and the 'actual bits observed' from the chip.
As an aside without going off in the deep end here, "new/old" doesn't really make much sense either, 'new what'. Furthermore 'new' is typically a reserved word in most languages and tends to be best avoided as a identifier for a variable.
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