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Change subject: usb_device: Fix up whitespace
......................................................................
Patch Set 1: Code-Review+2
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Change subject: usb_device: Fix up whitespace
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Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/51114 )
Change subject: usb_device.h: Improve `LIBUSB_ERROR` macro
......................................................................
usb_device.h: Improve `LIBUSB_ERROR` macro
Guard macro parameters and correct a typo in the parameter name.
TEST=Build with `make distclean && make VERSION=none -j` with and
without this patch, the flashrom executable does not change.
Change-Id: Ifc917b001713bc96adee46019d267f2090ef184a
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M usb_device.h
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/14/51114/1
diff --git a/usb_device.h b/usb_device.h
index b2c7656..4abf751 100644
--- a/usb_device.h
+++ b/usb_device.h
@@ -34,7 +34,7 @@
* flashrom recognizes. It does so without displaying an error code allowing us
* to compare error codes against the library enumeration values.
*/
-#define LIBUSB_ERROR(eror_code) (0x20000 | -eror_code)
+#define LIBUSB_ERROR(error_code) (0x20000 | -(error_code))
/*
* The LIBUSB macro converts a libusb failure code into an error code that
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/51113 )
Change subject: Add support for GD25LQ256D
......................................................................
Patch Set 1: Code-Review+1
(4 comments)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/51113/comment/b601db2c_1ae6cf94
PS1, Line 6718: .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER,
Missing FEATURE_QPI?
https://review.coreboot.org/c/flashrom/+/51113/comment/3795c395_87728745
PS1, Line 6750: spi_prettyprint_status_register_bp3_srwd
According to the datasheet, this should be `spi_prettyprint_status_register_bp4_srwd` instead.
https://review.coreboot.org/c/flashrom/+/51113/comment/7654655c_ec5e0ef9
PS1, Line 6751: spi_disable_blockprotect
spi_disable_blockprotect_bp4_srwd
https://review.coreboot.org/c/flashrom/+/51113/comment/44655ee3_6fe0cd8f
PS1, Line 6757:
nit: one blank line is enough here
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/51113 )
Change subject: Add support for GD25LQ256D
......................................................................
Patch Set 1: Code-Review+2
(3 comments)
Patchset:
PS1:
As the datasheet seems incomplete wrt. 4-byte addressing, it would be
nice to leave a TODO comment about that. Also, please upload a verbose
log of a write (with changed data) run to `paste.flashrom.org`.
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/51113/comment/8ef9c63b_bcf769e9
PS1, Line 6719: UNTESTED
You can update this to PREW.
https://review.coreboot.org/c/flashrom/+/51113/comment/fb174837_aece195a
PS1, Line 6726: .block_erase = spi_block_erase_21,
This (and the other 4-byte address commands) is not mentioned in
the datasheet (rev. 2.0 I found). If flashrom didn't complain, it
seems supported, though.
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