Attention is currently required from: Peter Marheine.
Hello build bot (Jenkins), Peter Marheine,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59276
to look at the new patch set (#2).
Change subject: pcidev: Move pci_get_dev() logic into canonical place
......................................................................
pcidev: Move pci_get_dev() logic into canonical place
BUG=none
TEST=builds
Change-Id: Id9ce055d5e5d347520ec5002b8c6548e60eaa0a7
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M board_enable.c
M pcidev.c
M programmer.h
3 files changed, 15 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/76/59276/2
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Id9ce055d5e5d347520ec5002b8c6548e60eaa0a7
Gerrit-Change-Number: 59276
Gerrit-PatchSet: 2
Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org>
Gerrit-MessageType: newpatchset
Attention is currently required from: Peter Marheine.
Hello build bot (Jenkins), Peter Marheine,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59275
to look at the new patch set (#2).
Change subject: pcidev: Avoid internal relying on pacc global
......................................................................
pcidev: Avoid internal relying on pacc global
Make progress towards the goal of removing pacc from global
state as noted in the FIXME of programmer.h
BUG=none
TEST=builds
Change-Id: Id83bfd41f785f907e52a65a6689e8c7016fc1b77
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M internal.c
M pcidev.c
M programmer.h
3 files changed, 25 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/59275/2
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Id83bfd41f785f907e52a65a6689e8c7016fc1b77
Gerrit-Change-Number: 59275
Gerrit-PatchSet: 2
Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org>
Gerrit-MessageType: newpatchset
Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/59277 )
Change subject: pcidev: scandev_inclass WIP
......................................................................
pcidev: scandev_inclass WIP
more than one ISA bridge??
Change-Id: I1978e178fb73485f1c5c7e732853522847267cee
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M board_enable.c
M pcidev.c
M programmer.h
3 files changed, 25 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/59277/1
diff --git a/board_enable.c b/board_enable.c
index ae8ce2c..f3e8718 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -1551,26 +1551,20 @@
int i, allowed;
/* First, look for a known LPC bridge */
- for (dev = pacc->devices; dev; dev = dev->next) {
- uint16_t device_class;
- /* libpci before version 2.2.4 does not store class info. */
- device_class = pci_read_word(dev, PCI_CLASS_DEVICE);
- if ((dev->vendor_id == 0x8086) &&
- (device_class == 0x0601)) { /* ISA bridge */
- /* Is this device in our list? */
- for (i = 0; intel_ich_gpio_table[i].id; i++)
- if (dev->device_id == intel_ich_gpio_table[i].id)
- break;
-
- if (intel_ich_gpio_table[i].id)
- break;
- }
- }
-
+ dev = pcidev_scandev_inclass(0x0601, 0x8086); /* ISA bridge */
if (!dev) {
msg_perr("\nERROR: No known Intel LPC bridge found.\n");
return -1;
}
+ /* Is this device in our list? */
+ for (i = 0; intel_ich_gpio_table[i].id; i++)
+ if (dev->device_id == intel_ich_gpio_table[i].id)
+ break;
+
+ if (!intel_ich_gpio_table[i].id) {
+ msg_perr("\nERROR: No known Intel LPC bridge found.\n");
+ return -1;
+ }
/*
* According to the datasheets, all Intel ICHs have the GPIO bar 5:1
diff --git a/pcidev.c b/pcidev.c
index c9c86b8..e57b90c 100644
--- a/pcidev.c
+++ b/pcidev.c
@@ -157,6 +157,20 @@
return NULL;
}
+struct pci_dev *pcidev_scandev_inclass(uint16_t class, uint16_t vid)
+{
+ struct pci_dev *dev;
+ /* First, look for a known LPC bridge */
+ for (dev = pacc->devices; dev; dev = dev->next) {
+ uint16_t device_class;
+ /* libpci before version 2.2.4 does not store class info. */
+ device_class = pci_read_word(dev, PCI_CLASS_DEVICE);
+ if ((dev->vendor_id == vid) && (device_class == class))
+ return dev;
+ }
+ return NULL;
+}
+
struct pci_dev *pcidev_getdev(struct pci_dev *dev)
{
#if !defined(OLD_PCI_GET_DEV)
diff --git a/programmer.h b/programmer.h
index a78ee2a..41dc240 100644
--- a/programmer.h
+++ b/programmer.h
@@ -125,6 +125,7 @@
uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
struct pci_dev *pcidev_scandev(struct pci_filter *filter);
+struct pci_dev *pcidev_scandev_inclass(uint16_t class, uint16_t vid);
struct pci_dev *pcidev_getdev(struct pci_dev *dev);
/* rpci_write_* are reversible writes. The original PCI config space register
* contents will be restored on shutdown.
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I1978e178fb73485f1c5c7e732853522847267cee
Gerrit-Change-Number: 59277
Gerrit-PatchSet: 1
Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-MessageType: newchange
Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/59276 )
Change subject: pcidev: Move pci_get_dev() logic into canonical place
......................................................................
pcidev: Move pci_get_dev() logic into canonical place
Change-Id: Id9ce055d5e5d347520ec5002b8c6548e60eaa0a7
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M board_enable.c
M pcidev.c
M programmer.h
3 files changed, 15 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/76/59276/1
diff --git a/board_enable.c b/board_enable.c
index 9cf0103..ae8ce2c 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -1090,15 +1090,7 @@
return -1;
}
-#if !defined(OLD_PCI_GET_DEV)
- dev = pci_get_dev(pacc, dev->domain, dev->bus, dev->dev, 1);
-#else
- /* pciutils/libpci before version 2.2 is too old to support
- * PCI domains. Such old machines usually don't have domains
- * besides domain 0, so this is not a problem.
- */
- dev = pci_get_dev(pacc, dev->bus, dev->dev, 1);
-#endif
+ dev = pcidev_getdev(dev);
if (!dev) {
msg_perr("MCP SMBus controller could not be found\n");
return -1;
diff --git a/pcidev.c b/pcidev.c
index 32c6d30..c9c86b8 100644
--- a/pcidev.c
+++ b/pcidev.c
@@ -157,6 +157,19 @@
return NULL;
}
+struct pci_dev *pcidev_getdev(struct pci_dev *dev)
+{
+#if !defined(OLD_PCI_GET_DEV)
+ return pci_get_dev(pacc, dev->domain, dev->bus, dev->dev, 1);
+#else
+ /* pciutils/libpci before version 2.2 is too old to support
+ * PCI domains. Such old machines usually don't have domains
+ * besides domain 0, so this is not a problem.
+ */
+ return pci_get_dev(pacc, dev->bus, dev->dev, 1);
+#endif
+}
+
static int pcidev_shutdown(void *data)
{
if (pacc == NULL) {
diff --git a/programmer.h b/programmer.h
index d6de7bc..a78ee2a 100644
--- a/programmer.h
+++ b/programmer.h
@@ -125,6 +125,7 @@
uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
struct pci_dev *pcidev_scandev(struct pci_filter *filter);
+struct pci_dev *pcidev_getdev(struct pci_dev *dev);
/* rpci_write_* are reversible writes. The original PCI config space register
* contents will be restored on shutdown.
* To clone the pci_dev instances internally, the `pacc` global
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Id9ce055d5e5d347520ec5002b8c6548e60eaa0a7
Gerrit-Change-Number: 59276
Gerrit-PatchSet: 1
Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-MessageType: newchange
Attention is currently required from: Nico Huber, Angel Pons, Sergii Dmytruk.
Hello build bot (Jenkins), Nico Huber, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59072
to look at the new patch set (#4).
Change subject: [RFC] dummyflasher: support emulation of SR2
......................................................................
[RFC] dummyflasher: support emulation of SR2
This is needed for accessing second SRP bit which is involved in write
protection.
Change-Id: I177ae3f068f03380f5b3941d9996a07205672e59
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M dummyflasher.c
1 file changed, 60 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/72/59072/4
--
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Gerrit-Change-Id: I177ae3f068f03380f5b3941d9996a07205672e59
Gerrit-Change-Number: 59072
Gerrit-PatchSet: 4
Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
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Gerrit-MessageType: newpatchset
Attention is currently required from: Nico Huber, Angel Pons, Sergii Dmytruk.
Hello build bot (Jenkins), Nico Huber, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59071
to look at the new patch set (#4).
Change subject: [RFC] flashchips: enable write-protection for W25Q128.V
......................................................................
[RFC] flashchips: enable write-protection for W25Q128.V
Emulation of this chip will support WP.
This and follow up patches are based on unmerged WP patches by Nikolai
Artemiev:
https://review.coreboot.org/c/flashrom/+/58474/7
Change-Id: Iccb69a8d3a0dd2192e2c938caddaf07b1889ed35
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M flashchips.c
1 file changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/71/59071/4
--
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Gerrit-PatchSet: 4
Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
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