August 2020 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: chipset_enable.c: Add support for Intel C620 Series Chipset SPI Contr...
by Luka Kovacic (Code Review) Aug. 25, 2020

Aug. 25, 2020

Luka Kovacic has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/44162 ) Change subject: chipset_enable.c: Add support for Intel C620 Series Chipset SPI Controller ...................................................................... chipset_enable.c: Add support for Intel C620 Series Chipset SPI Controller Support for the Intel C620 Series Chipset SPI Controller (rev 04) is added to enable SPI flash access on the following platform: - Intel Xeon D-2187NT Support for this controller was shortly tested on the platform above. The flash is recognized, some regions of the flash are locked. Signed-off-by: Luka Kovacic <luka.kovacic(a)sartura.hr> Tested-by: Jakov Petrina <jakov.petrina(a)sartura.hr> Cc: Luka Perkov <luka.perkov(a)sartura.hr> Change-Id: If39d9bb1acd4029f802a44a2940dd23f66ba09b1 --- M chipset_enable.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/44162/1 diff --git a/chipset_enable.c b/chipset_enable.c index d56a547..4772a1c 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2023,6 +2023,7 @@ {0x8086, 0xa153, B_S, NT, "Intel", "QM175", enable_flash_pch100}, {0x8086, 0xa154, B_S, NT, "Intel", "CM238", enable_flash_pch100}, {0x8086, 0xa155, B_S, NT, "Intel", "QMU185", enable_flash_pch100}, + {0x8086, 0xa1a4, B_S, DEP, "Intel", "C620 Series Chipset (QS/PRQ)", enable_flash_c620}, {0x8086, 0xa1c0, B_S, NT, "Intel", "C620 Series Chipset (QS/PRQ)", enable_flash_c620}, {0x8086, 0xa1c1, B_S, NT, "Intel", "C621 Series Chipset (QS/PRQ)", enable_flash_c620}, {0x8086, 0xa1c2, B_S, NT, "Intel", "C622 Series Chipset (QS/PRQ)", enable_flash_c620}, -- To view, visit https://review.coreboot.org/c/flashrom/+/44162 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If39d9bb1acd4029f802a44a2940dd23f66ba09b1 Gerrit-Change-Number: 44162 Gerrit-PatchSet: 1 Gerrit-Owner: Luka Kovacic <luka.kovacic(a)sartura.hr> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: dediprog: Use 4BA page program without 0x12
by David Hendricks (Code Review) Aug. 25, 2020

Aug. 25, 2020

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/30521 Change subject: dediprog: Use 4BA page program without 0x12 ...................................................................... dediprog: Use 4BA page program without 0x12 It's not clear exactly what the difference is between WRITE_MODE_4B_ADDR_256B_PAGE_PGM with and without _0x12 from the SF600 command spec, but the former seems to work more reliably. Tested using an SF600 (FW v7.2.21), IS25LP256D, W25Q256JV, and MX25L25735. Change-Id: I3cb37ec8838f5bb02948ed52b4a2906fa033cf83 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M dediprog.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/21/30521/1 diff --git a/dediprog.c b/dediprog.c index 2a190d2..303f1d5 100644 --- a/dediprog.c +++ b/dediprog.c @@ -398,7 +398,8 @@ } } else if (dedi_spi_cmd == WRITE_MODE_PAGE_PGM) { if (flash->chip->feature_bits & FEATURE_4BA_WRITE) { - data_packet[3] = WRITE_MODE_4B_ADDR_256B_PAGE_PGM_0x12; +// data_packet[3] = WRITE_MODE_4B_ADDR_256B_PAGE_PGM_0x12; + data_packet[3] = WRITE_MODE_4B_ADDR_256B_PAGE_PGM; data_packet[4] = JEDEC_BYTE_PROGRAM_4BA; use_4ba = true; } else if (flash->in_4ba_mode) { -- To view, visit https://review.coreboot.org/c/flashrom/+/30521 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3cb37ec8838f5bb02948ed52b4a2906fa033cf83 Gerrit-Change-Number: 30521 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

1 1

Change in flashrom[master]: flashrom.c: do not delete programmer arguments
by Nikolai Artemiev (Code Review) Aug. 25, 2020

Aug. 25, 2020

Nikolai Artemiev has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/44562 ) Change subject: flashrom.c: do not delete programmer arguments ...................................................................... flashrom.c: do not delete programmer arguments Make extract_param() leave parameters in tact rather than deleting them as they are retrieved. Deleting them is undesierable as makes the function more complex and requires that extract_programmer_param() does not get called for the same parameter multiple times, which can be difficult to gaurentee for some programmer initialization cases. Change-Id: I9b1ec2d273c723fef8908e4ddf13b3079924f0a7 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M flashrom.c 1 file changed, 0 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/44562/1 diff --git a/flashrom.c b/flashrom.c index 4a30986..f3f0b46 100644 --- a/flashrom.c +++ b/flashrom.c @@ -750,11 +750,6 @@ } strncpy(opt, opt_pos, optlen); opt[optlen] = '\0'; - rest = opt_pos + optlen; - /* Skip all delimiters after the current parameter. */ - rest += strspn(rest, delim); - memmove(param_pos, rest, strlen(rest) + 1); - /* We could shrink haystack, but the effort is not worth it. */ } return opt; -- To view, visit https://review.coreboot.org/c/flashrom/+/44562 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9b1ec2d273c723fef8908e4ddf13b3079924f0a7 Gerrit-Change-Number: 44562 Gerrit-PatchSet: 1 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: Makefile: Fix building on AArch64 NixOS
by Pyry Kontio (Code Review) Aug. 24, 2020

Aug. 24, 2020

Pyry Kontio has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/43140 ) Change subject: Makefile: Fix building on AArch64 NixOS ...................................................................... Makefile: Fix building on AArch64 NixOS Signed-off-by: Pyry Kontio <pyry.kontio(a)drasa.eu> Change-Id: Iaa4477a71e758cf9ecad2c22f3b77bc6508a3510 --- M Makefile 1 file changed, 8 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/40/43140/1 diff --git a/Makefile b/Makefile index 803529f..6a2abd1 100644 --- a/Makefile +++ b/Makefile @@ -106,7 +106,8 @@ # IMPORTANT: The following line must be placed before TARGET_OS is ever used # (of course), but should come after any lines setting CC because the line # below uses CC itself. -override TARGET_OS := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E os.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"')) +override TARGET_OS := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E os.h 2>/dev/null \ + | grep -v '^\#' | grep '"' | tail -1 | cut -f 2 -d'"')) ifeq ($(TARGET_OS), Darwin) override CPPFLAGS += -I/opt/local/include -I/usr/local/include @@ -460,8 +461,10 @@ # IMPORTANT: The following line must be placed before ARCH is ever used # (of course), but should come after any lines setting CC because the line # below uses CC itself. -override ARCH := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E archtest.c 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"')) -override ENDIAN := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E endiantest.c 2>/dev/null | grep -v '^\#')) +override ARCH := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E archtest.c 2>/dev/null \ + | grep -v '^\#' | grep '"' | tail -1 | cut -f 2 -d'"')) +override ENDIAN := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E endiantest.c 2>/dev/null \ + | grep -v '^\#')) # Disable the internal programmer on unsupported architectures (everything but x86 and mipsel) ifneq ($(ARCH)-little, $(filter $(ARCH),x86 mips)-$(ENDIAN)) @@ -1253,12 +1256,12 @@ @printf "Target arch is " @# FreeBSD wc will output extraneous whitespace. @echo $(ARCH)|wc -w|grep -q '^[[:blank:]]*1[[:blank:]]*$$' || \ - ( echo "unknown. Aborting."; exit 1) + ( echo "unknown (\"$(ARCH)\"). Aborting."; exit 1) @printf "%s\n" '$(ARCH)' @printf "Target OS is " @# FreeBSD wc will output extraneous whitespace. @echo $(TARGET_OS)|wc -w|grep -q '^[[:blank:]]*1[[:blank:]]*$$' || \ - ( echo "unknown. Aborting."; exit 1) + ( echo "unknown (\"$(TARGET_OS)\"). Aborting."; exit 1) @printf "%s\n" '$(TARGET_OS)' ifeq ($(TARGET_OS), libpayload) @$(CC) --version 2>&1 | grep -q coreboot || \ -- To view, visit https://review.coreboot.org/c/flashrom/+/43140 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iaa4477a71e758cf9ecad2c22f3b77bc6508a3510 Gerrit-Change-Number: 43140 Gerrit-PatchSet: 1 Gerrit-Owner: Pyry Kontio <pyry.kontio(a)drasa.eu> Gerrit-MessageType: newchange

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Change in flashrom[master]: udelay.c: Enable providing delay calibration value through CLI
by Hrvoje Čavrak (Code Review) Aug. 21, 2020

Aug. 21, 2020

Hrvoje Čavrak has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/44517 ) Change subject: udelay.c: Enable providing delay calibration value through CLI ...................................................................... udelay.c: Enable providing delay calibration value through CLI This commit implements --get-loop-delay/--set-loop-delay options to retrieve and provide the calibration loop delay through the command line. The delay calibration procedure can take up to few seconds, which adds up when executed a number of times consecutively. Therefore, this provides a means to execute it only once, and then re-use the calibrated value on subsequent runs. Also, it implements a sanity check, expecting the value to land within 10% of the theoretical delay expectance, otherwise it ignores the provided value and runs the calibration procedure instead. Signed-off-by: Hrvoje Cavrak <hrvoje(a)hrvoje.org> Change-Id: I7c9a491c5cb5fb3af56a691a0c6af9b53dcff550 --- M cli_classic.c M flashrom.8.tmpl M libflashrom.c M programmer.h M udelay.c 5 files changed, 60 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/17/44517/1 diff --git a/cli_classic.c b/cli_classic.c index 967ff50..b023c45 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -63,6 +63,8 @@ " -o | --output <logfile> log output to <logfile>\n" " --flash-contents <ref-file> assume flash contents to be <ref-file>\n" " -L | --list-supported print supported devices\n" + " --set-loop-delay <value> set loop delay calibration manually\n" + " --get-loop-delay retrieve loop delay calibration\n" #if CONFIG_PRINT_WIKI == 1 " -z | --list-supported-wiki print supported devices in wiki syntax\n" #endif @@ -118,6 +120,7 @@ int flash_name = 0, flash_size = 0; int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0; int dont_verify_it = 0, dont_verify_all = 0, list_supported = 0, operation_specified = 0; + unsigned long provided_delay = 0; struct flashrom_layout *layout = NULL; enum programmer prog = PROGRAMMER_INVALID; enum { @@ -127,6 +130,8 @@ OPTION_FLASH_CONTENTS, OPTION_FLASH_NAME, OPTION_FLASH_SIZE, + OPTION_GET_LOOP_DELAY, + OPTION_SET_LOOP_DELAY, }; int ret = 0; @@ -156,6 +161,8 @@ {"help", 0, NULL, 'h'}, {"version", 0, NULL, 'R'}, {"output", 1, NULL, 'o'}, + {"get-loop-delay", 0, NULL, OPTION_GET_LOOP_DELAY}, + {"set-loop-delay", 1, NULL, OPTION_SET_LOOP_DELAY}, {NULL, 0, NULL, 0}, }; @@ -365,6 +372,14 @@ } #endif /* STANDALONE */ break; + case OPTION_GET_LOOP_DELAY: + /* Make it easy for scripts to parse this by omitting anything else */ + msg_pinfo("%lu\n", get_calibration_value()); + exit(0); + break; + case OPTION_SET_LOOP_DELAY: + provided_delay = strtoul(strdup(optarg), NULL, 0); + break; default: cli_classic_abort_usage(NULL); break; @@ -457,7 +472,10 @@ } /* FIXME: Delay calibration should happen in programmer code. */ - myusec_calibrate_delay(); + if (provided_delay) + set_external_calibration(provided_delay); + else + myusec_calibrate_delay(0); if (programmer_init(prog, pparam)) { msg_perr("Error: Programmer initialization failed.\n"); diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index db50d59..4aada91 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -50,7 +50,7 @@ [\fB\-E\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\fB\-v\fR <file>] [(\fB\-l\fR <file>|\fB\-\-ifd|\fB \-\-fmap\fR|\fB\-\-fmap-file\fR <file>) [\fB\-i\fR <image>]] [\fB\-n\fR] [\fB\-N\fR] [\fB\-f\fR])] - [\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>] + [\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>] [\fB-d\fR get | <value>] .SH DESCRIPTION .B flashrom is a utility for detecting, reading, writing, verifying and erasing flash @@ -364,6 +364,17 @@ .TP .B "\-R, \-\-version" Show version information and exit. +.TP +.B "\-\-get\-loop\-delay" +Retrieve the loop calibration delay value or provide one externally. Calibrate +delay procedure can take a few seconds and for repeated execution on a large +number of hosts it can provide a significant overhead. By getting the value, +it can later be provided by \-\-set\-loop\-delay +.TP +.B "\-\-set\-loop\-delay <value>" +This argument makes it possible to provide the calibration delay through the +command line option. + .SH PROGRAMMER-SPECIFIC INFORMATION Some programmer drivers accept further parameters to set programmer-specific parameters. These parameters are separated from the programmer name by a diff --git a/libflashrom.c b/libflashrom.c index ae2d33d..92e2527 100644 --- a/libflashrom.c +++ b/libflashrom.c @@ -51,7 +51,7 @@ { if (perform_selfcheck && selfcheck()) return 1; - myusec_calibrate_delay(); + myusec_calibrate_delay(0); return 0; } diff --git a/programmer.h b/programmer.h index c5cab18..e0925e2 100644 --- a/programmer.h +++ b/programmer.h @@ -280,9 +280,11 @@ /* udelay.c */ void myusec_delay(unsigned int usecs); -void myusec_calibrate_delay(void); +void myusec_calibrate_delay(int force); void internal_sleep(unsigned int usecs); void internal_delay(unsigned int usecs); +unsigned long get_calibration_value(void); +void set_external_calibration(unsigned long external_micro); #if CONFIG_INTERNAL == 1 /* board_enable.c */ diff --git a/udelay.c b/udelay.c index 6c0efc4..698f1ca 100644 --- a/udelay.c +++ b/udelay.c @@ -133,9 +133,9 @@ return timeusec; } -void myusec_calibrate_delay(void) +void myusec_calibrate_delay(int force) { - if (clock_check_res()) + if (clock_check_res() && !force) return; unsigned long count = 1000; @@ -221,6 +221,28 @@ msg_pinfo("OK.\n"); } +void set_external_calibration(unsigned long external_micro) +{ + micro = external_micro; + unsigned long elapsed = measure_delay(100000); + /* Do a sanity check if the provided parameter makes loops fall + * within 10% of the desired value. Otherwise, ignore provided value + * and recalibrate. + */ + if (elapsed > 90000 && elapsed < 110000) + msg_pinfo("Provided delay is acceptable!\n"); + else { + msg_pinfo("Elapsed: %lu, provided delay is NOT acceptable!\n", elapsed); + myusec_calibrate_delay(1); /* Ignore using the system clock for loop timing */ + } +} + +unsigned long get_calibration_value(void) +{ + myusec_calibrate_delay(1); /* Ignore using the system clock for loop timing */ + return micro; +} + /* Not very precise sleep. */ void internal_sleep(unsigned int usecs) { @@ -250,7 +272,7 @@ #else #include <libpayload.h> -void myusec_calibrate_delay(void) +void myusec_calibrate_delay(int force) { get_cpu_speed(); } -- To view, visit https://review.coreboot.org/c/flashrom/+/44517 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7c9a491c5cb5fb3af56a691a0c6af9b53dcff550 Gerrit-Change-Number: 44517 Gerrit-PatchSet: 1 Gerrit-Owner: Hrvoje Čavrak <github(a)hrvoje.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips: Add W25Q256JW_IM
by David Hendricks (Code Review) Aug. 19, 2020

Aug. 19, 2020

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/42386 ) Change subject: flashchips: Add W25Q256JW_IM ...................................................................... flashchips: Add W25Q256JW_IM W25Q256JW has two variants, the W25Q256JW with device ID 0x6019 added in CB:40855 and the W25q256JW-IM which is added by this patch. Change-Id: I50a6de2c915f9201c458378fcc49130ead73d8c4 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M flashchips.c M flashchips.h 2 files changed, 48 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/86/42386/1 diff --git a/flashchips.c b/flashchips.c index b4006df..dc43162 100644 --- a/flashchips.c +++ b/flashchips.c @@ -16808,6 +16808,53 @@ { .vendor = "Winbond", + .name = "W25Q256JW", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q256_JW, + .total_size = 32768, + .page_size = 256, + /* supports SFDP */ + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ + /* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1700, 1950}, + }, + + { + .vendor = "Winbond", .name = "W25Q32.V", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, diff --git a/flashchips.h b/flashchips.h index e5ef390..2a0cf80 100644 --- a/flashchips.h +++ b/flashchips.h @@ -945,6 +945,7 @@ #define WINBOND_NEX_W25Q256JV_M 0x7019 /* W25Q256JV_M (QE=0) */ #define WINBOND_NEX_W25Q64JW 0x8017 #define WINBOND_NEX_W25Q128_DTR 0x8018 /* W25Q128JW_DTR */ +#define WINBOND_NEX_W25Q256_JW 0x8019 /* W25Q256JW */ #define WINBOND_ID 0xDA /* Winbond */ #define WINBOND_W19B160BB 0x49 -- To view, visit https://review.coreboot.org/c/flashrom/+/42386 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I50a6de2c915f9201c458378fcc49130ead73d8c4 Gerrit-Change-Number: 42386 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

4 17

Change in flashrom[master]: udelay.c: Enable providing delay calibration value through CLI
by Hrvoje Čavrak (Code Review) Aug. 17, 2020

Aug. 17, 2020

Hrvoje Čavrak has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/39841 ) Change subject: udelay.c: Enable providing delay calibration value through CLI ...................................................................... udelay.c: Enable providing delay calibration value through CLI This commit implements --delay option to retrieve and provide the calibration loop delay through the command line. The delay calibration procedure can take up to few seconds, which adds up when executed a number of times consecutively. Therefore, this provides a means to execute it only once, and then re-use the calibrated value on subsequent runs. Also, it implements a sanity check, expecting the value to land within 10% of the theoretical delay expectance, otherwise it ignores the provided value and runs the calibration procedure instead. modified: cli_classic.c modified: flashrom.8.tmpl modified: programmer.h modified: udelay.c Change-Id: Iea2a7f62300663bc0a32ed4abced57c8c55c90c8 Signed-off-by: Hrvoje Cavrak <hrvoje(a)hrvoje.org> --- M cli_classic.c M flashrom.8.tmpl M programmer.h M udelay.c 4 files changed, 51 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/41/39841/1 diff --git a/cli_classic.c b/cli_classic.c index 73cc417..f0842d4 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -63,6 +63,8 @@ " -o | --output <logfile> log output to <logfile>\n" " --flash-contents <ref-file> assume flash contents to be <ref-file>\n" " -L | --list-supported print supported devices\n" + " -d | --loop-delay <value> set loop delay calibration manually\n" + " --loop-delay get show loop delay calibration\n" #if CONFIG_PRINT_WIKI == 1 " -z | --list-supported-wiki print supported devices in wiki syntax\n" #endif @@ -118,6 +120,7 @@ int flash_name = 0, flash_size = 0; int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0; int dont_verify_it = 0, dont_verify_all = 0, list_supported = 0, operation_specified = 0; + unsigned long provided_delay = 0; struct flashrom_layout *layout = NULL; enum programmer prog = PROGRAMMER_INVALID; enum { @@ -130,7 +133,7 @@ }; int ret = 0; - static const char optstring[] = "r:Rw:v:nNVEfc:l:i:p:Lzho:"; + static const char optstring[] = "r:Rw:v:nNVEfc:l:i:p:Lzho:d:"; static const struct option long_options[] = { {"read", 1, NULL, 'r'}, {"write", 1, NULL, 'w'}, @@ -156,6 +159,7 @@ {"help", 0, NULL, 'h'}, {"version", 0, NULL, 'R'}, {"output", 1, NULL, 'o'}, + {"delay", 1, NULL, 'd'}, {NULL, 0, NULL, 0}, }; @@ -362,6 +366,14 @@ } #endif /* STANDALONE */ break; + case 'd': + provided_delay = strtoul(strdup(optarg), NULL, 0); + if (!provided_delay) { + /* Make it easy for scripts to parse this by omitting anything else */ + msg_pinfo("%lu\n", get_calibration_value()); + exit(0); + } + break; default: cli_classic_abort_usage(NULL); break; @@ -454,7 +466,10 @@ } /* FIXME: Delay calibration should happen in programmer code. */ - myusec_calibrate_delay(); + if (provided_delay) + set_external_calibration(provided_delay); + else + myusec_calibrate_delay(); if (programmer_init(prog, pparam)) { msg_perr("Error: Programmer initialization failed.\n"); diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index fde98c0..c14f2de 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -50,7 +50,7 @@ [\fB\-E\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\fB\-v\fR <file>] [(\fB\-l\fR <file>|\fB\-\-ifd|\fB \-\-fmap\fR|\fB\-\-fmap-file\fR <file>) [\fB\-i\fR <image>]] [\fB\-n\fR] [\fB\-N\fR] [\fB\-f\fR])] - [\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>] + [\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>] [\fB-d\fR get | <value>] .SH DESCRIPTION .B flashrom is a utility for detecting, reading, writing, verifying and erasing flash @@ -364,6 +364,18 @@ .TP .B "\-R, \-\-version" Show version information and exit. +.TP +.B "\-d, \-\-loop\-delay" +Retrieve the loop calibration delay value or provide one externally. Calibrate +delay procedure can take a few seconds and for repeated execution on a large +number of hosts it can provide a significant overhead. Therefore, this argument +makes it possible to provide the calibration delay through the command line +option. + +To retrieve the value, run +.BR "flashrom \-\-loop\-delay get " "and to provide it during programming, add " +.BR "\-\-loop\-delay <value> " "to your command." + .SH PROGRAMMER-SPECIFIC INFORMATION Some programmer drivers accept further parameters to set programmer-specific parameters. These parameters are separated from the programmer name by a diff --git a/programmer.h b/programmer.h index 08500c6..a659a18 100644 --- a/programmer.h +++ b/programmer.h @@ -277,6 +277,8 @@ void myusec_calibrate_delay(void); void internal_sleep(unsigned int usecs); void internal_delay(unsigned int usecs); +unsigned long get_calibration_value(void); +void set_external_calibration(unsigned long external_micro); #if CONFIG_INTERNAL == 1 /* board_enable.c */ diff --git a/udelay.c b/udelay.c index 6c0efc4..90c4c9e 100644 --- a/udelay.c +++ b/udelay.c @@ -221,6 +221,25 @@ msg_pinfo("OK.\n"); } +void set_external_calibration(unsigned long external_micro) +{ + micro = external_micro; + unsigned long elapsed = measure_delay(100000); + /* Do a sanity check if the provided parameter makes loops fall within 10% of + * the desired value. Otherwise, ignore provided value and recalibrate. + */ + if (elapsed > 90000 && elapsed < 110000) + msg_pinfo("Provided delay is acceptable!\n"); + else + myusec_calibrate_delay(); +} + +unsigned long get_calibration_value(void) +{ + myusec_calibrate_delay(); + return micro; +} + /* Not very precise sleep. */ void internal_sleep(unsigned int usecs) { -- To view, visit https://review.coreboot.org/c/flashrom/+/39841 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iea2a7f62300663bc0a32ed4abced57c8c55c90c8 Gerrit-Change-Number: 39841 Gerrit-PatchSet: 1 Gerrit-Owner: Hrvoje Čavrak <github(a)hrvoje.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: meson.build: Use 'std=c17'
by HAOUAS Elyes (Code Review) Aug. 11, 2020

Aug. 11, 2020

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/44197 ) Change subject: meson.build: Use 'std=c17' ...................................................................... meson.build: Use 'std=c17' Currently, C17 is used as no C language dialect options are given. So meson should use the same. Change-Id: Id47c840c2ef24e57917ccd74e86418e700e6e409 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M meson.build 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/97/44197/1 diff --git a/meson.build b/meson.build index 04176f3..7675a34 100644 --- a/meson.build +++ b/meson.build @@ -2,7 +2,7 @@ version : run_command('util/getversion.sh', '-v').stdout().strip(), license : 'GPL-2.0', meson_version : '>=0.47.0', - default_options : ['warning_level=2', 'c_std=c99'], + default_options : ['warning_level=2', 'c_std=c17'], ) # libtool versioning -- To view, visit https://review.coreboot.org/c/flashrom/+/44197 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id47c840c2ef24e57917ccd74e86418e700e6e409 Gerrit-Change-Number: 44197 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips: Add support for BoyaMicro BY25Q128AS
by Jack Olsen (Code Review) Aug. 9, 2020

Aug. 9, 2020

Hello Steve Markgraf, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/44306 to review the following change. Change subject: flashchips: Add support for BoyaMicro BY25Q128AS ...................................................................... flashchips: Add support for BoyaMicro BY25Q128AS Tested with buspirate. Author: Jack Olsen <omegasec(a)tutanota.com> Date: Sat Aug 08 19:33:56 2020 +0200 Change-Id: If9546926a94f8af60039d0221c5baf6da958c5dc --- M flashchips.c M flashchips.h 2 files changed, 39 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/06/44306/1 diff --git a/flashchips.c b/flashchips.c index 3d8042d..09ac9b4 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8543,6 +8543,44 @@ { .vendor = "Macronix", + .name = "MX25L5121E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L5121E, + .total_size = 64, + .page_size = 32, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_bp1_srwd, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", .name = "MX25L6405", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, diff --git a/flashchips.h b/flashchips.h index f6e2588..4ae6c07 100644 --- a/flashchips.h +++ b/flashchips.h @@ -482,6 +482,7 @@ * Generalplus SPI chips seem to be compatible with Macronix * and use the same set of IDs. */ #define MACRONIX_MX25L512 0x2010 /* Same as MX25L512E, MX25V512, MX25V512C */ +#define MACRONIX_MX25L5121E 0x2210 #define MACRONIX_MX25L1005 0x2011 /* Same as MX25L1005C, MX25L1006E */ #define MACRONIX_MX25L2005 0x2012 /* Same as MX25L2005C, MX25L2006E */ #define MACRONIX_MX25L4005 0x2013 /* Same as MX25L4005A, MX25L4005C, MX25L4006E */ -- To view, visit https://review.coreboot.org/c/flashrom/+/44306 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If9546926a94f8af60039d0221c5baf6da958c5dc Gerrit-Change-Number: 44306 Gerrit-PatchSet: 1 Gerrit-Owner: Jack Olsen <omegasec(a)tutanota.com> Gerrit-Reviewer: Steve Markgraf <steve(a)steve-m.de> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips: Add support for Macronix MX25L5121E
by Steve Markgraf (Code Review) Aug. 4, 2020

Aug. 4, 2020

Steve Markgraf has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/43416 ) Change subject: flashchips: Add support for Macronix MX25L5121E ...................................................................... flashchips: Add support for Macronix MX25L5121E Change-Id: I881e2cda938083ba271b2ee0c457d2bbd8e1a766 Signed-off-by: Steve Markgraf <steve(a)steve-m.de> --- M flashchips.c M flashchips.h 2 files changed, 39 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/16/43416/1 diff --git a/flashchips.c b/flashchips.c index 48405fe..996865a 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8543,6 +8543,44 @@ { .vendor = "Macronix", + .name = "MX25L5121E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L5121E, + .total_size = 64, + .page_size = 32, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_bp1_srwd, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported, MX25L5121E supports dual I/O */ + .voltage = {2700, 3600}, /* 2.35-3.6V for MX25L5121E */ + }, + + { + .vendor = "Macronix", .name = "MX25L6405", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, diff --git a/flashchips.h b/flashchips.h index c58595d..597f659 100644 --- a/flashchips.h +++ b/flashchips.h @@ -482,6 +482,7 @@ * Generalplus SPI chips seem to be compatible with Macronix * and use the same set of IDs. */ #define MACRONIX_MX25L512 0x2010 /* Same as MX25L512E, MX25V512, MX25V512C */ +#define MACRONIX_MX25L5121E 0x2210 #define MACRONIX_MX25L1005 0x2011 /* Same as MX25L1005C, MX25L1006E */ #define MACRONIX_MX25L2005 0x2012 /* Same as MX25L2005C, MX25L2006E */ #define MACRONIX_MX25L4005 0x2013 /* Same as MX25L4005A, MX25L4005C, MX25L4006E */ -- To view, visit https://review.coreboot.org/c/flashrom/+/43416 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I881e2cda938083ba271b2ee0c457d2bbd8e1a766 Gerrit-Change-Number: 43416 Gerrit-PatchSet: 1 Gerrit-Owner: Steve Markgraf <steve(a)steve-m.de> Gerrit-MessageType: newchange

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