Angel Pons has uploaded a new patch set (#4) to the change originally created by Luc Verhaegen. ( https://review.coreboot.org/c/flashrom/+/29090 )
Change subject: ati: add r600_spi_command and r600_spi_master
......................................................................
ati: add r600_spi_command and r600_spi_master
Change-Id: I3d0bc682898f8eadadfe1f6db0d1383eb7639054
Signed-off-by: Luc Verhaegen <libv(a)skynet.be>
---
M ati_spi.c
M programmer.h
2 files changed, 121 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/90/29090/4
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I3d0bc682898f8eadadfe1f6db0d1383eb7639054
Gerrit-Change-Number: 29090
Gerrit-PatchSet: 4
Gerrit-Owner: Luc Verhaegen <libv(a)skynet.be>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/40468 )
Change subject: spi25: Debug flashrom crash when Write Protect is ON
......................................................................
spi25: Debug flashrom crash when Write Protect is ON
When hardware write protect is applied, flashrom crashed and
generate coredump. spi_disable_blockprotect_generic() calls
flash->chip->printlock() method when disable was failed,
but this method is optional, can be NULL depends on type of
flashrom chip. NULL pointer check before call is added to
avoid crash.
BRANCH=none
BUG=b:129083894
TEST=Run on Mistral P2
(On CR50 console, run "wp disable")
flashrom --wp-range 0 0x400000
flashrom --wp-enable
(On CR50 console, run "wp enable")
flashrom -r /tmp/test.bin
Verify "Block protection could not be disabled!" is shown,
but flash read completes.
Signed-off-by: Yuji Sasaki <sasakiy(a)chromium.org>
Change-Id: I81094ab5f16a85871fc9869a2e285eddbbbdec4e
Reviewed-on: https://chromium-review.googlesource.com/1535140
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator(a)appspot.gserviceaccount.com>
Tested-by: Edward O'Callaghan <quasisec(a)chromium.org>
Reviewed-by: Stefan Reinauer <reinauer(a)google.com>
Reviewed-by: SANTHOSH JANARDHANA HASSAN <sahassan(a)google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40468
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M spi25_statusreg.c
1 file changed, 2 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Stefan Reinauer: Looks good to me, approved
diff --git a/spi25_statusreg.c b/spi25_statusreg.c
index 4b9b2a9..34f9ad4 100644
--- a/spi25_statusreg.c
+++ b/spi25_statusreg.c
@@ -168,7 +168,8 @@
status = spi_read_status_register(flash);
if ((status & bp_mask) != 0) {
msg_cerr("Block protection could not be disabled!\n");
- flash->chip->printlock(flash);
+ if (flash->chip->printlock)
+ flash->chip->printlock(flash);
return 1;
}
msg_cdbg("disabled.\n");
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I81094ab5f16a85871fc9869a2e285eddbbbdec4e
Gerrit-Change-Number: 40468
Gerrit-PatchSet: 5
Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: SANTHOSH JANARDHANA HASSAN <sahassan(a)google.com>
Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Reviewer: Yuji Sasaki <sasakiy(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-CC: Yuji Sasaki <sasakiy(a)google.com>
Gerrit-MessageType: merged
Hello Brian Nemec,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/flashrom/+/41152
to review the following change.
Change subject: Subject: raiden_debug_spi.c: Disable USB retry during some error codes
......................................................................
Subject: raiden_debug_spi.c: Disable USB retry during some error codes
Enables the USB SPI transfer retry mechanism when the write count
error code is returned. This error code can indicate a recoverable
transfer failure.
BUG=b:153887087
BRANCH=none
TEST=Manual testing of ServoMicro and Flashrom when performing
reads, writes, and verifications of the EC firmware on Nami.
TEST=Modified servo micro to produce periodic errors when reading
the packet length to verify the recovery is successful.
Change-Id: I9e6b2ccec0b06aab0d6920f1bddf108058e5d6b1
---
M raiden_debug_spi.c
1 file changed, 7 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/52/41152/1
diff --git a/raiden_debug_spi.c b/raiden_debug_spi.c
index 2127f69..ac74c0b 100644
--- a/raiden_debug_spi.c
+++ b/raiden_debug_spi.c
@@ -188,9 +188,13 @@
static bool retry_recovery(int error_code)
{
if (error_code < 0x10000) {
- /* Handle error codes returned from the device. */
- if (USB_SPI_WRITE_COUNT_INVALID <= error_code &&
- error_code <= USB_SPI_DISABLED) {
+ /*
+ * Handle error codes returned from the device. USB_SPI_TIMEOUT,
+ * USB_SPI_BUSY, and USB_SPI_WRITE_COUNT_INVALID have been observed
+ * during transfer errors to the device and can be recovered.
+ */
+ if (USB_SPI_READ_COUNT_INVALID <= error_code &&
+ error_code <= USB_SPI_DISABLED) {
return false;
}
} else if (usb_device_is_libusb_error(error_code)) {
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I9e6b2ccec0b06aab0d6920f1bddf108058e5d6b1
Gerrit-Change-Number: 41152
Gerrit-PatchSet: 1
Gerrit-Owner: Brian Nemec <bnemec(a)google.com>
Gerrit-Reviewer: Brian Nemec <bnemec(a)chromium.org>
Gerrit-MessageType: newchange