June 2018 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: flashchips: Add Macronix MX25U51245G
by build bot (Jenkins) (Code Review) June 7, 2018

June 7, 2018

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26949 ) Change subject: flashchips: Add Macronix MX25U51245G ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom-customrules/1324/ : SUCCESS https://qa.coreboot.org/job/flashrom_gerrit/1095/ : SUCCESS -- To view, visit https://review.coreboot.org/26949 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2117fc205006088967f3d97644375d10db1791f1 Gerrit-Change-Number: 26949 Gerrit-PatchSet: 1 Gerrit-Owner: Daniel Thompson <daniel.thompson(a)linaro.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Jun 2018 13:49:37 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in flashrom[master]: programmer: Add Developerbox/CP2104 bit bang driver
by build bot (Jenkins) (Code Review) June 7, 2018

June 7, 2018

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26948 ) Change subject: programmer: Add Developerbox/CP2104 bit bang driver ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom-customrules/1325/ : SUCCESS https://qa.coreboot.org/job/flashrom_gerrit/1096/ : SUCCESS -- To view, visit https://review.coreboot.org/26948 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2547a96c1a2259ad0d52cd4b6ef42261b37cccf3 Gerrit-Change-Number: 26948 Gerrit-PatchSet: 1 Gerrit-Owner: Daniel Thompson <daniel.thompson(a)linaro.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Jun 2018 13:49:37 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in flashrom[master]: bitbang_spi: Half-duplex optimization
by Daniel Thompson (Code Review) June 7, 2018

June 7, 2018

Daniel Thompson has uploaded this change for review. ( https://review.coreboot.org/26947 Change subject: bitbang_spi: Half-duplex optimization ...................................................................... bitbang_spi: Half-duplex optimization Currently, the core of bitbang_spi is a full-duplex SPI loop but in practice this code is only ever used half-duplex. Spliting this code into two half duplex loops allows us to optimize performance by reducing communications and/or CPU pipeline stalls. Change-Id: I33b9f363716f651146c09113bda5fffe53b16738 Signed-off-by: Daniel Thompson <daniel.thompson(a)linaro.org> --- M bitbang_spi.c 1 file changed, 20 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/47/26947/1 diff --git a/bitbang_spi.c b/bitbang_spi.c index 2c7a3f1..3b5617b 100644 --- a/bitbang_spi.c +++ b/bitbang_spi.c @@ -119,14 +119,16 @@ return 0; } -static uint8_t bitbang_spi_rw_byte(const struct bitbang_spi_master *master, - uint8_t val) +static uint8_t bitbang_spi_read_byte(const struct bitbang_spi_master *master) { uint8_t ret = 0; int i; for (i = 7; i >= 0; i--) { - bitbang_spi_set_sck_set_mosi(master, 0, (val >> i) & 1); + if (i == 0) + bitbang_spi_set_sck_set_mosi(master, 0, 0); + else + bitbang_spi_set_sck(master, 0); programmer_delay(master->half_period); ret <<= 1; ret |= bitbang_spi_set_sck_get_miso(master, 1); @@ -135,6 +137,19 @@ return ret; } +static void bitbang_spi_write_byte(const struct bitbang_spi_master *master, + uint8_t val) +{ + int i; + + for (i = 7; i >= 0; i--) { + bitbang_spi_set_sck_set_mosi(master, 0, (val >> i) & 1); + programmer_delay(master->half_period); + bitbang_spi_set_sck(master, 1); + programmer_delay(master->half_period); + } +} + static int bitbang_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, @@ -150,9 +165,9 @@ bitbang_spi_request_bus(master); bitbang_spi_set_cs(master, 0); for (i = 0; i < writecnt; i++) - bitbang_spi_rw_byte(master, writearr[i]); + bitbang_spi_write_byte(master, writearr[i]); for (i = 0; i < readcnt; i++) - readarr[i] = bitbang_spi_rw_byte(master, 0); + readarr[i] = bitbang_spi_read_byte(master); bitbang_spi_set_sck(master, 0); programmer_delay(master->half_period); -- To view, visit https://review.coreboot.org/26947 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I33b9f363716f651146c09113bda5fffe53b16738 Gerrit-Change-Number: 26947 Gerrit-PatchSet: 1 Gerrit-Owner: Daniel Thompson <daniel.thompson(a)linaro.org>

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Change in flashrom[master]: programmer: Add Developerbox/CP2104 bit bang driver
by Daniel Thompson (Code Review) June 7, 2018

June 7, 2018

Daniel Thompson has uploaded this change for review. ( https://review.coreboot.org/26948 Change subject: programmer: Add Developerbox/CP2104 bit bang driver ...................................................................... programmer: Add Developerbox/CP2104 bit bang driver The 96Boards Developerbox (a.k.a. Synquacer E-series) provides a CP2102 debug UART with its GPIO pins hooked up to the SPI NOR FLASH. The circuit is intended to provide emergency recovery functions without requiring any additional tools (such as a JTAG or SPI programmer). This was expected to be very slow (and it is) but CP2102 is much cheaper than a full dual channel USB comms chip. Read performance is roughly on par with a 2400 baud modem (between 60 and 70 minutes per megabyte if you prefer) and write performance is 50% slower still. The full recovery process, with backup and verification of 4MB data written takes between 14 and 15 hours. Thus it is only really practical as an emergency recovery tool, firmware developers will need to use an alternative programmer. Change-Id: I2547a96c1a2259ad0d52cd4b6ef42261b37cccf3 Signed-off-by: Daniel Thompson <daniel.thompson(a)linaro.org> --- M Makefile A developerbox_spi.c M flashrom.c M programmer.h 4 files changed, 281 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/48/26948/1 diff --git a/Makefile b/Makefile index 943d88d..17cc8d5 100644 --- a/Makefile +++ b/Makefile @@ -153,12 +153,17 @@ else override CONFIG_PONY_SPI = no endif -# Dediprog, USB-Blaster, PICkit2, CH341A and FT2232 are not supported under DOS (missing USB support). +# Dediprog, Developerbox, USB-Blaster, PICkit2, CH341A and FT2232 are not supported under DOS (missing USB support). ifeq ($(CONFIG_DEDIPROG), yes) UNSUPPORTED_FEATURES += CONFIG_DEDIPROG=yes else override CONFIG_DEDIPROG = no endif +ifeq ($(CONFIG_DEVELOPERBOX), yes) +UNSUPPORTED_FEATURES += CONFIG_DEVELOPERBOX=yes +else +override CONFIG_DEVELOPERBOX = no +endif ifeq ($(CONFIG_FT2232_SPI), yes) UNSUPPORTED_FEATURES += CONFIG_FT2232_SPI=yes else @@ -310,12 +315,17 @@ else override CONFIG_PONY_SPI = no endif -# Dediprog, USB-Blaster, PICkit2, CH341A and FT2232 are not supported with libpayload (missing libusb support). +# Dediprog, Developerbox, USB-Blaster, PICkit2, CH341A and FT2232 are not supported with libpayload (missing libusb support). ifeq ($(CONFIG_DEDIPROG), yes) UNSUPPORTED_FEATURES += CONFIG_DEDIPROG=yes else override CONFIG_DEDIPROG = no endif +ifeq ($(CONFIG_DEVELOPERBOX), yes) +UNSUPPORTED_FEATURES += CONFIG_DEVELOPERBOX=yes +else +override CONFIG_DEVELOPERBOX = no +endif ifeq ($(CONFIG_FT2232_SPI), yes) UNSUPPORTED_FEATURES += CONFIG_FT2232_SPI=yes else @@ -626,6 +636,9 @@ # Always enable Dediprog SF100 for now. CONFIG_DEDIPROG ?= yes +# Always enable Developerbox emergency recovery for now. +CONFIG_DEVELOPERBOX ?= yes + # Always enable Marvell SATA controllers for now. CONFIG_SATAMV ?= yes @@ -666,6 +679,7 @@ ifeq ($(CONFIG_ENABLE_LIBUSB1_PROGRAMMERS), no) override CONFIG_CH341A_SPI = no override CONFIG_DEDIPROG = no +override CONFIG_DEVELOPERBOX = no endif ifeq ($(CONFIG_ENABLE_LIBPCI_PROGRAMMERS), no) override CONFIG_INTERNAL = no @@ -902,6 +916,12 @@ NEED_LIBUSB1 += CONFIG_DEDIPROG endif +ifeq ($(CONFIG_DEVELOPERBOX), yes) +FEATURE_CFLAGS += -D'CONFIG_DEVELOPERBOX=1' +PROGRAMMER_OBJS += developerbox_spi.o +NEED_LIBUSB1 += CONFIG_DEVELOPERBOX +endif + ifeq ($(CONFIG_SATAMV), yes) FEATURE_CFLAGS += -D'CONFIG_SATAMV=1' PROGRAMMER_OBJS += satamv.o diff --git a/developerbox_spi.c b/developerbox_spi.c new file mode 100644 index 0000000..cf5036a --- /dev/null +++ b/developerbox_spi.c @@ -0,0 +1,235 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2018 Linaro Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* Bit bang driver for the 96Boards Developerbox (a.k.a. Synquacer E-series) + * on-board debug UART. The Developerbox implements its debug UART using a + * CP2102N, a USB to UART bridge will also provides four GPIO pins. On + * Developerbox these can be hooked up to the onboard SPI NOR FLASH and used + * for emergency de-brick without any additional hardware programmer. Bit + * banging over USB is extremely slow compared to a proper SPI programmer so + * this is only practical as a de-brick tool. + * + * Schematic is available here: + * https://www.96boards.org/documentation/enterprise/developerbox/hardware-doc… + * + * To prepare a Developerbox for programming via the debug UART DSW4 must be + * changed from the default 00000000 to 10001000 (DSW4-1 and DSW4-5 should be + * turned on) + */ + +#include "platform.h" + +#include <sys/types.h> +#include <stdlib.h> +#include <stdio.h> +#include <string.h> +#include <limits.h> +#include <errno.h> +#include <libusb.h> +#include "flash.h" +#include "chipdrivers.h" +#include "programmer.h" +#include "spi.h" + +/* Bit positions for each pin. */ +#define DEVELOPERBOX_SPI_SCK 0 +#define DEVELOPERBOX_SPI_CS 1 +#define DEVELOPERBOX_SPI_MISO 2 +#define DEVELOPERBOX_SPI_MOSI 3 + +/* Config request types */ +#define REQTYPE_HOST_TO_DEVICE 0x40 +#define REQTYPE_DEVICE_TO_HOST 0xc0 + +/* Config request codes */ +#define CP210X_VENDOR_SPECIFIC 0xFF + +/* CP210X_VENDOR_SPECIFIC */ +#define CP210X_WRITE_LATCH 0x37E1 +#define CP210X_READ_LATCH 0x00C2 + +const struct dev_entry devs_developerbox[] = { + {0x10C4, 0xEA60, OK, "Silicon Labs", "CP2102N USB to UART Bridge Controller"}, + {0}, +}; + +struct libusb_context *usb_ctx; +static libusb_device_handle *cp210x_handle; + +static int cp210x_gpio_get() +{ + int res; + uint8_t gpio; + + res = libusb_control_transfer(cp210x_handle, REQTYPE_DEVICE_TO_HOST, + CP210X_VENDOR_SPECIFIC, CP210X_READ_LATCH, + 0, &gpio, 1, 0); + if (res < 0) { + msg_perr("Failed to read GPIO pins (%s)\n", libusb_error_name(res)); + return 0; + } + + return gpio; +} + +static void cp210x_gpio_set(uint8_t val, uint8_t mask) +{ + int res; + uint16_t gpio; + + gpio = ((val & 0xf) << 8) | (mask & 0xf); + + /* Set relay state on the card */ + res = libusb_control_transfer(cp210x_handle, REQTYPE_HOST_TO_DEVICE, + CP210X_VENDOR_SPECIFIC, CP210X_WRITE_LATCH, + gpio, NULL, 0, 0); + if (res < 0) + msg_perr("Failed to read GPIO pins (%s)\n", libusb_error_name(res)); +} + +static void cp210x_bitbang_set_cs(int val) +{ + cp210x_gpio_set(val << DEVELOPERBOX_SPI_CS, 1 << DEVELOPERBOX_SPI_CS); +} + +static void cp210x_bitbang_set_sck(int val) +{ + cp210x_gpio_set(val << DEVELOPERBOX_SPI_SCK, 1 << DEVELOPERBOX_SPI_SCK); +} + +static void cp210x_bitbang_set_mosi(int val) +{ + cp210x_gpio_set(val << DEVELOPERBOX_SPI_MOSI, 1 << DEVELOPERBOX_SPI_MOSI); +} + +static int cp210x_bitbang_get_miso(void) +{ + return !!(cp210x_gpio_get() & (1 << DEVELOPERBOX_SPI_MISO)); +} +static void cp210x_bitbang_set_sck_set_mosi(int sck, int mosi) +{ + cp210x_gpio_set(sck << DEVELOPERBOX_SPI_SCK | mosi << DEVELOPERBOX_SPI_MOSI, + 1 << DEVELOPERBOX_SPI_SCK | 1 << DEVELOPERBOX_SPI_MOSI); +} + +static const struct bitbang_spi_master bitbang_spi_master_cp210x = { + .type = BITBANG_SPI_MASTER_DEVELOPERBOX, + .set_cs = cp210x_bitbang_set_cs, + .set_sck = cp210x_bitbang_set_sck, + .set_mosi = cp210x_bitbang_set_mosi, + .get_miso = cp210x_bitbang_get_miso, + .set_sck_set_mosi = cp210x_bitbang_set_sck_set_mosi, +}; + +static struct libusb_device_handle *get_device_by_vid_pid_serial(uint16_t vid, uint16_t pid, char *serialno) +{ + struct libusb_device **list; + ssize_t count = libusb_get_device_list(usb_ctx, &list); + if (count < 0) { + msg_perr("Getting the USB device list failed (%s)!\n", libusb_error_name(count)); + return NULL; + } + + ssize_t i = 0; + for (i = 0; i < count; i++) { + struct libusb_device *dev = list[i]; + struct libusb_device_descriptor desc; + struct libusb_device_handle *handle; + + int res = libusb_get_device_descriptor(dev, &desc); + if (res != 0) { + msg_perr("Reading the USB device descriptor failed (%s)!\n", libusb_error_name(res)); + continue; + } + + if ((desc.idVendor != vid) && (desc.idProduct != pid)) + continue; + + msg_pdbg("Found USB device %04"PRIx16":%04"PRIx16" at address %d-%d.\n", + desc.idVendor, desc.idProduct, + libusb_get_bus_number(dev), libusb_get_device_address(dev)); + + res = libusb_open(dev, &handle); + if (res != 0) { + msg_perr("Opening the USB device failed (%s)!\n", libusb_error_name(res)); + continue; + } + + if (serialno) { + unsigned char myserial[64]; + res = libusb_get_string_descriptor_ascii(handle, desc.iSerialNumber, myserial, 64); + if (res < 0) { + msg_perr("Reading the USB serialno failed (%s)!\n", libusb_error_name(res)); + libusb_close(handle); + continue; + } + msg_pdbg("Serial number is %s\n", myserial); + + if (0 != strncmp(serialno, (char *) myserial, strlen(serialno))) { + libusb_close(handle); + continue; + } + } + + libusb_free_device_list(list, 1); + return handle; + } + + libusb_free_device_list(list, 1); + return NULL; +} + +static int developerbox_spi_shutdown(void *data) +{ + libusb_close(cp210x_handle); + libusb_exit(usb_ctx); + + return 0; +} + +int developerbox_spi_init() +{ + char *serialno = extract_programmer_param("serial"); + if (serialno) + msg_pinfo("Looking for serial number commencing %s\n", serialno); + + libusb_init(&usb_ctx); + if (!usb_ctx) { + msg_perr("Could not initialize libusb!\n"); + free(serialno); + return 1; + } + + const uint16_t vid = devs_developerbox[0].vendor_id; + const uint16_t pid = devs_developerbox[0].device_id; + cp210x_handle = get_device_by_vid_pid_serial(vid, pid, serialno); + free(serialno); + if (!cp210x_handle) { + msg_perr("Could not find a Developerbox programmer on USB.\n"); + libusb_exit(usb_ctx); + return 1; + } + + if (register_shutdown(developerbox_spi_shutdown, NULL)) + return 1; + + if (register_spi_bitbang_master(&bitbang_spi_master_cp210x)) { + /* This should never happen. */ + msg_perr("Developerbox bitbang SPI master init failed!\n"); + return 1; + } + + return 0; +} diff --git a/flashrom.c b/flashrom.c index f85dbb1..6f8fc74 100644 --- a/flashrom.c +++ b/flashrom.c @@ -255,6 +255,18 @@ }, #endif +#if CONFIG_DEVELOPERBOX == 1 + { + .name = "developerbox", + .type = USB, + .devs.dev = devs_developerbox, + .init = developerbox_spi_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_RAYER_SPI == 1 { .name = "rayer_spi", diff --git a/programmer.h b/programmer.h index 7bb51eb..e19b65a 100644 --- a/programmer.h +++ b/programmer.h @@ -73,6 +73,9 @@ #if CONFIG_DEDIPROG == 1 PROGRAMMER_DEDIPROG, #endif +#if CONFIG_DEVELOPERBOX == 1 + PROGRAMMER_DEVELOPERBOX, +#endif #if CONFIG_RAYER_SPI == 1 PROGRAMMER_RAYER_SPI, #endif @@ -169,6 +172,9 @@ #if CONFIG_OGP_SPI == 1 BITBANG_SPI_MASTER_OGP, #endif +#if CONFIG_DEVELOPERBOX == 1 + BITBANG_SPI_MASTER_DEVELOPERBOX, +#endif }; struct bitbang_spi_master { @@ -545,6 +551,12 @@ extern const struct dev_entry devs_dediprog[]; #endif +/* developerbox_spi.c */ +#if CONFIG_DEVELOPERBOX == 1 +int developerbox_spi_init(void); +extern const struct dev_entry devs_developerbox[]; +#endif + /* ch341a_spi.c */ #if CONFIG_CH341A_SPI == 1 int ch341a_spi_init(void); -- To view, visit https://review.coreboot.org/26948 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I2547a96c1a2259ad0d52cd4b6ef42261b37cccf3 Gerrit-Change-Number: 26948 Gerrit-PatchSet: 1 Gerrit-Owner: Daniel Thompson <daniel.thompson(a)linaro.org>

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Change in flashrom[master]: flashchips: Add Macronix MX25U51245G
by Daniel Thompson (Code Review) June 7, 2018

June 7, 2018

Daniel Thompson has uploaded this change for review. ( https://review.coreboot.org/26949 Change subject: flashchips: Add Macronix MX25U51245G ...................................................................... flashchips: Add Macronix MX25U51245G Copy 'n paste support for Macronix MX25U51245G. I don't pretend to know a whole lot about SPI FLASH so its mostly copied from other MX25U devices and double checked a few bits and pieces against the datasheet. I have tested basic probe, read, erase and write using layout files. I tested both with 4MB@0x0000000 and 64K0@0x3f00000 (the later means I have tested 4-byte addressing). Change-Id: I2117fc205006088967f3d97644375d10db1791f1 Signed-off-by: Daniel Thompson <daniel.thompson(a)linaro.org> --- M flashchips.c M flashchips.h 2 files changed, 41 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/49/26949/1 diff --git a/flashchips.c b/flashchips.c index 17cb1b4..64e5ed2 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8563,6 +8563,46 @@ { .vendor = "Macronix", + .name = "MX25U51245G", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25U51245G, + .total_size = 65536, + .page_size = 256, + /* OTP: 512B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_4BA, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 2048} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {64 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + /* TODO: security register */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ + .unlock = spi_disable_blockprotect_bp3_srwd, + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 2000}, + }, + + { + .vendor = "Macronix", .name = "MX25L6495F", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, diff --git a/flashchips.h b/flashchips.h index 5dedb38..d9219ee 100644 --- a/flashchips.h +++ b/flashchips.h @@ -491,6 +491,7 @@ #define MACRONIX_MX25U6435E 0x2537 /* Same as MX25U6435F */ #define MACRONIX_MX25U12835E 0x2538 /* Same as MX25U12835F */ #define MACRONIX_MX25U25635F 0x2539 +#define MACRONIX_MX25U51245G 0x253a #define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */ #define MACRONIX_MX25L6495F 0x9517 -- To view, visit https://review.coreboot.org/26949 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I2117fc205006088967f3d97644375d10db1791f1 Gerrit-Change-Number: 26949 Gerrit-PatchSet: 1 Gerrit-Owner: Daniel Thompson <daniel.thompson(a)linaro.org>

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Change in flashrom[master]: bitbang_spi: Add functions to optimize xfers
by Daniel Thompson (Code Review) June 7, 2018

June 7, 2018

Daniel Thompson has uploaded this change for review. ( https://review.coreboot.org/26946 Change subject: bitbang_spi: Add functions to optimize xfers ...................................................................... bitbang_spi: Add functions to optimize xfers On systems where the overhead of getting/setting pins is much greater than the half period (for example, USB bit banging) it significantly boosts performance if we can bang more than one bit at the same time. Add support for setting sck at the same time as mosi or miso activity. Change-Id: Ic3430a9df34844cdfa82e109456be788eaa1789a Signed-off-by: Daniel Thompson <daniel.thompson(a)linaro.org> --- M bitbang_spi.c M programmer.h 2 files changed, 27 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/46/26946/1 diff --git a/bitbang_spi.c b/bitbang_spi.c index edbc3e9..2c7a3f1 100644 --- a/bitbang_spi.c +++ b/bitbang_spi.c @@ -32,16 +32,6 @@ master->set_sck(val); } -static void bitbang_spi_set_mosi(const struct bitbang_spi_master * const master, int val) -{ - master->set_mosi(val); -} - -static int bitbang_spi_get_miso(const struct bitbang_spi_master * const master) -{ - return master->get_miso(); -} - static void bitbang_spi_request_bus(const struct bitbang_spi_master * const master) { if (master->request_bus) @@ -54,6 +44,26 @@ master->release_bus(); } +static void bitbang_spi_set_sck_set_mosi(const struct bitbang_spi_master * const master, int sck, int mosi) +{ + if (master->set_sck_set_mosi) { + master->set_sck_set_mosi(sck, mosi); + return; + } + + master->set_sck(sck); + master->set_mosi(mosi); +} + +static int bitbang_spi_set_sck_get_miso(const struct bitbang_spi_master * const master, int sck) +{ + if (master->set_sck_get_miso) + return master->set_sck_get_miso(sck); + + master->set_sck(sck); + return master->get_miso(); +} + static int bitbang_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, @@ -101,8 +111,7 @@ /* Only mess with the bus if we're sure nobody else uses it. */ bitbang_spi_request_bus(master); bitbang_spi_set_cs(master, 1); - bitbang_spi_set_sck(master, 0); - bitbang_spi_set_mosi(master, 0); + bitbang_spi_set_sck_set_mosi(master, 0, 0); /* FIXME: Release SPI bus here and request it again for each command or * don't release it now and only release it on programmer shutdown? */ @@ -117,13 +126,11 @@ int i; for (i = 7; i >= 0; i--) { - bitbang_spi_set_mosi(master, (val >> i) & 1); + bitbang_spi_set_sck_set_mosi(master, 0, (val >> i) & 1); programmer_delay(master->half_period); - bitbang_spi_set_sck(master, 1); ret <<= 1; - ret |= bitbang_spi_get_miso(master); + ret |= bitbang_spi_set_sck_get_miso(master, 1); programmer_delay(master->half_period); - bitbang_spi_set_sck(master, 0); } return ret; } @@ -147,6 +154,7 @@ for (i = 0; i < readcnt; i++) readarr[i] = bitbang_spi_rw_byte(master, 0); + bitbang_spi_set_sck(master, 0); programmer_delay(master->half_period); bitbang_spi_set_cs(master, 1); programmer_delay(master->half_period); diff --git a/programmer.h b/programmer.h index e49f262..7bb51eb 100644 --- a/programmer.h +++ b/programmer.h @@ -181,6 +181,9 @@ int (*get_miso) (void); void (*request_bus) (void); void (*release_bus) (void); + /* optional functions to optimize xfers */ + void (*set_sck_set_mosi) (int sck, int mosi); + int (*set_sck_get_miso) (int sck); /* Length of half a clock period in usecs. */ unsigned int half_period; }; -- To view, visit https://review.coreboot.org/26946 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic3430a9df34844cdfa82e109456be788eaa1789a Gerrit-Change-Number: 26946 Gerrit-PatchSet: 1 Gerrit-Owner: Daniel Thompson <daniel.thompson(a)linaro.org>

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Change in flashrom[master]: Add support for AT25DF021A
by build bot (Jenkins) (Code Review) June 6, 2018

June 6, 2018

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26856 ) Change subject: Add support for AT25DF021A ...................................................................... Patch Set 4: Build Successful https://qa.coreboot.org/job/flashrom-customrules/1321/ : SUCCESS -- To view, visit https://review.coreboot.org/26856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If4990e6856c8b77567ef4218459cf754b9c6bc57 Gerrit-Change-Number: 26856 Gerrit-PatchSet: 4 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jun 2018 08:58:07 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in flashrom[master]: Add support for AT25DF021A
by Nico Huber (Code Review) June 6, 2018

June 6, 2018

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/26856 ) Change subject: Add support for AT25DF021A ...................................................................... Add support for AT25DF021A This is the low-voltage version of the AT25DF021. Tested with FT2232H Mini Module Change-Id: If4990e6856c8b77567ef4218459cf754b9c6bc57 Signed-off-by: Steffen Mauch <steffen.mauch(a)gmail.com> Reviewed-on: https://review.coreboot.org/26856 Reviewed-by: David Hendricks <david.hendricks(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M flashchips.c M flashchips.h 2 files changed, 40 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified David Hendricks: Looks good to me, approved diff --git a/flashchips.c b/flashchips.c index 9898fa7..17cb1b4 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1519,6 +1519,45 @@ { .vendor = "Atmel", + .name = "AT25DF021A", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25DF021A, + .total_size = 256, + .page_size = 256, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 8} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_at25df, + .unlock = spi_disable_blockprotect_at2x_global_unprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1650, 3600}, + }, + + { + .vendor = "Atmel", .name = "AT25DF041A", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, diff --git a/flashchips.h b/flashchips.h index dfbda5d..5dedb38 100644 --- a/flashchips.h +++ b/flashchips.h @@ -128,6 +128,7 @@ #define ATMEL_ID 0x1F /* Atmel (now used by Adesto) */ #define ATMEL_AT25DF021 0x4300 +#define ATMEL_AT25DF021A 0x4301 #define ATMEL_AT25DF041A 0x4401 #define ATMEL_AT25DF081 0x4502 /* EDI 0x00. AT25DL081 has same ID + EDI 0x0100 */ #define ATMEL_AT25DF081A 0x4501 /* Yes, 81A has a lower number than 81 */ -- To view, visit https://review.coreboot.org/26856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: If4990e6856c8b77567ef4218459cf754b9c6bc57 Gerrit-Change-Number: 26856 Gerrit-PatchSet: 4 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[master]: Add support for AT25DF021A
by David Hendricks (Code Review) June 6, 2018

June 6, 2018

David Hendricks has posted comments on this change. ( https://review.coreboot.org/26856 ) Change subject: Add support for AT25DF021A ...................................................................... Patch Set 3: Code-Review+2 Fixed the commit message as per discussion on the github PR. -- To view, visit https://review.coreboot.org/26856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If4990e6856c8b77567ef4218459cf754b9c6bc57 Gerrit-Change-Number: 26856 Gerrit-PatchSet: 3 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jun 2018 05:04:16 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in flashrom[master]: Add support for AT25DF021A
by build bot (Jenkins) (Code Review) June 6, 2018

June 6, 2018

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26856 ) Change subject: Add support for AT25DF021A ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/flashrom-customrules/1320/ : SUCCESS https://qa.coreboot.org/job/flashrom_gerrit/1092/ : SUCCESS -- To view, visit https://review.coreboot.org/26856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If4990e6856c8b77567ef4218459cf754b9c6bc57 Gerrit-Change-Number: 26856 Gerrit-PatchSet: 3 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jun 2018 05:03:45 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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