December 2017 - flashrom-gerrit

Change in flashrom[master]: Move endianness definitions and provide it inside Makefile
by Nico Huber (Code Review) Dec. 1, 2017

Dec. 1, 2017

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22670 Change subject: Move endianness definitions and provide it inside Makefile ...................................................................... Move endianness definitions and provide it inside Makefile Add an `endiantest.c` similar to `archtest.c` to provide the endianness inside the Makefile. The __FLASHROM_(LITTLE|BIG)_ENDIAN__ definitions had to move from `hwaccess.h` into `platform.h`, therefor. This will be used to decide whether to build the internal programmer in a follow- up. Change-Id: I55dcf5a88da48f885cda9ad89ab87395d895a891 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M Makefile A endiantest.c M hwaccess.h M platform.h 4 files changed, 89 insertions(+), 83 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/22670/1 diff --git a/Makefile b/Makefile index 5bd7158..bd2cc10 100644 --- a/Makefile +++ b/Makefile @@ -376,6 +376,7 @@ # (of course), but should come after any lines setting CC because the line # below uses CC itself. override ARCH := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E archtest.c 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"')) +override ENDIAN := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E endiantest.c 2>/dev/null | grep -v '^\#')) # PCI port I/O support is unimplemented on PPC/MIPS/SPARC and unavailable on ARM. # Right now this means the drivers below only work on x86. diff --git a/endiantest.c b/endiantest.c new file mode 100644 index 0000000..de44ec5 --- /dev/null +++ b/endiantest.c @@ -0,0 +1,6 @@ +#include "platform.h" +#if __FLASHROM_LITTLE_ENDIAN__ +little +#else +big +#endif diff --git a/hwaccess.h b/hwaccess.h index b006d05..bc5cb9b 100644 --- a/hwaccess.h +++ b/hwaccess.h @@ -43,89 +43,6 @@ #undef index #endif /* NEED_PCI == 1 */ - -/* The next big hunk tries to guess endianess from various preprocessor macros */ -/* First some error checking in case some weird header has defined both. - * NB: OpenBSD always defines _BIG_ENDIAN and _LITTLE_ENDIAN. */ -#if defined (__LITTLE_ENDIAN__) && defined (__BIG_ENDIAN__) -#error Conflicting endianness #define -#endif - -#if IS_X86 - -/* All x86 is little-endian. */ -#define __FLASHROM_LITTLE_ENDIAN__ 1 - -#elif IS_MIPS - -/* MIPS can be either endian. */ -#if defined (__MIPSEL) || defined (__MIPSEL__) || defined (_MIPSEL) || defined (MIPSEL) -#define __FLASHROM_LITTLE_ENDIAN__ 1 -#elif defined (__MIPSEB) || defined (__MIPSEB__) || defined (_MIPSEB) || defined (MIPSEB) -#define __FLASHROM_BIG_ENDIAN__ 1 -#endif - -#elif IS_PPC - -/* PowerPC can be either endian. */ -#if defined (_BIG_ENDIAN) || defined (__BIG_ENDIAN__) -#define __FLASHROM_BIG_ENDIAN__ 1 -#elif defined (_LITTLE_ENDIAN) || defined (__LITTLE_ENDIAN__) -#define __FLASHROM_LITTLE_ENDIAN__ 1 -#endif - -#elif IS_ARM - -/* ARM can be either endian. */ -#if defined (__ARMEB__) -#define __FLASHROM_BIG_ENDIAN__ 1 -#elif defined (__ARMEL__) -#define __FLASHROM_LITTLE_ENDIAN__ 1 -#endif - -#elif IS_SPARC -/* SPARC is big endian in general (but allows to access data in little endian too). */ -#define __FLASHROM_BIG_ENDIAN__ 1 - -#endif /* IS_? */ - -#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__) - -/* If architecture-specific approaches fail try generic variants. First: BSD (works about everywhere). */ -#if !IS_WINDOWS -#include <sys/param.h> - -#if defined (__BYTE_ORDER) -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define __FLASHROM_LITTLE_ENDIAN__ -#elif __BYTE_ORDER == __BIG_ENDIAN -#define __FLASHROM_BIG_ENDIAN__ -#else -#error Unknown byte order! -#endif -#endif /* defined __BYTE_ORDER */ -#endif /* !IS_WINDOWS */ - -#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__) - -/* Nonstandard libc-specific macros for determining endianness. */ -/* musl provides an endian.h as well... but it can not be detected from within C. */ -#if defined(__GLIBC__) -#include <endian.h> -#if BYTE_ORDER == LITTLE_ENDIAN -#define __FLASHROM_LITTLE_ENDIAN__ 1 -#elif BYTE_ORDER == BIG_ENDIAN -#define __FLASHROM_BIG_ENDIAN__ 1 -#endif -#endif -#endif - -#endif - -#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__) -#error Unable to determine endianness. -#endif - #define ___constant_swab8(x) ((uint8_t) ( \ (((uint8_t)(x) & (uint8_t)0xffU)))) diff --git a/platform.h b/platform.h index b2fdcd0..e3b7674 100644 --- a/platform.h +++ b/platform.h @@ -81,4 +81,86 @@ #error Unknown architecture #endif +/* The next big hunk tries to guess endianess from various preprocessor macros */ +/* First some error checking in case some weird header has defined both. + * NB: OpenBSD always defines _BIG_ENDIAN and _LITTLE_ENDIAN. */ +#if defined (__LITTLE_ENDIAN__) && defined (__BIG_ENDIAN__) +#error Conflicting endianness #define +#endif + +#if IS_X86 + +/* All x86 is little-endian. */ +#define __FLASHROM_LITTLE_ENDIAN__ 1 + +#elif IS_MIPS + +/* MIPS can be either endian. */ +#if defined (__MIPSEL) || defined (__MIPSEL__) || defined (_MIPSEL) || defined (MIPSEL) +#define __FLASHROM_LITTLE_ENDIAN__ 1 +#elif defined (__MIPSEB) || defined (__MIPSEB__) || defined (_MIPSEB) || defined (MIPSEB) +#define __FLASHROM_BIG_ENDIAN__ 1 +#endif + +#elif IS_PPC + +/* PowerPC can be either endian. */ +#if defined (_BIG_ENDIAN) || defined (__BIG_ENDIAN__) +#define __FLASHROM_BIG_ENDIAN__ 1 +#elif defined (_LITTLE_ENDIAN) || defined (__LITTLE_ENDIAN__) +#define __FLASHROM_LITTLE_ENDIAN__ 1 +#endif + +#elif IS_ARM + +/* ARM can be either endian. */ +#if defined (__ARMEB__) +#define __FLASHROM_BIG_ENDIAN__ 1 +#elif defined (__ARMEL__) +#define __FLASHROM_LITTLE_ENDIAN__ 1 +#endif + +#elif IS_SPARC +/* SPARC is big endian in general (but allows to access data in little endian too). */ +#define __FLASHROM_BIG_ENDIAN__ 1 + +#endif /* IS_? */ + +#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__) + +/* If architecture-specific approaches fail try generic variants. First: BSD (works about everywhere). */ +#if !IS_WINDOWS +#include <sys/param.h> + +#if defined (__BYTE_ORDER) +#if __BYTE_ORDER == __LITTLE_ENDIAN +#define __FLASHROM_LITTLE_ENDIAN__ +#elif __BYTE_ORDER == __BIG_ENDIAN +#define __FLASHROM_BIG_ENDIAN__ +#else +#error Unknown byte order! +#endif +#endif /* defined __BYTE_ORDER */ +#endif /* !IS_WINDOWS */ + +#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__) + +/* Nonstandard libc-specific macros for determining endianness. */ +/* musl provides an endian.h as well... but it can not be detected from within C. */ +#if defined(__GLIBC__) +#include <endian.h> +#if BYTE_ORDER == LITTLE_ENDIAN +#define __FLASHROM_LITTLE_ENDIAN__ 1 +#elif BYTE_ORDER == BIG_ENDIAN +#define __FLASHROM_BIG_ENDIAN__ 1 +#endif +#endif +#endif + +#endif + +#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__) +#error Unable to determine endianness. +#endif + #endif /* !__PLATFORM_H__ */ -- To view, visit https://review.coreboot.org/22670 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I55dcf5a88da48f885cda9ad89ab87395d895a891 Gerrit-Change-Number: 22670 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in flashrom[master]: internal: Only build on x86 and mipsel
by Nico Huber (Code Review) Dec. 1, 2017

Dec. 1, 2017

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22671 Change subject: internal: Only build on x86 and mipsel ...................................................................... internal: Only build on x86 and mipsel internal_init() explicitly fails on everything but x86 and mipsel. Instead, we can just never build the internal programmer on other architectures and drop a lot of #if boilerplate. Change-Id: I672ddab0415df3baa49ff39a1c9db1b41d8143a4 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M Makefile M internal.c 2 files changed, 12 insertions(+), 38 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/71/22671/1 diff --git a/Makefile b/Makefile index bd2cc10..a97761f 100644 --- a/Makefile +++ b/Makefile @@ -378,6 +378,15 @@ override ARCH := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E archtest.c 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"')) override ENDIAN := $(strip $(call debug_shell,$(CC) $(CPPFLAGS) -E endiantest.c 2>/dev/null | grep -v '^\#')) +# Disable the internal programmer on unsupported architectures (everything but x86 and mipsel) +ifneq ($(ARCH)-little, $(filter $(ARCH),x86 mips)-$(ENDIAN)) +ifeq ($(CONFIG_INTERNAL), yes) +UNSUPPORTED_FEATURES += CONFIG_INTERNAL=yes +else +override CONFIG_INTERNAL = no +endif +endif + # PCI port I/O support is unimplemented on PPC/MIPS/SPARC and unavailable on ARM. # Right now this means the drivers below only work on x86. ifneq ($(ARCH), x86) @@ -422,11 +431,6 @@ # architectures with unknown raw access properties. # Right now those architectures are alpha hppa m68k sh s390 ifneq ($(ARCH),$(filter $(ARCH),x86 mips ppc arm sparc)) -ifeq ($(CONFIG_INTERNAL), yes) -UNSUPPORTED_FEATURES += CONFIG_INTERNAL=yes -else -override CONFIG_INTERNAL = no -endif ifeq ($(CONFIG_RAYER_SPI), yes) UNSUPPORTED_FEATURES += CONFIG_RAYER_SPI=yes else diff --git a/internal.c b/internal.c index 276e14b..4d58eb9 100644 --- a/internal.c +++ b/internal.c @@ -25,7 +25,6 @@ #include "programmer.h" #include "hwaccess.h" -#if NEED_PCI == 1 struct pci_dev *pci_dev_find_filter(struct pci_filter filter) { struct pci_dev *temp; @@ -94,13 +93,11 @@ return NULL; } -#endif -#if CONFIG_INTERNAL == 1 int force_boardenable = 0; int force_boardmismatch = 0; -#if defined(__i386__) || defined(__x86_64__) +#if IS_X86 void probe_superio(void) { probe_superio_winbond(); @@ -131,7 +128,6 @@ int is_laptop = 0; int laptop_ok = 0; -#if IS_X86 || IS_MIPS static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); static void internal_chip_writew(const struct flashctx *flash, uint16_t val, @@ -156,20 +152,17 @@ .chip_writel = internal_chip_writel, .chip_writen = fallback_chip_writen, }; -#endif enum chipbustype internal_buses_supported = BUS_NONE; int internal_init(void) { -#if defined __FLASHROM_LITTLE_ENDIAN__ int ret = 0; -#endif int force_laptop = 0; int not_a_laptop = 0; const char *board_vendor = NULL; const char *board_model = NULL; -#if IS_X86 || IS_ARM +#if IS_X86 const char *cb_vendor = NULL; const char *cb_model = NULL; #endif @@ -251,7 +244,7 @@ return 1; } -#if IS_X86 || IS_ARM +#if IS_X86 if ((cb_parse_table(&cb_vendor, &cb_model) == 0) && (board_vendor != NULL) && (board_model != NULL)) { if (strcasecmp(board_vendor, cb_vendor) || strcasecmp(board_model, cb_model)) { msg_pwarn("Warning: The mainboard IDs set by -p internal:mainboard (%s:%s) do not\n" @@ -314,7 +307,6 @@ } } -#ifdef __FLASHROM_LITTLE_ENDIAN__ /* try to enable it. Failure IS an option, since not all motherboards * really need this to be done, etc., etc. */ @@ -336,31 +328,10 @@ } #endif -#if IS_X86 || IS_MIPS register_par_master(&par_master_internal, internal_buses_supported); return 0; -#else - msg_perr("Your platform is not supported yet for the internal " - "programmer due to missing\n" - "flash_base and top/bottom alignment information.\n" - "Aborting.\n"); - return 1; -#endif -#else - /* FIXME: Remove this unconditional abort once all PCI drivers are - * converted to use little-endian accesses for memory BARs. - */ - msg_perr("Your platform is not supported yet for the internal " - "programmer because it has\n" - "not been converted from native endian to little endian " - "access yet.\n" - "Aborting.\n"); - return 1; -#endif } -#endif -#if IS_X86 || IS_MIPS static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) { @@ -403,4 +374,3 @@ mmio_readn((void *)addr, buf, len); return; } -#endif -- To view, visit https://review.coreboot.org/22671 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I672ddab0415df3baa49ff39a1c9db1b41d8143a4 Gerrit-Change-Number: 22671 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in flashrom[master]: README: Update packaging section for Git repositories
by build bot (Jenkins) (Code Review) Dec. 1, 2017

Dec. 1, 2017

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22454 ) Change subject: README: Update packaging section for Git repositories ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/flashrom-customrules/905/ : SUCCESS -- To view, visit https://review.coreboot.org/22454 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8d9c56be8c1381b175ce7695c53f31b1767d9d17 Gerrit-Change-Number: 22454 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 01 Dec 2017 00:30:36 +0000 Gerrit-HasComments: No

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Change in flashrom[master]: README: Update packaging section for Git repositories
by David Hendricks (Code Review) Dec. 1, 2017

Dec. 1, 2017

David Hendricks has submitted this change and it was merged. ( https://review.coreboot.org/22454 ) Change subject: README: Update packaging section for Git repositories ...................................................................... README: Update packaging section for Git repositories Change-Id: I8d9c56be8c1381b175ce7695c53f31b1767d9d17 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/22454 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- M README 1 file changed, 10 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/README b/README index ab761f7..449103d 100644 --- a/README +++ b/README @@ -24,20 +24,22 @@ Packaging --------- -To package flashrom and remove dependencies on subversion, either use +To package flashrom and remove dependencies on Git, either use make export or make tarball -make export will export all flashrom files from the subversion repository at -revision BASE into a directory named $EXPORTDIR/flashrom-$VERSION-r$SVNREVISION -and will additionally modify the Makefile in that directory to contain the svn -revision of the exported tree. +'make export' will export all flashrom files from the Git repository at +revision HEAD into a directory named "$EXPORTDIR/flashrom-$RELEASENAME" +and will additionally add a "versioninfo.inc" file in that directory to +contain the Git revision of the exported tree and a date for the manual +page. -make tarball will simply tar up the result of make export and gzip compress it. +'make tarball' will simply tar up the result of make export and compress +it with bzip2. -The snapshot tarballs are the result of make tarball and require no further -processing. +The snapshot tarballs are the result of 'make tarball' and require no +further processing. Build Instructions -- To view, visit https://review.coreboot.org/22454 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I8d9c56be8c1381b175ce7695c53f31b1767d9d17 Gerrit-Change-Number: 22454 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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