flashrom

flashrom@flashrom.org

5 participants
9161 discussions

Re: [flashrom] [PATCH 1/1] Board enable for Foxconn 6150K8MD-8EKRSH
by Stefan Reinauer 01 Apr '11

01 Apr '11

* Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> [110330 19:00]: > Reported by: wickberg(a)student.chalmers.se > > flashrom -V: http://paste.flashrom.org/view.php?id=452 > lspci: http://paste.flashrom.org/view.php?id=453 > > (note that the flashrom dump is with a foreign chip. That > board is originally equipped with an PMC Pm49FL004. > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>

1 0

Flashrom W39V040B
by kay 01 Apr '11

01 Apr '11

Hi! I have tried to flash my BIOS without success. BIOS flash reading is ok, but writing does'nt work. Here is the commands output: $ flashrom -Vw 75i65G_3.30 flashrom v0.9.2-r1028 on Linux 2.6.35-28-generic (x86_64), built with libpci 3.0.0, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 2071M loops per second, 10 myus = 9 us, 100 myus = 90 us, 1000 myus = 898 us, 10000 myus = 8978 us, 4 myus = 3 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "To Be Filled By O.E.M." DMI string system-product-name: "To Be Filled By O.E.M." DMI string system-version: "To Be Filled By O.E.M." DMI string baseboard-manufacturer: " " DMI string baseboard-product-name: "775i65G." DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found chipset "Intel ICH5/ICH5R", enabling flash write... chipset PCI ID is 8086:24d0, BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 OK. This chipset supports the following protocols: Non-SPI. Found chip "Winbond W39V040B" (512 KB, LPC) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x00ffff, 0x010000-0x01ffff, Looking at blockwise erase function 1... trying... 0x000000-0x07ffff, Looking at blockwise erase function 2... not defined. Looking for another erase function. Looking at blockwise erase function 3... not defined. Looking for another erase function. Looking at blockwise erase function 4... not defined. Looking for another erase function. ERASE FAILED at 0x00013948! Expected=0xff, Read=0x44, failed byte count from 0x00010000-0x0001ffff: 0xc5f5 ERASE FAILED! ERASE FAILED at 0x00013948! Expected=0xff, Read=0x44, failed byte count from 0x00000000-0x0007ffff: 0x5cf57 ERASE FAILED! FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! I have checked the BIOS content and compared with backup - they are identical, so I have reboot the PC without any problems.

2 1

Re: [flashrom] [PATCH 5/8] add support for 8086:1076 (82541GI) to nicintel_spi.c
by Carl-Daniel Hailfinger 31 Mar '11

31 Mar '11

Am 15.03.2011 16:29 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner<stefan.tauner(a)student.tuwien.ac.at> > --- > nicintel_spi.c | 1 + > 1 files changed, 1 insertions(+), 0 deletions(-) > > diff --git a/nicintel_spi.c b/nicintel_spi.c > index 3882e81..5a6e04d 100644 > --- a/nicintel_spi.c > +++ b/nicintel_spi.c > @@ -64,6 +64,7 @@ const struct pcidev_status nics_intel_spi[] = { > {PCI_VENDOR_ID_INTEL, 0x105e, OK, "Intel", "82571EB Gigabit Ethernet Controller"}, > {PCI_VENDOR_ID_INTEL, 0x107c, OK, "Intel", "82541PI Gigabit Ethernet Controller"}, > {PCI_VENDOR_ID_INTEL, 0x10b9, OK, "Intel", "82572EI Gigabit Ethernet Controller"}, > + {PCI_VENDOR_ID_INTEL, 0x1076, OK, "Intel", "82541GI Gigabit Ethernet Controller"}, > Should we sort by name or by PCI ID? I think we sort by PCI ID everywhere else. > > {}, > }; > Looks good otherwise. Regards, Carl-Daniel -- http://www.hailfinger.org/

2 2

Re: [flashrom] [PATCH 2/8] The AT25F512B is quite different from the other (yet unsupported) chips in the AT25F* familiy, so rename 512B-specific stuff.
by Carl-Daniel Hailfinger 31 Mar '11

31 Mar '11

Am 15.03.2011 16:29 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner<stefan.tauner(a)student.tuwien.ac.at> > --- > chipdrivers.h | 3 +-- > flashchips.c | 6 ++++-- > spi25.c | 10 +--------- > 3 files changed, 6 insertions(+), 13 deletions(-) > > diff --git a/chipdrivers.h b/chipdrivers.h > index c01ab7a..dc46fe1 100644 > --- a/chipdrivers.h > +++ b/chipdrivers.h > @@ -45,13 +45,12 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); > uint8_t spi_read_status_register(void); > int spi_prettyprint_status_register_at25df(struct flashchip *flash); > int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash); > -int spi_prettyprint_status_register_at25f(struct flashchip *flash); > +int spi_prettyprint_status_register_at25f512b(struct flashchip *flash); > int spi_prettyprint_status_register_at25fs010(struct flashchip *flash); > int spi_prettyprint_status_register_at25fs040(struct flashchip *flash); > int spi_disable_blockprotect(struct flashchip *flash); > int spi_disable_blockprotect_at25df(struct flashchip *flash); > int spi_disable_blockprotect_at25df_sec(struct flashchip *flash); > -int spi_disable_blockprotect_at25f(struct flashchip *flash); > int spi_disable_blockprotect_at25fs010(struct flashchip *flash); > int spi_disable_blockprotect_at25fs040(struct flashchip *flash); > int spi_byte_program(int addr, uint8_t databyte); > diff --git a/flashchips.c b/flashchips.c > index 753a094..29a4da0 100644 > --- a/flashchips.c > +++ b/flashchips.c > @@ -1612,8 +1612,10 @@ struct flashchip flashchips[] = { > .block_erase = spi_block_erase_c7, > } > }, > - .printlock = spi_prettyprint_status_register_at25f, > - .unlock = spi_disable_blockprotect_at25f, > + .printlock = spi_prettyprint_status_register_at25f512b, > + /* spi_disable_blockprotect_at25df is not really the right way to do > + * this, but the side effects of said function work here as well. */ > For disabling block protection of SPI chips we have quite a few functions where the side effects work just fine, but the comments inside the function are not correct. Not sure if we have to list this in a comment here or rather at the top of this unlock function because it is used for multiple chips. I see you just wanted to avoid the existing wrapper function and that sort of makes sense... I'm undecided here. > + .unlock = spi_disable_blockprotect_at25df, > .write = spi_chip_write_256, > .read = spi_chip_read, > }, > diff --git a/spi25.c b/spi25.c > index c774032..5d73411 100644 > --- a/spi25.c > +++ b/spi25.c > @@ -394,7 +394,7 @@ int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash) > return spi_prettyprint_status_register_at25df(flash); > } > > -int spi_prettyprint_status_register_at25f(struct flashchip *flash) > +int spi_prettyprint_status_register_at25f512b(struct flashchip *flash) > _at25f was originally intended as generic version usable by more AT25* chips. I have a conflicting patch for this region, will repost it so we can discuss how to merge them. > { > uint8_t status; > > @@ -1123,14 +1123,6 @@ int spi_disable_blockprotect_at25df_sec(struct flashchip *flash) > return spi_disable_blockprotect_at25df(flash); > } > > -int spi_disable_blockprotect_at25f(struct flashchip *flash) > -{ > - /* spi_disable_blockprotect_at25df is not really the right way to do > - * this, but the side effects of said function work here as well. > - */ > - return spi_disable_blockprotect_at25df(flash); > -} > - > int spi_disable_blockprotect_at25fs010(struct flashchip *flash) > { > uint8_t status; > -- http://www.hailfinger.org/

2 1

Re: [flashrom] [PATCH 1/8] whitespace, documentation and other small stuff
by Carl-Daniel Hailfinger 31 Mar '11

31 Mar '11

Am 15.03.2011 16:29 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner<stefan.tauner(a)student.tuwien.ac.at> > Thanks for your patch! > --- a/flash.h > +++ b/flash.h > @@ -107,7 +107,9 @@ struct flashchip { > uint32_t manufacture_id; > uint32_t model_id; > > + /* Total chip size in kilobytes */ > You can't know that, but we have a pending patch which changes this to bytes. OTOH, until that patch is applied, your patch makes sense. > int total_size; > + /* Page chip size in bytes */ > page_size will be renamed to max_write_size or something like that. Until then, a comment like yours makes sense. Please change it to "Chip page size...". > int page_size; > int feature_bits; > > @@ -125,7 +127,10 @@ struct flashchip { > /* > * Erase blocks and associated erase function. Any chip erase function > * is stored as chip-sized virtual block together with said function. > - */ > + * The first one that fits will be chosen, there is currently no way to > + * influence that behaviour. For testing just comment out the others elements or > s/others/other/ 80 column limit please. > + * set the function pointer to NULL. > + */ > Missing blank before *. > struct block_eraser { > struct eraseblock{ > unsigned int size; /* Eraseblock size */ > --- a/spi25.c > +++ b/spi25.c > @@ -314,13 +314,14 @@ uint8_t spi_read_status_register(void) > /* Prettyprint the status register. Common definitions. */ > static void spi_prettyprint_status_register_welwip(uint8_t status) > { > - msg_cdbg("Chip status register: Write Enable Latch (WEL) is " > + msg_cdbg("Chip status register: Write Enable Latch (WEL/WEN) is " > "%sset\n", (status& (1<< 1)) ? "" : "not "); > - msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is " > + msg_cdbg("Chip status register: Write In Progress (WIP/BUSY/nRDY) is " > "%sset\n", (status& (1<< 0)) ? "" : "not "); > } > > -/* Prettyprint the status register. Common definitions. */ > +/* Prettyprint the status register. Common definitions. > + TODO: parameterize number of protected blocks. */ > Some chips do not use _common at all, and it may be a good idea to create a separate function for parameter printing. Hmmm... can you drop this change for now? That said, I should repost my detailed locking patch which allows printing of locking areas as well. > static void spi_prettyprint_status_register_common(uint8_t status) > { > msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " > Rest looks OK and will be committed immediately once I have a fixed up version. Regards, Carl-Daniel -- http://www.hailfinger.org/

2 2

Re: [flashrom] [PATCH 4/8] Add support for Atmel's AT25F series of SPI flash chips. This includes a new probing method (probe_spi_rdid_at25f), block erase method (spi_block_erase_62), spi_prettyprint_status_register_at25f and spi_disable_blockprotect_at25f.
by Carl-Daniel Hailfinger 31 Mar '11

31 Mar '11

Am 15.03.2011 16:29 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner<stefan.tauner(a)student.tuwien.ac.at> > Looks good at a first glance, I'll compare it with my own old patch later today. Regards, Carl-Daniel -- http://www.hailfinger.org/

1 0

[PATCH 1/1] Board enable for Foxconn 6150K8MD-8EKRSH
by Michael Karcher 30 Mar '11

30 Mar '11

Reported by: wickberg(a)student.chalmers.se flashrom -V: http://paste.flashrom.org/view.php?id=452 lspci: http://paste.flashrom.org/view.php?id=453 (note that the flashrom dump is with a foreign chip. That board is originally equipped with an PMC Pm49FL004. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- board_enable.c | 2 ++ print.c | 1 + 2 files changed, 3 insertions(+), 0 deletions(-) diff --git a/board_enable.c b/board_enable.c index d459b98..919d055 100644 --- a/board_enable.c +++ b/board_enable.c @@ -940,6 +940,7 @@ static int nvidia_mcp_gpio2_lower(void) /* * Suited for: + * - Foxconn 6150K8MD-8EKRSH: Socket 939 + NVIDIA MCP51 * - MSI K8N Neo4: NVIDIA CK804. TODO: Should probably be K8N Neo4 Platinum, see http://www.coreboot.org/pipermail/flashrom/2010-August/004362.html. * - MSI K8NGM2-L: NVIDIA MCP51 */ @@ -1954,6 +1955,7 @@ const struct board_pciid_enable board_pciid_enables[] = { {0x10DE, 0x005E, 0x1695, 0x1010, 0x10DE, 0x0050, 0x1695, 0x1010, NULL, NULL, NULL, "EPoX", "EP-8NPA7I", 0, OK, nvidia_mcp_gpio4_raise}, {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, "EPoX", "EP-8RDA3+", 0, OK, nvidia_mcp_gpio31_raise}, {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", 0, NT, intel_piix4_gpo22_raise}, + {0x10de, 0x02f0, 0x105b, 0x0d01, 0x10de, 0x0264, 0x105b, 0x0d01, NULL, NULL, NULL, "Foxconn", "6150K8MD-8EKRSH", 0, NT, nvidia_mcp_gpio2_raise}, {0x8086, 0x2443, 0x8086, 0x2442, 0x8086, 0x1130, 0x8086, 0x1130, "^6IEM ", NULL, NULL, "GIGABYTE", "GA-6IEM", 0, NT, intel_ich_gpio25_raise}, {0x1106, 0x0686, 0x1106, 0x0686, 0x1106, 0x3058, 0x1458, 0xa000, NULL, NULL, NULL, "GIGABYTE", "GA-7ZM", 512, OK, NULL}, {0x8086, 0x244b, 0x8086, 0x2442, 0x8086, 0x2445, 0x1458, 0xa002, NULL, NULL, NULL, "GIGABYTE", "GA-8IRML", 0, OK, intel_ich_gpio25_raise}, diff --git a/print.c b/print.c index b939f67..c839e38 100644 --- a/print.c +++ b/print.c @@ -462,6 +462,7 @@ const struct board_info boards_known[] = { B("EPoX", "EP-BX3", 1, "http://www.epox.com/product.asp?ID=EP-BX3", NULL), B("EVGA", "132-CK-NF78", 1, "http://http://www.evga.com/articles/385.asp", NULL), B("FIC", "VA-502", 0, "ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public report found. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>. Seems the PCI subsystem IDs are identical with the Tekram P6Pro-A5. May work now."), + B("Foxconn", "6150K8MD-8EKRSH", 1, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=…", NULL), B("Foxconn", "A6VMX", 1, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=…", NULL), B("Fujitsu-Siemens", "ESPRIMO P5915", 1, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRI…", "Mainboard model is D2312-A2."), B("GIGABYTE", "GA-2761GXDK", 1, "http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gi…", NULL), -- 1.7.4.1

1 0

Intel D945GCLF
by whoknowz 30 Mar '11

30 Mar '11

http://paste.flashrom.org/view.php?id=446 http://paste.flashrom.org/view.php?id=445 http://paste.flashrom.org/view.php?id=444 http://paste.flashrom.org/view.php?id=443 Hi, Just tried to burn a coreboot image and failed. Did a successful test run by reading the bios and writing it back and rebooting. Now the original dump also fails to verify after writing, haven't restarted yet.

3 3

[PATCH] fix typo in chipset_enable.c
by Stefan Reinauer 30 Mar '11

30 Mar '11

See patch

2 2

[commit] r1283 - trunk
by repository service 30 Mar '11

30 Mar '11

Author: stepan Date: Tue Mar 29 23:41:41 2011 New Revision: 1283 URL: http://flashrom.org/trac/flashrom/changeset/1283 Log: Fix typo in chipset_enable.c Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Fri Mar 18 23:00:15 2011 (r1282) +++ trunk/chipset_enable.c Tue Mar 29 23:41:41 2011 (r1283) @@ -1188,7 +1188,7 @@ "\"%s %s\"\n" "ignoring, please report lspci and board URL " "to flashrom(a)flashrom.org\n" - "with 2CHIPSET: your board name in the " + "with \'CHIPSET: your board name\' in the " "subject line.\n", chipset_enables[i].vendor_name, chipset_enables[i].device_name);

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom