flashrom

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[PATCH 1/4] change all occurrences of printf to msg_ginfo in print.c
by Stefan Tauner 18 Jun '11

18 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- print.c | 140 +++++++++++++++++++++++++++++++------------------------------- 1 files changed, 70 insertions(+), 70 deletions(-) diff --git a/print.c b/print.c index 8e6a187..af3edc1 100644 --- a/print.c +++ b/print.c @@ -59,7 +59,7 @@ char *flashbuses_to_text(enum chipbustype bustype) return ret; } -#define POS_PRINT(x) do { pos += strlen(x); printf(x); } while (0) +#define POS_PRINT(x) do { pos += strlen(x); msg_ginfo(x); } while (0) static int digits(int n) { @@ -93,31 +93,31 @@ static void print_supported_chips(void) maxchiplen++; okcol = maxvendorlen + maxchiplen; - printf("Supported flash chips (total: %d):\n\n", chipcount); - printf("Vendor"); + msg_ginfo("Supported flash chips (total: %d):\n\n", chipcount); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); - printf("Device"); + msg_ginfo(" "); + msg_ginfo("Device"); for (i = strlen("Device"); i < maxchiplen; i++) - printf(" "); + msg_ginfo(" "); - printf("Tested Known Size/kB: Type:\n"); + msg_ginfo("Tested Known Size/kB: Type:\n"); for (i = 0; i < okcol; i++) - printf(" "); - printf("OK Broken\n\n"); - printf("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); + msg_ginfo(" "); + msg_ginfo("OK Broken\n\n"); + msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); for (f = flashchips; f->name != NULL; f++) { /* Don't print "unknown XXXX SPI chip" entries. */ if (!strncmp(f->name, "unknown", 7)) continue; - printf("%s", f->vendor); + msg_ginfo("%s", f->vendor); for (i = strlen(f->vendor); i < maxvendorlen; i++) - printf(" "); - printf("%s", f->name); + msg_ginfo(" "); + msg_ginfo("%s", f->name); for (i = strlen(f->name); i < maxchiplen; i++) - printf(" "); + msg_ginfo(" "); pos = maxvendorlen + maxchiplen; if ((f->tested & TEST_OK_MASK)) { @@ -131,7 +131,7 @@ static void print_supported_chips(void) POS_PRINT("W "); } while (pos < okcol + 9) { - printf(" "); + msg_ginfo(" "); pos++; } if ((f->tested & TEST_BAD_MASK)) { @@ -146,13 +146,13 @@ static void print_supported_chips(void) } while (pos < okcol + 18) { - printf(" "); + msg_ginfo(" "); pos++; } - printf("%d", f->total_size); + msg_ginfo("%d", f->total_size); for (i = 0; i < 10 - digits(f->total_size); i++) - printf(" "); - printf("%s\n", flashbuses_to_text(f->bustype)); + msg_ginfo(" "); + msg_ginfo("%s\n", flashbuses_to_text(f->bustype)); } } @@ -172,26 +172,26 @@ static void print_supported_chipsets(void) maxvendorlen++; maxchipsetlen++; - printf("Supported chipsets (total: %d):\n\n", chipsetcount); + msg_ginfo("Supported chipsets (total: %d):\n\n", chipsetcount); - printf("Vendor"); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Chipset"); + msg_ginfo("Chipset"); for (i = strlen("Chipset"); i < maxchipsetlen; i++) - printf(" "); + msg_ginfo(" "); - printf("PCI IDs State\n\n"); + msg_ginfo("PCI IDs State\n\n"); for (c = chipset_enables; c->vendor_name != NULL; c++) { - printf("%s", c->vendor_name); + msg_ginfo("%s", c->vendor_name); for (i = 0; i < maxvendorlen - strlen(c->vendor_name); i++) - printf(" "); - printf("%s", c->device_name); + msg_ginfo(" "); + msg_ginfo("%s", c->device_name); for (i = 0; i < maxchipsetlen - strlen(c->device_name); i++) - printf(" "); - printf("%04x:%04x%s\n", c->vendor_id, c->device_id, + msg_ginfo(" "); + msg_ginfo("%04x:%04x%s\n", c->vendor_id, c->device_id, (c->status == OK) ? "" : " (untested)"); } } @@ -216,39 +216,39 @@ static void print_supported_boards_helper(const struct board_info *boards, maxvendorlen++; maxboardlen++; - printf("Known %s (good: %d, bad: %d):\n\n", + msg_ginfo("Known %s (good: %d, bad: %d):\n\n", devicetype, boardcount_good, boardcount_bad); - printf("Vendor"); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Board"); + msg_ginfo("Board"); for (i = strlen("Board"); i < maxboardlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Status Required option\n\n"); + msg_ginfo("Status Required option\n\n"); for (b = boards; b->vendor != NULL; b++) { - printf("%s", b->vendor); + msg_ginfo("%s", b->vendor); for (i = 0; i < maxvendorlen - strlen(b->vendor); i++) - printf(" "); - printf("%s", b->name); + msg_ginfo(" "); + msg_ginfo("%s", b->name); for (i = 0; i < maxboardlen - strlen(b->name); i++) - printf(" "); - printf((b->working) ? "OK " : "BAD "); + msg_ginfo(" "); + msg_ginfo((b->working) ? "OK " : "BAD "); for (e = board_pciid_enables; e->vendor_name != NULL; e++) { if (strcmp(e->vendor_name, b->vendor) || strcmp(e->board_name, b->name)) continue; if (e->lb_vendor == NULL) - printf("(autodetected)"); + msg_ginfo("(autodetected)"); else - printf("-m %s:%s", e->lb_vendor, + msg_ginfo("-m %s:%s", e->lb_vendor, e->lb_part); } - printf("\n"); + msg_ginfo("\n"); } } #endif @@ -257,104 +257,104 @@ void print_supported(void) { print_supported_chips(); - printf("\nSupported programmers:\n"); + msg_ginfo("\nSupported programmers:\n"); list_programmers_linebreak(0, 80, 0); #if CONFIG_INTERNAL == 1 - printf("\nSupported devices for the %s programmer:\n\n", + msg_ginfo("\nSupported devices for the %s programmer:\n\n", programmer_table[PROGRAMMER_INTERNAL].name); print_supported_chipsets(); - printf("\n"); + msg_ginfo("\n"); print_supported_boards_helper(boards_known, "boards"); - printf("\n"); + msg_ginfo("\n"); print_supported_boards_helper(laptops_known, "laptops"); #endif #if CONFIG_DUMMY == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DUMMY].name); /* FIXME */ - printf("Dummy device, does nothing and logs all accesses\n"); + msg_ginfo("Dummy device, does nothing and logs all accesses\n"); #endif #if CONFIG_NIC3COM == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NIC3COM].name); print_supported_pcidevs(nics_3com); #endif #if CONFIG_NICREALTEK == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICREALTEK].name); print_supported_pcidevs(nics_realtek); #endif #if CONFIG_NICNATSEMI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICNATSEMI].name); print_supported_pcidevs(nics_natsemi); #endif #if CONFIG_GFXNVIDIA == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_GFXNVIDIA].name); print_supported_pcidevs(gfx_nvidia); #endif #if CONFIG_DRKAISER == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DRKAISER].name); print_supported_pcidevs(drkaiser_pcidev); #endif #if CONFIG_SATASII == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SATASII].name); print_supported_pcidevs(satas_sii); #endif #if CONFIG_ATAHPT == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_ATAHPT].name); print_supported_pcidevs(ata_hpt); #endif #if CONFIG_FT2232_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_FT2232_SPI].name); print_supported_usbdevs(devs_ft2232spi); #endif #if CONFIG_SERPROG == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SERPROG].name); /* FIXME */ - printf("All programmer devices speaking the serprog protocol\n"); + msg_ginfo("All programmer devices speaking the serprog protocol\n"); #endif #if CONFIG_BUSPIRATE_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_BUSPIRATE_SPI].name); /* FIXME */ - printf("Dangerous Prototypes Bus Pirate\n"); + msg_ginfo("Dangerous Prototypes Bus Pirate\n"); #endif #if CONFIG_DEDIPROG == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DEDIPROG].name); /* FIXME */ - printf("Dediprog SF100\n"); + msg_ginfo("Dediprog SF100\n"); #endif #if CONFIG_RAYER_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_RAYER_SPI].name); /* FIXME */ - printf("RayeR parallel port programmer\n"); + msg_ginfo("RayeR parallel port programmer\n"); #endif #if CONFIG_NICINTEL == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICINTEL].name); print_supported_pcidevs(nics_intel); #endif #if CONFIG_NICINTEL_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICINTEL_SPI].name); print_supported_pcidevs(nics_intel_spi); #endif #if CONFIG_OGP_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_OGP_SPI].name); print_supported_pcidevs(ogp_spi); #endif #if CONFIG_SATAMV == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SATAMV].name); print_supported_pcidevs(satas_mv); #endif -- 1.7.1

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[PATCH 0/4] voltage printing 2.1
by Stefan Tauner 18 Jun '11

18 Jun '11

no real changes since 2.0. i have only rebased to r1344 and squashed the additional commit. i would really like to get this in soon to... well... to get rid of pending patches only, but i think this is a very good reason TBH :) Stefan Tauner (4): change all occurrences of printf to msg_ginfo in print.c fix memleaks due to incorrect usage of flashbuses_to_text reformat -L output and add printing of chip voltage ranges to print.c add printing of chip voltage ranges to print_wiki.c chipset_enable.c | 5 +- flashrom.c | 18 ++-- print.c | 278 +++++++++++++++++++++++++++++++++--------------------- print_wiki.c | 51 +++++++--- 4 files changed, 219 insertions(+), 133 deletions(-)

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Re: [flashrom] [PATCH 3/3] add intel 6 series pci ids to chipset_enables
by Uwe Hermann 18 Jun '11

18 Jun '11

On Mon, Jun 13, 2011 at 10:44:44PM +0200, Stefan Tauner wrote: > as defined by Intel 6 Series Chipset and Intel C200 Series Chipset Specification Update; > document number 324646-005, April 2011. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > chipset_enable.c | 14 ++++++++++++++ > 1 files changed, 14 insertions(+), 0 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 5907b86..a3ce942 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -1121,6 +1121,20 @@ const struct penable chipset_enables[] = { > {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, > {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, > {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, > + {0x8086, 0x1C46, NT, "Intel", "P67", enable_flash_ich10}, > + {0x8086, 0x1C47, NT, "Intel", "UM67", enable_flash_ich10}, > + {0x8086, 0x1C49, NT, "Intel", "HM65", enable_flash_ich10}, > + {0x8086, 0x1C4A, NT, "Intel", "H67", enable_flash_ich10}, > + {0x8086, 0x1C4B, NT, "Intel", "HM67", enable_flash_ich10}, > + {0x8086, 0x1C4C, NT, "Intel", "Q65", enable_flash_ich10}, > + {0x8086, 0x1C4D, NT, "Intel", "QS67", enable_flash_ich10}, > + {0x8086, 0x1C4E, NT, "Intel", "Q67", enable_flash_ich10}, > + {0x8086, 0x1C4F, NT, "Intel", "QM67", enable_flash_ich10}, > + {0x8086, 0x1C50, NT, "Intel", "B65", enable_flash_ich10}, > + {0x8086, 0x1C52, NT, "Intel", "C202", enable_flash_ich10}, > + {0x8086, 0x1C54, NT, "Intel", "C204", enable_flash_ich10}, > + {0x8086, 0x1C56, NT, "Intel", "C206", enable_flash_ich10}, > + {0x8086, 0x1C5C, NT, "Intel", "H61", enable_flash_ich10}, All hexnumbers lower-case, please (e.g. 0x1c46, not 0x1C46). The entry for 0x1c44 (Z68) is missing (contained in the May 2011 PDF). With the above changes: Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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Re: [flashrom] [PATCH 2/3] fix and add a few chipset_enables entries
by Uwe Hermann 18 Jun '11

18 Jun '11

On Mon, Jun 13, 2011 at 10:44:43PM +0200, Stefan Tauner wrote: > Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > chipset_enable.c | 12 +++++++++--- > 1 files changed, 9 insertions(+), 3 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 3a2febc..5907b86 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -1115,8 +1115,8 @@ const struct penable chipset_enables[] = { > {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, > {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, > {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, > - {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, > - {0x1106, 0x8409, OK, "VIA", "VX855", enable_flash_vt823x}, > + {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, > + {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x}, > {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, > {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, > {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, > @@ -1125,14 +1125,17 @@ const struct penable chipset_enables[] = { > {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, > {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, > {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, > +// {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich_4e}, /* http://download.intel.com/design/chipsets/datashts/27359901.pdf */ Correct, but please drop the comment. You could also uncomment the line (but leave NT) as chances are very high it will work. > {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, > {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, > {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, > {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, > {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, > +// {0x8086, 0x24dc, NT, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, /* http://www.intel.com/assets/pdf/datasheet/252516.pdf */ This is a duplicate entry? I cannot find 0x24dc in the datasheet, 0x24d0 is the correct device ID for ICH5/ICH5R. I'd rather drop this entry for now (and the comment). > {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, > {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, > {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, > +// {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich_dc}, /* bios_cntl is at 0xdc? http://www3.intel.com/Assets/PDF/datasheet/301473.pdf, pci id: http://cateee.net/lkddb/web-lkddb/ITCO_WDT.html */ PCI ID is correct, 0xdc for BIOS_CTNL is also correct according to the ICH6W/ICH6RW datasheet. Please remove the comments. You could also uncomment this entry, it's very likely to be correct and work (but leave it as NT for now). > {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, > {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, > {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, > @@ -1151,10 +1154,12 @@ const struct penable chipset_enables[] = { > {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, > {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, > {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, > +// {0x8086, 0x3a10, NT, "Intel", "ICH10R", enable_flash_ich10}, /* engineering sample http://pci-ids.ucw.cz/read/PC/8086/3a10 and http://www.radisys.com/files/support_downloads/03292-00_ATCA-4500_CPM_Refer… */ IDs are OK, but please drop the comments. At most "/* ES */" or so, if you want. > {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, > {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, > {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, > {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, > +// {0x8086, 0x3a1e, NT, "Intel", "ICH10", enable_flash_ich10}, /* ICH10 engineering sample. http://pci-ids.ucw.cz/read/PC/8086/3a1e */ /* ES */ or no comment IMHO, see above. > {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, > {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, > {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, > @@ -1176,7 +1181,8 @@ const struct penable chipset_enables[] = { > {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, > {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, > {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, > - {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, > + {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo", enable_flash_poulsbo}, > +// {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_poulsbo?}, /* document number 324208 */ IDs are correct, comment can be dropped. The "?" from enable_flash_poulsbo can also be dropped I guess, the register bits used in enable_flash_poulsbo() are the same for "Atom E6xx(T)/Tunnel Creek", thus chances are good that it might work. You could also uncomment the line for that reason (but leave NT). With the above changes: Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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Re: [flashrom] [PATCH 1/3] resort chipset_enables array by pci ids
by Uwe Hermann 18 Jun '11

18 Jun '11

On Mon, Jun 13, 2011 at 10:44:42PM +0200, Stefan Tauner wrote: > Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > chipset_enable.c | 210 +++++++++++++++++++++++++++--------------------------- > 1 files changed, 105 insertions(+), 105 deletions(-) > > diff --git a/chipset_enable.c b/chipset_enable.c > index 60d5d4d..3a2febc 100644 > --- a/chipset_enable.c > +++ b/chipset_enable.c > @@ -1009,80 +1009,50 @@ static int get_flashbase_sc520(struct pci_dev *dev, const char *name) > > #endif > > -/* Please keep this list alphabetically sorted by vendor/device. */ > +/* Please keep this list numerically sorted by vendor/device. */ ^^^^^^^^^^^^^ Make this "vendor/device ID" please. Other than that this is Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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[commit] r1344 - trunk
by repository service 18 Jun '11

18 Jun '11

Author: stefanct Date: Sat Jun 18 20:45:56 2011 New Revision: 1344 URL: http://flashrom.org/trac/flashrom/changeset/1344 Log: add intel 6 series pci ids to chipset_enables as defined by Intel 6 Series Chipset and Intel C200 Series Chipset Specification Update; document number 324646-006, May 2011. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Jun 18 20:45:50 2011 (r1343) +++ trunk/chipset_enable.c Sat Jun 18 20:45:56 2011 (r1344) @@ -1121,6 +1121,21 @@ {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x1c44, NT, "Intel", "Z68", enable_flash_ich10}, + {0x8086, 0x1c46, NT, "Intel", "P67", enable_flash_ich10}, + {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_ich10}, + {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_ich10}, + {0x8086, 0x1c4a, NT, "Intel", "H67", enable_flash_ich10}, + {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_ich10}, + {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_ich10}, + {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_ich10}, + {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_ich10}, + {0x8086, 0x1c4f, NT, "Intel", "QM67", enable_flash_ich10}, + {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_ich10}, + {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_ich10}, + {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_ich10}, + {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_ich10}, + {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_ich10}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e},

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[commit] r1343 - trunk
by repository service 18 Jun '11

18 Jun '11

Author: stefanct Date: Sat Jun 18 20:45:50 2011 New Revision: 1343 URL: http://flashrom.org/trac/flashrom/changeset/1343 Log: fix and add a few chipset_enables entries Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Jun 18 20:45:41 2011 (r1342) +++ trunk/chipset_enable.c Sat Jun 18 20:45:50 2011 (r1343) @@ -1013,7 +1013,7 @@ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, - {0x1002, 0x438D, OK, "AMD", "SB600", enable_flash_sb600}, + {0x1002, 0x438d, OK, "AMD", "SB600", enable_flash_sb600}, {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600}, {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, @@ -1052,7 +1052,7 @@ {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, - {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, + {0x10b9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, {0x10de, 0x0030, OK, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ @@ -1115,8 +1115,8 @@ {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, - {0x1106, 0x8409, OK, "VIA", "VX855", enable_flash_vt823x}, + {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, + {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x}, {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, @@ -1125,6 +1125,7 @@ {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, + {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich_4e}, {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, @@ -1133,6 +1134,7 @@ {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, + {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich_dc}, {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, @@ -1151,10 +1153,12 @@ {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, + {0x8086, 0x3a10, NT, "Intel", "ICH10R Engineering Sample", enable_flash_ich10}, {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, + {0x8086, 0x3a1e, NT, "Intel", "ICH10 Engineering Sample", enable_flash_ich10}, {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, @@ -1176,7 +1180,8 @@ {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, - {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, + {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo", enable_flash_poulsbo}, + {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_poulsbo}, #endif {}, };

1 0

[commit] r1342 - trunk
by repository service 18 Jun '11

18 Jun '11

Author: stefanct Date: Sat Jun 18 20:45:41 2011 New Revision: 1342 URL: http://flashrom.org/trac/flashrom/changeset/1342 Log: resort chipset_enables array by pci ids Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Jun 18 00:38:53 2011 (r1341) +++ trunk/chipset_enable.c Sat Jun 18 20:45:41 2011 (r1342) @@ -1009,80 +1009,50 @@ #endif -/* Please keep this list alphabetically sorted by vendor/device. */ +/* Please keep this list numerically sorted by vendor/device ID. */ const struct penable chipset_enables[] = { #if defined(__i386__) || defined(__x86_64__) - {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, - {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, - {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, - {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, - {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, - {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, - {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, + {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, {0x1002, 0x438D, OK, "AMD", "SB600", enable_flash_sb600}, {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600}, {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, - {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, - {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, - {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, - {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, - {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, - {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, - {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_ich10}, - {0x8086, 0x3b06, NT, "Intel", "H55", enable_flash_ich10}, - {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_ich10}, - {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_ich10}, - {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_ich10}, - {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_ich10}, - {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_ich10}, - {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, - {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_ich10}, - {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_ich10}, - {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_ich10}, - {0x8086, 0x3b14, NT, "Intel", "3420", enable_flash_ich10}, - {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_ich10}, - {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_ich10}, - {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, - {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, - {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, - {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, - {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, - {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, - {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, - {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, - {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, - {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, - {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, - {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, - {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, - {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, - {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, - {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, - {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, - {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, - {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, - {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, - {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, - {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, - {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, - {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, - {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, - {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8}, - {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, - {0x8086, 0x2815, OK, "Intel", "ICH8M", enable_flash_ich8}, - {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, - {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, - {0x8086, 0x2912, OK, "Intel", "ICH9DH", enable_flash_ich9}, - {0x8086, 0x2914, OK, "Intel", "ICH9DO", enable_flash_ich9}, - {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, - {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, - {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, - {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, - {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, - {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, - {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, - {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, - {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, + {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, + {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, + {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, + {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, + {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, + {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530}, + {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, + {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, + {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540}, + {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540}, + {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, + {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, + {0x1039, 0x0646, NT, "SiS", "645DX", enable_flash_sis540}, + {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540}, + {0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540}, + {0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis540}, + {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, + {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, + {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540}, + {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, + {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, + {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, + {0x1039, 0x0741, OK, "SiS", "741", enable_flash_sis540}, + {0x1039, 0x0745, OK, "SiS", "745", enable_flash_sis540}, + {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, + {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, + {0x1039, 0x0755, NT, "SiS", "755", enable_flash_sis540}, + {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, + {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, + {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, + {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5511}, + {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, + {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, + {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, + {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, {0x10de, 0x0030, OK, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ @@ -1126,57 +1096,87 @@ {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x}, - {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, - {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, - {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, - {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5511}, - {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, - {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, - {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, - {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530}, - {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, - {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, - {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, - {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540}, - {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540}, - {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, - {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, - {0x1039, 0x0646, NT, "SiS", "645DX", enable_flash_sis540}, - {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540}, - {0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540}, - {0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis540}, - {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, - {0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540}, - {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540}, - {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, - {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, - {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, - {0x1039, 0x0741, OK, "SiS", "741", enable_flash_sis540}, - {0x1039, 0x0745, OK, "SiS", "745", enable_flash_sis540}, - {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, - {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, - {0x1039, 0x0755, NT, "SiS", "755", enable_flash_sis540}, /* VIA northbridges */ {0x1106, 0x0585, NT, "VIA", "VT82C585VPX", via_no_byte_merge}, {0x1106, 0x0595, NT, "VIA", "VT82C595", via_no_byte_merge}, {0x1106, 0x0597, NT, "VIA", "VT82C597", via_no_byte_merge}, - {0x1106, 0x0691, NT, "VIA", "VT82C69x", via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */ {0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A", via_no_byte_merge}, + {0x1106, 0x0691, NT, "VIA", "VT82C69x", via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */ {0x1106, 0x8601, NT, "VIA", "VT8601T", via_no_byte_merge}, /* VIA southbridges */ - {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, + {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, + {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, + {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, + {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, + {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, {0x1106, 0x8409, OK, "VIA", "VX855", enable_flash_vt823x}, - {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, - {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, - {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, + {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, + {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, + {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, + {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, + {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, + {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, + {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, + {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, + {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, + {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, + {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, + {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, + {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, + {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, + {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, + {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, + {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, + {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, + {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, + {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, + {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, + {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, + {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, + {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, + {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8}, + {0x8086, 0x2815, OK, "Intel", "ICH8M", enable_flash_ich8}, + {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, + {0x8086, 0x2912, OK, "Intel", "ICH9DH", enable_flash_ich9}, + {0x8086, 0x2914, OK, "Intel", "ICH9DO", enable_flash_ich9}, + {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, + {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, + {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, + {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, + {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, + {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, + {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, + {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, + {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, + {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, + {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, + {0x8086, 0x3b03, NT, "Intel", "PM55", enable_flash_ich10}, + {0x8086, 0x3b06, NT, "Intel", "H55", enable_flash_ich10}, + {0x8086, 0x3b07, OK, "Intel", "QM57", enable_flash_ich10}, + {0x8086, 0x3b08, NT, "Intel", "H57", enable_flash_ich10}, + {0x8086, 0x3b09, NT, "Intel", "HM55", enable_flash_ich10}, + {0x8086, 0x3b0a, NT, "Intel", "Q57", enable_flash_ich10}, + {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_ich10}, + {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, + {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_ich10}, + {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_ich10}, + {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_ich10}, + {0x8086, 0x3b14, NT, "Intel", "3420", enable_flash_ich10}, + {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_ich10}, + {0x8086, 0x3b1e, NT, "Intel", "B55", enable_flash_ich10}, + {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, + {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, + {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, + {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, + {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, #endif {}, };

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[PATCH] Update the flashrom udev rules file with new programmers
by Uwe Hermann 17 Jun '11

17 Jun '11

See patch. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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[PATCH] Shut up skipped probes
by Carl-Daniel Hailfinger 17 Jun '11

17 Jun '11

Now that the bus matching code has been tested extensively, it does not make sense at all to print skipped probes in verbose mode. They are still visible in spew mode (-VV) if anyone cares, but even there the chip size won't be mentioned. Old verbose output: Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMIC A25L05PT, 64 kB: skipped. Probing for AMIC A25L05PU, 64 kB: skipped. [...] Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0xff Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0xff New verbose output: Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff New spew output: Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMIC A25L05PT: skipped. Host bus type Parallel and chip bus type SPI are incompatible. Probing for AMIC A25L05PU: skipped. Host bus type Parallel and chip bus type SPI are incompatible. [...] Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-silence_skip/flashrom.c =================================================================== --- flashrom-silence_skip/flashrom.c (Revision 1338) +++ flashrom-silence_skip/flashrom.c (Arbeitskopie) @@ -1124,26 +1124,27 @@ for (flash = flashchips + startchip; flash && flash->name; flash++) { if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) continue; - msg_gdbg("Probing for %s %s, %d kB: ", - flash->vendor, flash->name, flash->total_size); - if (!flash->probe && !force) { - msg_gdbg("failed! flashrom has no probe function for " - "this flash chip.\n"); - continue; - } buses_common = buses_supported & flash->bustype; if (!buses_common) { + msg_gspew("Probing for %s %s: skipped. ", + flash->vendor, flash->name); tmp = flashbuses_to_text(buses_supported); - msg_gdbg("skipped."); - msg_gspew(" Host bus type %s ", tmp); + msg_gspew("Host bus type %s ", tmp); free(tmp); tmp = flashbuses_to_text(flash->bustype); msg_gspew("and chip bus type %s are incompatible.", tmp); free(tmp); - msg_gdbg("\n"); + msg_gspew("\n"); continue; } + msg_gdbg("Probing for %s %s, %d kB: ", + flash->vendor, flash->name, flash->total_size); + if (!flash->probe && !force) { + msg_gdbg("failed! flashrom has no probe function for " + "this flash chip.\n"); + continue; + } size = flash->total_size * 1024; check_max_decode(buses_common, size); -- http://www.hailfinger.org/

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