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Report: Gigabyte Z77X-UP5 TH-CF F13a read
by dpcimanager＠users.sourceforge.net 19 May '13

19 May '13

flashrom v0.9.6.1-r1667 on Darwin 12.3.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.10, LLVM Clang 4.2 (clang-425.0.27), little endian Command line (5 args): ~/Downloads/DPCIManager/DPCIManager.app/Contents/MacOS/flashrom -VV -r ~/Documents/Gigabyte Z77X-UP5 TH-CF F13a.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 467M loops per second, 10 myus = 19 us, 100 myus = 112 us, 1000 myus = 1045 us, 10000 myus = 10263 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x00000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x00000400. No coreboot table found. DMI string system-manufacturer: "Gigabyte Technology Co., Ltd." DMI string system-product-name: "To be filled by O.E.M." DMI string system-version: "To be filled by O.E.M." DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd." DMI string baseboard-product-name: "Z77X-UP5 TH-CF" DMI string baseboard-version: "x.x" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8728 on port 0x2e Found chipset "Intel Z77" with PCI ID 8086:1e44. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode enabled 0xff600000/0xff200000 FWH decode enabled 0xff500000/0xff100000 FWH decode enabled 0xff400000/0xff000000 FWH decode enabled Maximum FWH chip size: 0x100000 bytes BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled Root Complex Register Block address = 0xfed1c000 GCS = 0xc60: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 Warning: SPI Configuration Lockdown activated. Reading OPCODES... done OP Type Pre-OP op[0]: 0x02, write w/ addr, none op[1]: 0x03, read w/ addr, none op[2]: 0x20, write w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x9f, read w/o addr, none op[5]: 0x01, write w/o addr, none op[6]: 0x00, read w/o addr, none op[7]: 0x00, read w/o addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x00 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x002308aa (FADDR) 0x50: 0x0000ffff (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x07ff0000 FREG1: BIOS region (0x00000000-0x007fffff) is read-write. 0x5C: 0x01ff0003 FREG2: Management Engine region (0x00003000-0x001fffff) is read-write. 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is read-write. 0x64: 0x00001fff FREG4: Platform Data region is unused. 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) 0x90: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0xf94010 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=0, SME=0, SCF=1 0x94: 0x0006 (PREOP) 0x96: 0x043b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9C: 0x0000019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00802005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x03040003 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 4 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x09300024 FLILL 0x00000000 --- Details --- Component 1 density: 8 MB Component 2 is not used. Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 33 MHz Write and Erase Clock Freq.: 33 MHz Fast Read is supported. Fast Read Clock Frequency: 33 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x07ff0000 FLREG2 0x01ff0003 FLREG3 0x00020001 FLREG4 0x00001fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00000000 - 0x007fffff Region 2 (ME ) 0x00003000 - 0x001fffff Region 3 (GbE ) 0x00001000 - 0x00002fff Region 4 (Platf.) is unused. === Master Section === FLMSTR1 0xffff0000 FLMSTR2 0xffff0000 FLMSTR3 0xffff0118 --- Details --- Descr. BIOS ME GbE Platf. BIOS rw rw rw rw rw ME rw rw rw rw rw GbE rw rw rw rw rw SPI Read Configuration: prefetching enabled, caching enabled, OK. Super I/O ID 0x8728 is not on the list of flash capable controllers. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25F512, 64 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F512A, 64 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25F1024(A), 128 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F2048, 256 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25F4096, 512 kB: Invalid OPCODE 0x15, will not execute. Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ESMT F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q80(B), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q32(B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q64(B), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q128B, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25LQ32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F160S33B8, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F160S33T8, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F320S33B8, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F320S33T8, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F640S33B8, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Intel 25F640S33T8, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L512(E)/MX25V512(C), 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1005(C)/MX25L1006E, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L2005(C), 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L4005(A/C), 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L8005/MX25V8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605A/MX25L1606E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605D/MX25L1608D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3205(A), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3205D/MX25L3208D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3206E, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L6405(D), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) at physical address 0xff800000. Chip status register is 0x00. Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Probing for Macronix MX25L6406E/MX25L6436E, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) at physical address 0xff800000. Chip status register is 0x00. Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Probing for Macronix MX25L6445E, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Found Macronix flash chip "MX25L6445E" (8192 kB, SPI) at physical address 0xff800000. Chip status register is 0x00. Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Multiple flash chips were detected: "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E" Please specify which chip to use with the -c <chipname> option. Restoring MMIO space at 0x1032908a0 Restoring PCI config space for 00:1f:0 reg 0xdc

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New board for list
by Aurelius R 18 May '13

18 May '13

The board from the HP Pavilion a6200n which has the NVIDIA nForce 430 Chipset works great -- I tested it multiple times reading, writing and erasing the BIOS chip, no flaws, no errors at all. I'm also going to try and write the VESA chip (nVidia MCP61-80) which seems to be a separate chip, because that is the chip that seems to be causing all the trouble on this board. Anyway, just thought you'd like to add that info to your list. I can also provide the dump from flashrom -V that the program says to email to you, as support isn't quite complete for my board/chip if you want. ____________________ Peace, Love, Empathy Alexander Max Rowsell

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Re: [flashrom] Added chipsets
by Steven Zakulec 17 May '13

17 May '13

If other people have no issue with that, I'm fine with that. Also, please remember to keep the flashrom list in your replies so everyone can see your emails (reply all instead of reply.) On Fri, May 17, 2013 at 1:12 AM, Николай Николаев <evrinoma(a)gmail.com>wrote: > Hi Steven > > "Please add page programming eraseblocks" > what did you mean? > > I think this patch is big and i will write a function page erase blocks > (DB hex) after committing patch. > > -- > With best regards Nikolay Nikolaev >

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Flashrom and Rampage IV Extreme issues.
by wilson self 17 May '13

17 May '13

This may be a little much to follow but I'm going to try my best to keep it on point. I have about 12 ASUS Rampage IV Extreme motherboards. One of the first boards I worked on I was able to successfully read with flashrom and then successfully write it to any other board I wanted too. I actually still use this ROM file to flash today. The issue I have now is that I can not replicate this success. The process fails every single time, and when I say "process", essentially it's reading the BIOS and writing it to a file for later use. Before attempting to write the ROM to another board using flashrom, I always manually hexedit the file and change the MAC address. This has worked on a charm with the file that referenced earlier, the one that I use every time with success. The problem after flashing is this - the board doesn't boot up immediately as it does with the "successful ROM", and it just hangs with error code 00 on the LED. Then I reboot it, and it has all of the correct settings in the BIOS. I go to boot the box in to the OS - and the LAN controller is dead. I see a message about Now, for those unfamiliar with this board - it has 2 BIOS - you can flip from one to the other and repair them as well by logging in to x and cloning to y. Vice versa. Initially I thought maybe you could only flash a BIOS you read with flashrom from BIOS y to BIOS y, or BIOS x to BIOS x, or some other combination. That has proven false. The BIOS that works, to give as much detail as possible, was taken from BIOS y and has been repeatedly flashed to BIOS x on over 9 motherboards. flashrom version used in successful ROM: r1564 flashrom version attempted to use with failure: r1673 pastebin from ROM that doesn't work: http://paste.flashrom.org/view.php?id=1640 I do not have a log from the success ROM - which stinks! I didn't realize this would never work again (or for the time being that I need to figure it out). TLDR: flashrom read from ASUS RIVE has only worked once ever and can load on to any other ASUS RIVE I've come across. I can not replicate this success anymore - by using another machine to read the BIOS and then write it out to different motherboard. This causes the onboard NIC to die, and the post screen complains about not initializing the NIC because it is corrupted.

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Fwd: Added chipsets
by Steven Zakulec 16 May '13

16 May '13

---------- Forwarded message ---------- From: Николай Николаев <evrinoma(a)gmail.com> Date: Thu, May 16, 2013 at 7:03 AM Subject: Re: [flashrom] Added chipsets To: Steven Zakulec <spzakulec(a)gmail.com> Hi Steven "Notes on specific chips: GigaDevice GD25Q512- .voltage = {2700, 3600}, My datasheet (v1.1 March 13 2012, GD25Q10/512) says 2.4-3.6V" I used last datasheet from web site gigadevice - datasheet (v1.1 March 13 2012, GD25Q10/512) says 2.7-3.6V http://www.gigadevice.com/WebPage/PageDetail.php?PageId=129&WebPageTypeId=9… but this document says 2.4 http://www.gigadevice.com/UserFiles/File/datasheet0320/GD25Q10&512_Rev1.1.p… we can easy write 2.4 - 3.6 V Thanks you right i made a mull with M25 and M45 chips. I send a new patch 2013/5/16 Steven Zakulec <spzakulec(a)gmail.com> > This review covers the GigaDevice (except GD25Q10) to Numonyx (partial, > list below) chips that were added. > Here's a couple of general notes: > Please add page programming eraseblocks > > WREN & WRSR flags only get added when the chip actually has the command. > > > Numonyx M45PE10- > + .feature_bits = FEATURE_WRSR_WREN, > The datasheet I have (Rev 7, April 2008) doesn't have a Write Status > Register operation- only a Read Status Register. > > Numonyx M45PE20- > + .feature_bits = FEATURE_WRSR_WREN, > The datasheet I have (Rev 6, May 2008) doesn't have a Write Status > Register operation- only a Read Status Register. > > Numonyx M45PE40- > + .feature_bits = FEATURE_WRSR_WREN, > The datasheet I have (Rev 9, May 2008) doesn't have a Write Status > Register operation- only a Read Status Register. > > Numonyx M45PE80- > + .feature_bits = FEATURE_WRSR_WREN, > The datasheet I have (Rev 6, May 2008) doesn't have a Write Status > Register operation- only a Read Status Register. > > Numonyx M45PE16- > + .feature_bits = FEATURE_WRSR_WREN, > The datasheet I have (Rev 8, May 2008) doesn't have a Write Status > Register operation- only a Read Status Register. > > I'll cover the rest of the Numonyx chips from the patch in a follow-up > review. > > > > -- With best regards Nikolay Nikolaev С Уважением Николаев Николай

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Re: [flashrom] z68extreme4 mainboard
by David MacKinnon 16 May '13

16 May '13

Possibly more helpful, sorry. It's an ASRock Z68 Extreme4, can't remember which gen, not the latest one. Also attaching lspci -nnvvvxxx and superiotool output this time. Happy to help if you want me to run stuff, or possibly even ssh access to the box. On Thu, May 16, 2013 at 3:21 PM, David MacKinnon <blaedd(a)gmail.com> wrote: > Following instructions ;-) In case someone hasn't sent you this one before. > > >

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z68extreme4 mainboard
by David MacKinnon 15 May '13

15 May '13

Following instructions ;-) In case someone hasn't sent you this one before.

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Re: [flashrom] Added chipsets
by Steven Zakulec 15 May '13

15 May '13

This review covers the GigaDevice (except GD25Q10) to Numonyx (partial, list below) chips that were added. Here's a couple of general notes: Please add page programming eraseblocks WREN & WRSR flags only get added when the chip actually has the command. Notes on specific chips: GigaDevice GD25Q512- .voltage = {2700, 3600}, My datasheet (v1.1 March 13 2012, GD25Q10/512) says 2.4-3.6V Numonyx M45PE10- + .feature_bits = FEATURE_WRSR_WREN, The datasheet I have (Rev 7, April 2008) doesn't have a Write Status Register operation- only a Read Status Register. Numonyx M45PE20- + .feature_bits = FEATURE_WRSR_WREN, The datasheet I have (Rev 6, May 2008) doesn't have a Write Status Register operation- only a Read Status Register. Numonyx M45PE40- + .feature_bits = FEATURE_WRSR_WREN, The datasheet I have (Rev 9, May 2008) doesn't have a Write Status Register operation- only a Read Status Register. Numonyx M45PE80- + .feature_bits = FEATURE_WRSR_WREN, The datasheet I have (Rev 6, May 2008) doesn't have a Write Status Register operation- only a Read Status Register. Numonyx M45PE16- + .feature_bits = FEATURE_WRSR_WREN, The datasheet I have (Rev 8, May 2008) doesn't have a Write Status Register operation- only a Read Status Register. I'll cover the rest of the Numonyx chips from the patch in a follow-up review.

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Re: [flashrom] About flashing mx25l4005 on Itona TC2331
by Bin X 15 May '13

15 May '13

Thanks for the reply. I will do some homework on the coreboot. However I think my chanllenge here is to find a program (I don't have hardware programmer) to flash the chip. I run flashrom.exe -p internal -c MX25L4005(A/C) -VVV and here is what I gotflashrom v0.9.6.1-r1671 on MS-DOS 7 (i686)flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.5, GCC 4.4.4, little endianCommand line (5 args): c:/bios/flashrom.exe -p internal -c MX25L4005(A/C) -VVVCalibrating delay loop... OS timer resolution is 110000 usecs, 298M loops per second, delay more than 10% too short (got 84% of expected delay), recalculating... 347M loops per second, 10 myus = 0 us, 100 myus = 0 us, 1000 myus = 0 us, 10000 myus = 0 us, 440000 myus = 440000 us, OK.Initializing internal programmerNo coreboot table found.DMI string system-manufacturer: ""DMI string system-product-name: ""DMI string system-version: ""DMI string baseboard-manufacturer: ""DMI string baseboard-product-name: ""DMI string baseboard-version: ""DMI string chassis-type: ""DMI chassis-type is not specific enough.Found ITE Super I/O, ID 0x8712 on port 0x2eBad Command or file nameBad Command or file nameBad Command or file nameBad Command or file nameBad Command or file nameBad Command or file name I am not sure which part is wrong. Is it because I don't have a full dos enviroment? Thanks, > Date: Tue, 14 May 2013 22:05:06 +0200 > From: vidwer(a)gmail.com > To: z2333(a)outlook.com > CC: flashrom(a)flashrom.org; coreboot(a)coreboot.org > Subject: Re: [flashrom] About flashing mx25l4005 on Itona TC2331 > > 2013/5/14 Bin X <z2333(a)outlook.com>: > > I apologize if it does not make sense at all since this is my first attempt > > to flash a bios with unmatched bios ID. > > > > I was trying to flash bios on a Itona TC2331 to get rid of the limitation > > they put on of any IDE HDD and USB HDD can’t be larger than 64mb. > > coreboot can do that, but you have to spend 'some' time on adding > support for your particular mainboard. > > See http://b2b.gigabyte.com/products/product-page.aspx?pid=3215#sp > ("Chipset VIA CN700 chipset with VIA VT8237R Plus") and > http://www.coreboot.org/Supported_Chipsets_and_Devices > > > > > The current bios rom, flash program and documentation can be found here: > > > > ftp://ftpguest:letmein@ftp.vxl.net/../Utilities/BIOS/TC23YY/ > > > > Since I don’t have any working rom so I am hoping to use the file from this > > board > > > > http://b2b.gigabyte.com/products/product-page.aspx?pid=3215#dl > > > > Because they are from the same vendor and used the same chipset. I > > understand it may not work at all but decide to take the risk. > > > > However, I can’t find any program to flash the bios that can ignore the bios > > ID. The vendor provided one can flash the bios but does not have the option > > to ignore the unmatched bios ID. Flashrom failed at probing the chipset. > > > > The building Q-Flash tells that it is MX25L4005 which should be supported by > > Flashrom. I also tried “internal:laptop=this_is_not_a_laptop” and still no > > success. > > It's very good that you found that programmer parameter. However, the > Gigabyte product picture shows that this (non-VXL) board uses LPC > flash instead of SPI. > > What we're interested in is what flashrom's output looks like when > there is - your words - no success. Does its output end with many > times "<hexadecimal value>:S"? > > > > > So I am not sure what else I should try to make Flashrom work. > > > > Any suggestions? > > > > Thanks, > > > > > > _______________________________________________ > > flashrom mailing list > > flashrom(a)flashrom.org > > http://www.flashrom.org/mailman/listinfo/flashrom > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom

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Re: [flashrom] how to comment on patch?
by Paul Menzel 15 May '13

15 May '13

Dear Siyuan, Am Mittwoch, den 15.05.2013, 17:14 +0800 schrieb WANG Siyuan: > how to comment on this patch: http://patchwork.coreboot.org/patch/3894/ Patchwork just processes messages from the mailing list. So you have to comment by replying to the message. You can download the original patch file in mbox format (see the mbox link [1] next to Download) and import it into your mail program (like Thunderbird). Then you can hit on reply and your comment is threaded correctly as the Message-ID is put into the `Reply-To` or `Reference` header fields. Thanks, Paul [1] http://patchwork.coreboot.org/patch/3894/mbox/

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