flashrom

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9164 discussions

Re: [flashrom] how to comment on patch?
by Stefan Tauner 15 May '13

15 May '13

On Wed, 15 May 2013 17:14:16 +0800 WANG Siyuan <wangsiyuanbuaa(a)gmail.com> wrote: > Hi, > how to comment on this patch: http://patchwork.coreboot.org/patch/3894/ Hello, patchwork does not support it directly. One can either extract the needed information from the stored header details in patchwork and manually create a proper reply, or google for the originating mail in our mail archive, e.g.: http://www.flashrom.org/pipermail/flashrom/2013-March/010745.html Clicking on the mail address on top should then create a proper reply mail template. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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how to comment on patch?
by WANG Siyuan 15 May '13

15 May '13

Hi, how to comment on this patch: http://patchwork.coreboot.org/patch/3894/ -- Yours sincerely, WANG Siyuan

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Read test - Dell Dimension C521
by Gil 15 May '13

15 May '13

seems fine flashrom v0.9.6.1-r1563 on Linux generic (i686) flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian Command line (5 args): flashrom -VVV -p internal -o fl1 Calibrating delay loop... OS timer resolution is 2 usecs, 948M loops per second, 10 myus = 12 us, 100 myus = 101 us, 1000 myus = 997 us, 10000 myus = 10369 us, 8 myus = 9 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Dell Inc" DMI string system-product-name: "Dimension C521" DMI string system-version: " " DMI string baseboard-manufacturer: "Dell Inc" DMI string baseboard-product-name: " " DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP51" with PCI ID 10de:0260. Enabling flash write... OK. ... The following protocols are supported: Non-SPI. ... Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x9d, id2 0x6e Found PMC flash chip "Pm49FL004" (512 kB, LPC, FWH) at physical address 0xfff80000. ... Found PMC flash chip "Pm49FL004" (512 kB, LPC, FWH). No operations were specified. Restoring PCI config space for 00:0a:0 reg 0x6d Saved BIOS ROM ok

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Flash chips >= 32MB
by Johannes Krampf 14 May '13

14 May '13

Hello, I spoke with stefanct on IRC today about using flash chips of 32MB size to store a small Linux installation next to coreboot. Apparently he will work on support for 32 bit addresses needed for chips > 16MB during his GSOC and he told me to write to this email address and he would give me a definite answer after this summer. Furthermore I've attached the log output when reading the flash of my board (Asrock E350M1/USB3), maybe this can be of use. From reading the specs, the highest capacity chip from Winbond for "PDIP8 300mil" is the W25Q128FV. There is a 256Mbit version, but only in different packages. Mh, a cli-only system should fit in a compressed 16MB ramdisk, but adding X and a browser (midori) would already be a huge challenge on 32M. Anyway, I hope your work will succeed. Good luck, Johannes

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About flashing mx25l4005 on Itona TC2331
by Bin X 14 May '13

14 May '13

I apologize if it does not make sense at all since this is my first attempt to flash a bios with unmatched bios ID. I was trying to flash bios on a Itona TC2331 to get rid of the limitation they put on of any IDE HDD and USB HDD can’t be larger than 64mb. The current bios rom, flash program and documentation can be found here: ftp://ftpguest:letmein@ftp.vxl.net/../Utilities/BIOS/TC23YY/ Since I don’t have any working rom so I am hoping to use the file from this board http://b2b.gigabyte.com/products/product-page.aspx?pid=3215#dl Because they are from the same vendor and used the same chipset. I understand it may not work at all but decide to take the risk. However, I can’t find any program to flash the bios that can ignore the bios ID. The vendor provided one can flash the bios but does not have the option to ignore the unmatched bios ID. Flashrom failed at probing the chipset. The building Q-Flash tells that it is MX25L4005 which should be supported by Flashrom. I also tried “internal:laptop=this_is_not_a_laptop” and still no success. So I am not sure what else I should try to make Flashrom work. Any suggestions? Thanks,

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Re: [flashrom] (no subject)
by Stefan Tauner 11 May '13

11 May '13

On Thu, 2 May 2013 12:57:16 -0700 David Hendricks <dhendrix(a)google.com> wrote: > What flash chip is this for? > > The id1 byte corresponds to ISSI, but there are not any ISSI SPI flash > chips supported at the moment. If you can provide the part number we can > add support. > I guess they avoid continuation bytes (again... I wonder what's so hard to grasp about them :/), it's probably this one: http://www.nantronicssemi.com/files/DS16MbSPIVer[1].A.PDF Koval can you confirm that it is a Nantronics N25S16? Where did you get it from? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] dediprog: fix SPI clock setting.
by Nico Huber 08 May '13

08 May '13

Hello Stefan, Am 06.05.2013 19:30, schrieb Stefan Tauner: > Avoid setting SPI speed on firmware versions < 5.0.0 and note this > limitation in the man page. > Use the index stored for a given speed in the translation array instead > of the index of the element in that array. > > Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > IMHO the speed setting was broken ever since. Has anyone every checked > the resulting frequency on the bus? Frequency wasn't checked but with speed settings below 8M the time to read a chip increased plausibly. > > I am not entirely sure why the translation table was introduced in the > first place although dediprog's indices could be "stored" in the array > offset, but mixing the two approaches is of course not a good idea. The translation table was used to make it obvious that the speeds are not ordered (see speed values for 12M and 8M). As the value range is continuous, we could use the array index as value. But please, comment on the interchanged speeds, when doing so. Well, I see one flaw in the current code: The default value for spispeed_idx in dediprog_init() (2 --> 8M) doesn't match the value mentioned in the manpage (12M). > > Nico, can you please verify that this patch is what you actually meant to do? Sorry, it is not. See below. Regards, Nico > > dediprog.c | 13 ++++++++----- > flashrom.8 | 3 ++- > 2 files changed, 10 insertions(+), 6 deletions(-) > > diff --git a/dediprog.c b/dediprog.c > index ab5388b..77ca195 100644 > --- a/dediprog.c > +++ b/dediprog.c > @@ -184,12 +184,15 @@ static const struct dediprog_spispeeds spispeeds[] = { > */ > static int dediprog_set_spi_speed(unsigned int spispeed_idx) The spispeed_idx parameter has to be an index into the spispeeds array. > { > - int ret; > + if (dediprog_firmwareversion < FIRMWARE_VERSION(5, 0, 0)) { > + msg_pwarn("Skipping to set SPI speed because firmware is too old.\n"); > + return 0; > + } > > msg_pdbg("SPI speed is %sHz\n", spispeeds[spispeed_idx].name); This is why I used an index into the array: To print the name of the selected speed. > > - ret = usb_control_msg(dediprog_handle, 0x42, 0x61, spispeeds[spispeed_idx].speed, 0xff, > - NULL, 0x0, DEFAULT_TIMEOUT); > + int ret = usb_control_msg(dediprog_handle, 0x42, 0x61, spispeeds[spispeed_idx].speed, 0xff, spispeed_idx is always used as an index into the spispeeds array. > + NULL, 0x0, DEFAULT_TIMEOUT); > if (ret != 0x0) { > msg_perr("Command Set SPI Speed 0x%x failed!\n", spispeeds[spispeed_idx].speed); Here also. > return 1; > @@ -801,12 +804,12 @@ int dediprog_init(void) > if (spispeed) { > for (i = 0; spispeeds[i].name; ++i) { > if (!strcasecmp(spispeeds[i].name, spispeed)) { > - spispeed_idx = i; > + spispeed_idx = spispeeds[i].speed; The value stored in this spispeed_idx variable is used to call dediprog_set_spi_speed() later. i is the index into the spispeeds array, so use that. > break; > } > } > if (!spispeeds[i].name) { > - msg_perr("Error: Invalid 'spispeed' value.\n"); > + msg_perr("Error: Invalid spispeed value: '%s'.\n", spispeed); > free(spispeed); > return 1; > } > diff --git a/flashrom.8 b/flashrom.8 > index c7a6c69..4e6ab55 100644 > --- a/flashrom.8 > +++ b/flashrom.8 > @@ -683,7 +683,8 @@ Usage example to select the second device: > .sp > An optional > .B spispeed > -parameter specifies the frequency of the SPI bus. Syntax is > +parameter specifies the frequency of the SPI bus. The firmware on the device needs to be 5.0.0 or newer. > +Syntax is > .sp > .B " flashrom \-p dediprog:spispeed=frequency" > .sp > -- M. Sc. Nico Huber Berater, SINA-Softwareentwicklung Public Sector secunet Security Networks AG Tel.: +49-201-5454-3635, Fax: +49-201-5454-1325 E-Mail: nico.huber(a)secunet.com Mergenthalerallee 77, 65760 Eschborn, Deutschland www.secunet.com ______________________________________________________________________ Sitz: Kronprinzenstraße 30, 45128 Essen, Deutschland Amtsgericht Essen HRB 13615 Vorstand: Dr. Rainer Baumgart (Vors.), Willem Bulthuis, Thomas Pleines Aufsichtsratsvorsitzender: Dr. Karsten Ottenberg ______________________________________________________________________

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Re: [flashrom] [PATCH] Enable spi clock setting in dediprog driver
by Nico Huber 06 May '13

06 May '13

Rebased this one, following patches are based on it. This adds a programmer parameter 'spispeed' to the dediprog driver to control the transfer rate on the spi bus. The following rates are available (in Hz): 375k, 750k, 1.5M, 2.18M, 3M, 8M, 12M and 24M The original driver reinitializes the programmer after setting the speed, so the initialization calls have moved into a new function dediprog_setup() which is called twice. Signed-off-by: Nico Huber <nico.huber(a)secunet.com> diff --git a/dediprog.c b/dediprog.c index a81cf83..60067a8 100644 --- a/dediprog.c +++ b/dediprog.c @@ -152,7 +152,23 @@ static int dediprog_set_spi_voltage(int millivolt) return 0; } -#if 0 +struct dediprog_spispeeds { + const char *const name; + const int speed; +}; + +static const struct dediprog_spispeeds spispeeds[] = { + { "24M", 0x0 }, + { "12M", 0x2 }, + { "8M", 0x1 }, + { "3M", 0x3 }, + { "2.18M", 0x4 }, + { "1.5M", 0x5 }, + { "750k", 0x6 }, + { "375k", 0x7 }, + { NULL, 0x0 }, +}; + /* After dediprog_set_spi_speed, the original app always calls * dediprog_set_spi_voltage(0) and then * dediprog_check_devicestring() four times in a row. @@ -160,56 +176,20 @@ static int dediprog_set_spi_voltage(int millivolt) * This looks suspiciously like the microprocessor in the SF100 has to be * restarted/reinitialized in case the speed changes. */ -static int dediprog_set_spi_speed(uint16_t speed) +static int dediprog_set_spi_speed(unsigned int spispeed_idx) { int ret; - unsigned int khz; - /* Case 1 and 2 are in weird order. Probably an organically "grown" - * interface. - * Base frequency is 24000 kHz, divisors are (in order) - * 1, 3, 2, 8, 11, 16, 32, 64. - */ - switch (speed) { - case 0x0: - khz = 24000; - break; - case 0x1: - khz = 8000; - break; - case 0x2: - khz = 12000; - break; - case 0x3: - khz = 3000; - break; - case 0x4: - khz = 2180; - break; - case 0x5: - khz = 1500; - break; - case 0x6: - khz = 750; - break; - case 0x7: - khz = 375; - break; - default: - msg_perr("Unknown frequency selector 0x%x! Aborting.\n", speed); - return 1; - } - msg_pdbg("Setting SPI speed to %u kHz\n", khz); + msg_pdbg("SPI speed is %sHz\n", spispeeds[spispeed_idx].name); - ret = usb_control_msg(dediprog_handle, 0x42, 0x61, speed, 0xff, NULL, - 0x0, DEFAULT_TIMEOUT); + ret = usb_control_msg(dediprog_handle, 0x42, 0x61, spispeeds[spispeed_idx].speed, 0xff, + NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { - msg_perr("Command Set SPI Speed 0x%x failed!\n", speed); + msg_perr("Command Set SPI Speed 0x%x failed!\n", spispeeds[spispeed_idx].speed); return 1; } return 0; } -#endif /* Bulk read interface, will read multiple 512 byte chunks aligned to 512 bytes. * @start start address @@ -736,6 +716,28 @@ static int parse_voltage(char *voltage) return millivolt; } +static int dediprog_setup(void) +{ + /* URB 6. Command A. */ + if (dediprog_command_a()) { + return 1; + } + /* URB 7. Command A. */ + if (dediprog_command_a()) { + return 1; + } + /* URB 8. Command Prepare Receive Device String. */ + /* URB 9. Command Receive Device String. */ + if (dediprog_check_devicestring()) { + return 1; + } + /* URB 10. Command C. */ + if (dediprog_command_c()) { + return 1; + } + return 0; +} + static const struct spi_programmer spi_programmer_dediprog = { .type = SPI_CONTROLLER_DEDIPROG, .max_data_read = MAX_DATA_UNSPECIFIED, @@ -777,12 +779,21 @@ static int dediprog_shutdown(void *data) int dediprog_init(void) { struct usb_device *dev; - char *voltage; - int millivolt = 3500; - int ret; + char *voltage, *spispeed; + int spispeed_idx = 2, millivolt = 3500; + int i, ret; msg_pspew("%s\n", __func__); + spispeed = extract_programmer_param("spispeed"); + if (spispeed) { + for (i = 0; spispeeds[i].name; ++i) { + if (!strcasecmp(spispeeds[i].name, spispeed)) { + spispeed_idx = i; + break; + } + } + } voltage = extract_programmer_param("voltage"); if (voltage) { millivolt = parse_voltage(voltage); @@ -821,33 +832,26 @@ int dediprog_init(void) return 1; } dediprog_endpoint = 2; - + if (register_shutdown(dediprog_shutdown, NULL)) return 1; dediprog_set_leds(PASS_ON|BUSY_ON|ERROR_ON); - /* URB 6. Command A. */ - if (dediprog_command_a()) { + /* Perform basic setup. */ + if (dediprog_setup()) { dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON); return 1; } - /* URB 7. Command A. */ - if (dediprog_command_a()) { - dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON); - return 1; - } - /* URB 8. Command Prepare Receive Device String. */ - /* URB 9. Command Receive Device String. */ - if (dediprog_check_devicestring()) { - dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON); - return 1; - } - /* URB 10. Command C. */ - if (dediprog_command_c()) { + + /* After setting voltage and speed, perform setup again. */ + if (dediprog_set_spi_voltage(0) || + dediprog_set_spi_speed(spispeed_idx) || + dediprog_setup()) { dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON); return 1; } + /* URB 11. Command Set SPI Voltage. */ if (dediprog_set_spi_voltage(millivolt)) { dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON); diff --git a/flashrom.8 b/flashrom.8 index b054c28..99e064e 100644 --- a/flashrom.8 +++ b/flashrom.8 @@ -651,6 +651,18 @@ where can be .BR 0V ", " 1.8V ", " 2.5V ", " 3.5V or the equivalent in mV. +.sp +An optional +.B spispeed +parameter specifies the frequency of the SPI bus. Syntax is +.sp +.B " flashrom \-p dediprog:spispeed=frequency" +.sp +where +.B frequency +can be +.BR 375k ", " 750k ", " 1.5M ", " 2.18M ", " 3M ", " 8M ", " 12M " or " 24M +(in Hz). The default is a frequency of 12 MHz. .SS .BR "rayer_spi " programmer The default I/O base address used for the parallel port is 0x378 and you can use

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W836xx
by fiebiee 05 May '13

05 May '13

sudo flashrom -V flashrom v0.9.5.2-r1546 on Linux 3.2.0-4-486 (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian Command line (1 args): flashrom -V Calibrating delay loop... OS timer resolution is 1 usecs, 674M loops per second, delay more than 10% too short (got 85% of expected delay), recalculating... 685M loops per second, delay more than 10% too short (got 87% of expected delay), recalculating... 610M loops per second, delay more than 10% too short (got 66% of expected delay), recalculating... 683M loops per second, delay more than 10% too short (got 74% of expected delay), recalculating... 679M loops per second, delay loop is unreliable, trying to continue 10 myus = 275 us, 100 myus = 74 us, 1000 myus = 850 us, 10000 myus = 9017 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Acer" DMI string system-product-name: "Extensa 3000 " DMI string system-version: "Rev 1 " DMI string baseboard-manufacturer: "Acer" DMI string baseboard-product-name: "Extensa 3000 " DMI string baseboard-version: "Rev 1.0 " DMI string chassis-type: "Notebook" Laptop detected via DMI. W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: ec. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting.

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Supporting of Intel HM65
by pavel 04 May '13

04 May '13

Hello! I am using Parted Magic Live CD operation system in my laptop. I want only *READ *information and use command in Konsole: "flashrom -r ASUS.def.iso -p internal:this_is_not_laptop >> error.txt" I have get this error file: *** error.txt **** flashrom v0.9.6.1-r1564 on Linux 3.7.9-pmagic (i686) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "Intel HM65". This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... WARNING: BIOS region SMM protection is enabled! WARNING: SPI Configuration Lockdown activated. FREG0: WARNING: Flash Descriptor region (0x00000000-0x00000fff) is read-only. FREG2: WARNING: Management Engine region (0x00001000-0x0017ffff) is locked. Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on http://flashrom.org/Supported_hardware#Supported_mainboards yet. Writes have been disabled. You can enforce write support with the ich_spi_force programmer option, but it will most likely harm your hardware! If you force flashrom you will get no support if something breaks. OK. Found Winbond flash chip "W25Q32" (4096 kB, SPI) at physical address 0xffc00000. Reading flash... FAILED. *** *What is means???* I have read "Support chipset" in http://www.flashrom.org/Supported_hardware and saw *"?"* symbol for *Intel HM65*. Can I read flash in my laptop by your programm (flashrom v0.9.6.1-r1564)? _________________ Pavel Slipenchoock

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