flashrom June 2014

flashrom@flashrom.org

29 participants
115 discussions

[PATCH 1/2] Remove W836xx log requests.
by Stefan Tauner 03 Jun '14

03 Jun '14

We got enough (and no one is looking at them for the time being anyway). Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- board_enable.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/board_enable.c b/board_enable.c index 2cf6776..782db35 100644 --- a/board_enable.c +++ b/board_enable.c @@ -333,12 +333,9 @@ void probe_superio_winbond(void) continue; } } - msg_pinfo("Active config mode, unknown reg 0x20 ID: %02x.\n", model); - msg_pinfo("Please send the output of \"flashrom -V -p internal\" to \n" - "flashrom(a)flashrom.org with W836xx: your board name: flashrom -V\n" - "as the subject to help us finish support for your Super I/O. Thanks.\n"); + msg_pdbg("Active config mode, unknown reg 0x20 ID: %02x.\n", model); continue; - } + } /* The Super I/O reacts to W836xx enter and exit config mode, it's probably Winbond. */ w836xx_ext_enter(s.port); s.model = sio_read(s.port, 0x20); -- Kind regards, Stefan Tauner

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Re: [flashrom] ft2232_spi:type=jtagkey
by Stefan Tauner 03 Jun '14

03 Jun '14

Hello Alfin, thanks for your report. Have you connected all input pins of the flash chip to the programmer? The behavior shown in the log extract could be coming from a floating write protection pin. That's pin #9 (diagonally opposite to the pin #1 marker on the 16-pin sop/soic package). I'd check if that pin is pulled-high towards VCC (pin #2). Likewise all other *input* pins should be driven - either statically to GND or VCC (ideally by resistors), or dynamically by the programmer's clock and data out pins. HTH -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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W836xx: J1800N-D2H: flashrom -V
by Maarten Wouters 03 Jun '14

03 Jun '14

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Re: [flashrom] Add PICkit2 as an SPI programmer
by Stefan Tauner 02 Jun '14

02 Jun '14

On Mon, 2 Jun 2014 21:43:09 -0400 Justin Chevrier <jchevrier(a)gmail.com> wrote: > +.BR "* atavia" " (for flash ROMs on VIA VT6421A SATA controllers)" > +.sp > +.BR "* it8212" " (for flash ROMs on ITE IT8212F ATA/RAID controller)" > +.sp Hi, thanks for your updated patch! You seem to have mixed up a few bits while rebasing. I could clear that up too, but if you beat me at it, I'd feel lucky ;) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] Add PICkit2 as an SPI programmer
by Justin Chevrier 02 Jun '14

02 Jun '14

On Mon, Jun 2, 2014 at 9:43 PM, Justin Chevrier <jchevrier(a)gmail.com> wrote: > Hi Stefan, > > Attached is a second revision of my patch. Hopefully it addresses > everything you pointed out previously! Keep me posted if more work > needs to be done. > > I have attached a log of a write as well. > > Thanks again, > > Justin > > On Fri, May 30, 2014 at 8:27 PM, Stefan Tauner > <stefan.tauner(a)alumni.tuwien.ac.at> wrote: >> On Thu, 1 May 2014 13:39:44 -0400 >> Justin Chevrier <jchevrier(a)gmail.com> wrote: >> >>> Very sorry for not replying to your email (thanks for the review by the way). >>> >>> I do have a newer patch that fixes most if not all of the points you >>> made, but I've been slacking in going over it one last time and >>> getting it sent in. I had someone contact me directly around December >>> and they successfully used this updated patch on their hardware. >>> >>> I'll see if I can get the patch brushed up and sent in shortly. >>> >>> Thanks for the reminder (ugh, can't believe it's been over one year). >> >> Hi Justin, >> >> this is just a friendly ping. I am planning to do a stable release in >> the not too distant future (next few weeks) and would like to include >> your module if it gets ready by then. >> >> -- >> Kind regards/Mit freundlichen Grüßen, Stefan Tauner Ugh, sorry for the top post and the flashrom.8 junk in the patch. New version attached. Justin

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Re: [flashrom] Add PICkit2 as an SPI programmer
by Stefan Tauner 02 Jun '14

02 Jun '14

On Thu, 1 May 2014 13:39:44 -0400 Justin Chevrier <jchevrier(a)gmail.com> wrote: > Very sorry for not replying to your email (thanks for the review by the way). > > I do have a newer patch that fixes most if not all of the points you > made, but I've been slacking in going over it one last time and > getting it sent in. I had someone contact me directly around December > and they successfully used this updated patch on their hardware. > > I'll see if I can get the patch brushed up and sent in shortly. > > Thanks for the reminder (ugh, can't believe it's been over one year). Hi Justin, this is just a friendly ping. I am planning to do a stable release in the not too distant future (next few weeks) and would like to include your module if it gets ready by then. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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W836xx: HP ProLiant DL585 G7: flashrom -V
by Arnold, Scott C. (JSC-DD42)[LOCKHEED MARTIN CORP] 02 Jun '14

02 Jun '14

./flashrom -V -p internal -r /tmp/flash.out flashrom v0.9.7-r1711 on Linux 3.7.9.lite (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.10, GCC 4.4.7 20120313 (Red Hat 4.4.7-4), little endian Command line (5 args): ./flashrom -V -p internal -r /tmp/flash.out Calibrating delay loop... OS timer resolution is 1 usecs, 1047M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 999 us, 10000 myus = 10001 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "HP" DMI string system-product-name: "ProLiant DL585 G7" DMI string system-version: "Not Specified" DMI string baseboard-manufacturer: "" DMI string baseboard-product-name: "" DMI string baseboard-version: "" DMI string chassis-type: "Rack Mount Chassis" W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: 03. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found chipset "AMD SB7x0/SB8x0/SB9x0" with PCI ID 1002:439d. Enabling flash write... SPI base address is at 0x0 ROM strap override is not active OK. Note: Coreboot superiotool says the superio is a SMSC FDC37C93xFR Thanks Scott

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[PATCH][RFC] uisp_spi programmer support
by Andrew 02 Jun '14

02 Jun '14

Hello, all. I've been playing around with buspirate and my uISP ( https://github.com/uISP/ ) dongle. Even with newer firmware buspirate is really slow, and on average, takes 3m 49s to read out a 2MiB SPI flash. So I decided to play around and see if I can make a faster programmer with my uISP dongle. Basically it's an atmega8 with 12M crystal running vusb stack (no hardware usb). Any other similar hardware would do. This hardware is really cheap (BOM is less than 5$ including the pcb). My first attempt was creating a serprog-compatible firmware for uISP. It can be found here: https://github.com/uISP/uisp-app-serprog The results weren't very exciting. It took 4m 30s to read out a 2MiB SPI flash (EN25QH16) on 12M crystal. Same for 20M crystal. It seems like it was a limitation of bulk out transfers via vusb. The second attempt required patching flashrom itself, but resulted in a MUCH simpler firmware that fits roughly 115 lines of code (not counting vusb). It just uses control transfers for both reads and writes. With vusb long transfers enabled, 20Mhz crystal, 10Mhz SPI speed and max_data_read/max_data_write set to 4096 bytes reading a 2MiB SPI flash took only 2m 13s which I consider a WIN. 4096 is not a vusb limit. USB spec limits maximum transfers to control endpoint to 4096 bytes anyway. Using 254 byte max_data_read/max_data_write and long transfers disabled would be slower, but it is possible to fit everything into 2K flash and use some attiny2313, which will make it even cheaper. The protocol's simple as hell, so anyone with a better hardware around (STM32, atmega8u2, pic32, whatever) can implement it with very little effort and get lighting-fast speeds. My WIP patch to flashrom's attached, although I have a few silly questions left: * Do I need to implement SPI frequency changing via a dedicated command or is it okay to hardcode it to 10Mhz in firmware? * Right now I'm using the same spi_read as serprog does. Is okay, or should I add an option to disable it? * firmware version checking, etc. (Is it a good idea to implement?) * Is there a better way to benchmark read/write speed in flashrom, since delay loop calibration interferes with speed measurements (currently I just used "time flashrom ...") -- Regards, Andrew

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Re: [flashrom] [PATCH 2/2] print_wiki.c: there is only one way to represent time.
by Stefan Tauner 01 Jun '14

01 Jun '14

On Sat, 31 May 2014 02:05:13 +0200 Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: > ISO 8601. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Self-acked and committed in r1817. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 1/2] print_wiki.c: refine header and include a legend explaining the test state representation.
by Stefan Tauner 01 Jun '14

01 Jun '14

On Sat, 31 May 2014 02:05:12 +0200 Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Self-acked and committed in r1816 with small refinements. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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flashrom June 2014