flashrom June 2014

flashrom@flashrom.org

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115 discussions

[PATCH 1/5] Fix FWH IDSEL message printing.
by Stefan Tauner 09 Jun '14

09 Jun '14

Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- chipset_enable.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 40761d2..46cc79c 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -404,7 +404,7 @@ static int enable_flash_ich_fwh_decode(struct pci_dev *dev, enum ich_chipset ich uint64_t fwh_idsel_old = pci_read_long(dev, fwh_sel1); fwh_idsel_old <<= 16; fwh_idsel_old |= pci_read_word(dev, fwh_sel2); - msg_pdbg("\nSetting IDSEL from 0x%012" PRIx64 " to 0x%012" PRIx64 " for top 16 MB.", + msg_pdbg("Setting IDSEL from 0x%012" PRIx64 " to 0x%012" PRIx64 " for top 16 MB.\n", fwh_idsel_old, fwh_idsel); rpci_write_long(dev, fwh_sel1, (fwh_idsel >> 16) & 0xffffffff); rpci_write_word(dev, fwh_sel2, fwh_idsel & 0xffff); @@ -418,7 +418,7 @@ idsel_garbage_out: free(idsel); if (!implemented) { - msg_pdbg2("FWH IDSEL handling is not implemented on this chipset."); + msg_pdbg2("FWH IDSEL handling is not implemented on this chipset.\n"); return 0; } @@ -434,7 +434,7 @@ idsel_garbage_out: /* FWH_SEL1 */ for (i = 7; i >= 0; i--) { int tmp = (fwh_conf >> (i * 4)) & 0xf; - msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", + msg_pdbg("0x%08x/0x%08x FWH IDSEL: 0x%x\n", (0x1ff8 + i) * 0x80000, (0x1ff0 + i) * 0x80000, tmp); @@ -448,7 +448,7 @@ idsel_garbage_out: fwh_conf = pci_read_word(dev, fwh_sel2); for (i = 3; i >= 0; i--) { int tmp = (fwh_conf >> (i * 4)) & 0xf; - msg_pdbg("\n0x%08x/0x%08x FWH IDSEL: 0x%x", + msg_pdbg("0x%08x/0x%08x FWH IDSEL: 0x%x\n", (0xff4 + i) * 0x100000, (0xff0 + i) * 0x100000, tmp); @@ -465,7 +465,7 @@ idsel_garbage_out: fwh_conf |= pci_read_byte(dev, fwh_dec_en_lo); for (i = 7; i >= 0; i--) { int tmp = (fwh_conf >> (i + 0x8)) & 0x1; - msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", + msg_pdbg("0x%08x/0x%08x FWH decode %sabled\n", (0x1ff8 + i) * 0x80000, (0x1ff0 + i) * 0x80000, tmp ? "en" : "dis"); @@ -477,7 +477,7 @@ idsel_garbage_out: } for (i = 3; i >= 0; i--) { int tmp = (fwh_conf >> i) & 0x1; - msg_pdbg("\n0x%08x/0x%08x FWH decode %sabled", + msg_pdbg("0x%08x/0x%08x FWH decode %sabled\n", (0xff4 + i) * 0x100000, (0xff0 + i) * 0x100000, tmp ? "en" : "dis"); @@ -488,7 +488,7 @@ idsel_garbage_out: } } max_rom_decode.fwh = min(max_decode_fwh_idsel, max_decode_fwh_decode); - msg_pdbg("\nMaximum FWH chip size: 0x%x bytes", max_rom_decode.fwh); + msg_pdbg("Maximum FWH chip size: 0x%x bytes\n", max_rom_decode.fwh); return 0; } -- Kind regards, Stefan Tauner

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[PATCH 0/5] Bunch of stuff on the way to new probing
by Stefan Tauner 09 Jun '14

09 Jun '14

While I was hacking around to prepare for the probing rewrite I have found a few things that could be improved. This is the first batch of such changes that are not directly related to the probing, could easily be factored out and make sense even without the new proving IMHO. The existence and naming of helpers.c was discussed previously in the context of layout patches (in case you seem to have a deja vu ;). Stefan Tauner (5): Fix FWH IDSEL message printing. Move check_chip_supported() to cli_classic.c. Introduce helpers.c. Refine handling chips that exceed maximum programmer sizes. Reorder and cleanup feature flags. Makefile | 2 +- chipset_enable.c | 14 +++--- cli_classic.c | 83 ++++++++++++++++++++++++++++++++++-- flash.h | 19 +++++---- flashchips.c | 9 +--- flashrom.c | 127 ++++--------------------------------------------------- helpers.c | 60 ++++++++++++++++++++++++++ programmer.h | 3 +- 8 files changed, 168 insertions(+), 149 deletions(-) create mode 100644 helpers.c -- Kind regards, Stefan Tauner

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report about AT25F4096
by 공준혁 07 Jun '14

07 Jun '14

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Unable to flash MX25L3206E
by HyDzFR 05 Jun '14

05 Jun '14

Hi, I try to flash a mx25L3206E from macronix with flashrom 0.9.7-r1817 with a raspberry pi via spi. The chip is on the motherboard. I've disconnect Vcc from motherboard. Flashrom failed to erase the chip and say "flash chip is in an unknow state ». I launch the following command: sudo flashrom -w XXX.bin -V -p linux_spi:dev=/dev/spidev0.0 -c MX25L3206E Here is the output http://paste.flashrom.org/view.php?id=2621 Regards Hydz

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Re: [flashrom] Flashrom Update Failure
by Will Choe 05 Jun '14

05 Jun '14

Resolved it by copy & modifying: else if (force && chip_to_probe) { struct registered_programmer *pgm; int compatible_programmers = 0; msg_cinfo("Force read (-f -r -c) requested, pretending the chip is there:\n"); /* This loop just counts compatible controllers. */ for (j = 0; j < registered_programmer_count; j++) { pgm = &registered_programmers[j]; /* chip is still set from the chip_to_probe earlier in this function. */ if (pgm->buses_supported & chip->bustype) compatible_programmers++; } if (!compatible_programmers) { msg_cinfo("No compatible controller found for the requested flash chip.\n"); ret = 1; goto out_shutdown; } if (compatible_programmers > 1) msg_cinfo("More than one compatible controller found for the requested flash " "chip, using the first one.\n"); for (j = 0; j < registered_programmer_count; j++) { pgm = &registered_programmers[j]; startchip = probe_flash(pgm, 0, &flashes[0], 1); if (startchip != -1) break; } msg_cinfo("Please note that forced writes most likely contain garbage.\n"); } if (startchip == -1) { ret = 1; goto out_shutdown; } to the cli_classic.c I think it's better to have 'force & force' option to do the writing. Will 2014. 6. 5., pm 5:05, Will Choe <jazzbearz(a)gmail.com> wrote: > Hi, > > Flashrom update failed due to sudden network interruption. After then, when I try the flashrom, following message appears: > > flashrom v0.9.7-r1711 on Linux 2.6.32-431.5.1.el6.x86_64 (x86_64) > flashrom is free software, get the source code at http://www.flashrom.org > > Calibrating delay loop... OK. > sh: dmidecode: command not found > dmidecode execution unsuccessful - continuing without DMI info > Found chipset "Intel ICH10R". Enabling flash write... OK. > No EEPROM/flash device found. > Note: flashrom can never write if the flash chip isn't found automatically. > > How do I make the flashrom to force rewrite the rom? > > Thanks in advance. > > Will > > > >

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Flashrom Update Failure
by Will Choe 05 Jun '14

05 Jun '14

Hi, Flashrom update failed due to sudden network interruption. After then, when I try the flashrom, following message appears: flashrom v0.9.7-r1711 on Linux 2.6.32-431.5.1.el6.x86_64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. sh: dmidecode: command not found dmidecode execution unsuccessful - continuing without DMI info Found chipset "Intel ICH10R". Enabling flash write... OK. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. How do I make the flashrom to force rewrite the rom? Thanks in advance. Will

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Re: [flashrom] ft2232_spi:type=jtagkey
by Stefan Tauner 05 Jun '14

05 Jun '14

On Tue, 3 Jun 2014 19:48:12 +0700 Alfin Cahya <alfincp(a)gmail.com> wrote: > Hello Stefan, > > Thanks for your response. I have connected all the pins (CLK,DI,DO,CS) > and 3.3v to VCC, HOLD, WP. > IC type is EN25QH128A-HIP ( 4 pins ). > Try using Arduino Duemilanove (serprog:dev=/dev/ttyUSB0:2000000) > result remains the same. Then it may be one of the problems listed here: http://flashrom.org/ISP Could you please post a complete verbose log? Is the chip always detected? If you read the chip multiple times, is the content read always the same? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Try to add support for LE25FW106/1Mbit spi flash
by The Raven 04 Jun '14

04 Jun '14

Hello, i am trying to add this chip (ID 0x62 0x15). It works so far, but erase function 1 is not working. The datasheet tells that it supports 2K small sector, 32K sector and chip erase. 2K Small Sector and chip erase works. But 32K not. And i don't know why. Please have a look: .vendor = "Sanyo", .name = "LE25FW106", .bustype = BUS_SPI, .manufacture_id = SANYO_ID, .model_id = SANYO_LE25FW106, .total_size = 128, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_res2, .probe_timing = TIMING_ZERO, .block_erasers = { { // .eraseblocks = { {2 * 1024, 64} }, //ok // .block_erase = spi_block_erase_d7, // }, { .eraseblocks = { {32 * 1024, 4} }, //not ok .block_erase = spi_block_erase_d8, // }, { // .eraseblocks = { {128 * 1024, 1} }, //ok // .block_erase = spi_block_erase_c7, } }, .printlock = spi_prettyprint_status_register_plain, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, I am also not sure if "FEATURE_WRSR_WREN" is correct. The code is taken from "LE25FW406A" chip and changed to fit the "LE25FW106". This is the error: Found Sanyo flash chip "LE25FW106" (128 kB, SPI). Erasing and writing flash chip... Trying erase function 0... 0x000000-0x007fff:E, 0x008000-0x00ffff:EError: invalid response 0xAF from device spi_block_erase_d8 failed during command execution at address 0x8000 Looking for another erase function. No usable erase functions left. FAILED! Attention: It tells function 0, but this is because i have removed the other functions for testing. ;-) BTW: Chips was found an a 2.5" hitachi harddisk. Chip is a "T" model (MSOP8).

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[commit] r1818 - trunk
by repository service 04 Jun '14

04 Jun '14

Author: stefanct Date: Wed Jun 4 18:17:03 2014 New Revision: 1818 URL: http://flashrom.org/trac/flashrom/changeset/1818 Log: Add support for Sanyo LE25FW106. Also, add spi_disable_blockprotect_bp1_srwd(). Originally written and tested by The Raven <originalraven(a)hotmail.com>. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/spi25_statusreg.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/chipdrivers.h Wed Jun 4 18:17:03 2014 (r1818) @@ -73,6 +73,7 @@ int spi_prettyprint_status_register_bp4_srwd(struct flashctx *flash); int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash); int spi_disable_blockprotect(struct flashctx *flash); +int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash); int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/flashchips.c Wed Jun 4 18:17:03 2014 (r1818) @@ -9153,6 +9153,37 @@ { .vendor = "Sanyo", + .name = "LE25FW106", + .bustype = BUS_SPI, + .manufacture_id = SANYO_ID, + .model_id = SANYO_LE25FW106, + .total_size = 128, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_res2, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {2 * 1024, 64} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp1_srwd, /* FIXME: Add ERSER error flag. */ + .unlock = spi_disable_blockprotect_bp1_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Sanyo", .name = "LE25FW406A", .bustype = BUS_SPI, .manufacture_id = SANYO_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/flashchips.h Wed Jun 4 18:17:03 2014 (r1818) @@ -537,6 +537,7 @@ #define SANYO_ID 0x62 /* Sanyo */ #define SANYO_LE25FW203A 0x1600 #define SANYO_LE25FW403A 0x1100 +#define SANYO_LE25FW106 0x15 #define SANYO_LE25FW406 0x07 /* RES2 */ #define SANYO_LE25FW418A 0x10 /* RES2 and some weird 1 byte RDID variant */ #define SANYO_LE25FW406A 0x1A /* RES2, no datasheet */ Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Mon Jun 2 02:46:02 2014 (r1817) +++ trunk/spi25_statusreg.c Wed Jun 4 18:17:03 2014 (r1818) @@ -196,6 +196,13 @@ return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF); } +/* A common block protection disable that tries to unset the status register bits masked by 0x0C (BP0-1) and + * protected/locked by bit #7. Useful when bits 4-5 may be non-0). */ +int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash) +{ + return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0, 0xFF); +} + /* A common block protection disable that tries to unset the status register bits masked by 0x1C (BP0-2) and * protected/locked by bit #7. Useful when bit #5 is neither a protection bit nor reserved (and hence possibly * non-0). */

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[PATCH 2/2] Remove MCP6/7/8 SPI log requests.
by Stefan Tauner 03 Jun '14

03 Jun '14

We got enough (and no one is looking at them for the time being anyway). Also, return an error code in the case no bus type could be detected. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- chipset_enable.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 40761d2..ec3c12c 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1244,8 +1244,6 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) int ret = 0, want_spi = 0; uint8_t val; - msg_pinfo("This chipset is not really supported yet. Guesswork...\n"); - /* dev is the ISA bridge. No idea what the stuff below does. */ val = pci_read_byte(dev, 0x8a); msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " @@ -1264,17 +1262,15 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) */ internal_buses_supported = BUS_NONE; msg_pdbg("Flash bus type is SPI\n"); - msg_pinfo("SPI on this chipset is WIP. Please report any " - "success or failure by mailing us the verbose " - "output to flashrom(a)flashrom.org, thanks!\n"); break; default: /* Should not happen. */ internal_buses_supported = BUS_NONE; - msg_pdbg("Flash bus type is unknown (none)\n"); - msg_pinfo("Something went wrong with bus type detection.\n"); - goto out_msg; - break; + msg_pwarn("Flash bus type is unknown (none)\n"); + msg_pinfo("Please send the log files created by \"flashrom -p internal -o logfile\" to \n" + "flashrom(a)flashrom.org with \"your board name: flashrom -V\" as the subject to\n" + "help us finish support for your chipset. Thanks.\n"); + return ERROR_NONFATAL; } /* Force enable SPI and disable LPC? Not a good idea. */ @@ -1287,11 +1283,6 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name) if (mcp6x_spi_init(want_spi)) ret = 1; -out_msg: - msg_pinfo("Please send the output of \"flashrom -V -p internal\" to flashrom(a)flashrom.org\n" - "with \"your board name: flashrom -V\" as the subject to help us finish support\n" - "for your chipset. Thanks.\n"); - return ret; } -- Kind regards, Stefan Tauner

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flashrom June 2014