flashrom June 2014

flashrom@flashrom.org

29 participants
115 discussions

[PATCH 2/2] Move global io_base_addr into compilation units.
by Stefan Tauner 01 Jun '14

01 Jun '14

Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- atahpt.c | 2 ++ gfxnvidia.c | 2 +- it8212.c | 2 +- nic3com.c | 1 + nicintel_spi.c | 2 +- nicnatsemi.c | 1 + nicrealtek.c | 1 + ogp_spi.c | 2 +- pcidev.c | 1 - programmer.h | 3 +-- 10 files changed, 10 insertions(+), 7 deletions(-) diff --git a/atahpt.c b/atahpt.c index 242e14a..edffa3b 100644 --- a/atahpt.c +++ b/atahpt.c @@ -33,6 +33,8 @@ #define PCI_VENDOR_ID_HPT 0x1103 +static uint32_t io_base_addr = 0; + const struct dev_entry ata_hpt[] = { {0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"}, {0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"}, diff --git a/gfxnvidia.c b/gfxnvidia.c index d3ee14e..2a5c7ae 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -89,7 +89,7 @@ int gfxnvidia_init(void) if (!dev) return 1; - io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); if (!io_base_addr) return 1; diff --git a/it8212.c b/it8212.c index f68121a..4d1c403 100644 --- a/it8212.c +++ b/it8212.c @@ -59,7 +59,7 @@ int it8212_init(void) return 1; /* Bit 0 is address decode enable, 17-31 the base address, everything else reserved/zero. */ - io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE; + uint32_t io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE; if (!io_base_addr) return 1; diff --git a/nic3com.c b/nic3com.c index 27e28c7..145554d 100644 --- a/nic3com.c +++ b/nic3com.c @@ -33,6 +33,7 @@ #define PCI_VENDOR_ID_3COM 0x10b7 +static uint32_t io_base_addr = 0; static uint32_t internal_conf; static uint16_t id; diff --git a/nicintel_spi.c b/nicintel_spi.c index 1522c9b..25bfa8f 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -179,7 +179,7 @@ int nicintel_spi_init(void) if (!dev) return 1; - io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); if (!io_base_addr) return 1; diff --git a/nicnatsemi.c b/nicnatsemi.c index cb8da6d..acefddb 100644 --- a/nicnatsemi.c +++ b/nicnatsemi.c @@ -30,6 +30,7 @@ #define BOOT_ROM_ADDR 0x50 #define BOOT_ROM_DATA 0x54 +static uint32_t io_base_addr = 0; const struct dev_entry nics_natsemi[] = { {0x100b, 0x0020, NT, "National Semiconductor", "DP83815/DP83816"}, {0x100b, 0x0022, NT, "National Semiconductor", "DP83820"}, diff --git a/nicrealtek.c b/nicrealtek.c index 02fbd39..4a440ea 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -28,6 +28,7 @@ #define PCI_VENDOR_ID_REALTEK 0x10ec #define PCI_VENDOR_ID_SMC1211 0x1113 +static uint32_t io_base_addr = 0; static int bios_rom_addr, bios_rom_data; const struct dev_entry nics_realtek[] = { diff --git a/ogp_spi.c b/ogp_spi.c index 23431d1..a624dfd 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -132,7 +132,7 @@ int ogp_spi_init(void) if (!dev) return 1; - io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); if (!io_base_addr) return 1; diff --git a/pcidev.c b/pcidev.c index 3a3f77c..2c78063 100644 --- a/pcidev.c +++ b/pcidev.c @@ -25,7 +25,6 @@ #include "programmer.h" #include "hwaccess.h" -uint32_t io_base_addr; struct pci_access *pacc; enum pci_bartype { diff --git a/programmer.h b/programmer.h index 3ea014c..d299656 100644 --- a/programmer.h +++ b/programmer.h @@ -173,8 +173,7 @@ struct bitbang_spi_master { struct pci_dev; /* pcidev.c */ -// FIXME: These need to be local, not global -extern uint32_t io_base_addr; +// FIXME: This needs to be local, not global(?) extern struct pci_access *pacc; int pci_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); -- Kind regards, Stefan Tauner

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[PATCH] Add IT8212F as programmer
by Kyösti Mälkki 01 Jun '14

01 Jun '14

This PCI PATA controller can use 3V parallel flash upto 128kB. My card was identified as: PCI 1283:8212, subsystem 1283:0001. and labelled as: Innovision Multimedia LTD. EIO ATA133 RAID (DM-8401 Ver A) This particular card did not require setting of any GPIO signals to enable flash writing. My card has Pm39LV512 in PLCC32 package without socket. Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Index: flashrom-it8212f/Makefile =================================================================== --- flashrom-it8212f/Makefile (revision 1539) +++ flashrom-it8212f/Makefile (working copy) @@ -177,7 +177,12 @@ else override CONFIG_SATAMV = no endif +ifeq ($(CONFIG_IT8212), yes) +UNSUPPORTED_FEATURES += CONFIG_IT8212=yes +else +override CONFIG_IT8212 = no endif +endif ifeq ($(TARGET_OS), libpayload) CPPFLAGS += -DSTANDALONE @@ -344,6 +349,9 @@ # Enable Linux spidev interface by default. We disable it on non-Linux targets. CONFIG_LINUX_SPI ?= yes +# Always enable ITE IT8212F PATA controllers for now. +CONFIG_IT8212 ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -503,6 +511,12 @@ PROGRAMMER_OBJS += linux_spi.o endif +ifeq ($(CONFIG_IT8212), yes) +FEATURE_CFLAGS += -D'CONFIG_IT8212=1' +PROGRAMMER_OBJS += it8212.o +NEED_PCI := yes +endif + ifeq ($(NEED_SERIAL), yes) LIB_OBJS += serial.o endif Index: flashrom-it8212f/print_wiki.c =================================================================== --- flashrom-it8212f/print_wiki.c (revision 1539) +++ flashrom-it8212f/print_wiki.c (working copy) @@ -338,6 +338,9 @@ #if CONFIG_SATAMV == 1 print_supported_pcidevs_wiki(satas_mv); #endif +#if CONFIG_IT8212 == 1 + print_supported_pcidevs_wiki(ata_it82); +#endif printf("\n|}\n"); } Index: flashrom-it8212f/it8212.c =================================================================== --- flashrom-it8212f/it8212.c (revision 0) +++ flashrom-it8212f/it8212.c (revision 0) @@ -0,0 +1,110 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2011 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include "flash.h" +#include "programmer.h" + +static uint8_t *it8212_bar; +static uint8_t it8212_rom_enable = 0; + +#define PCI_VENDOR_ID_ITE 0x1283 + +const struct pcidev_status ata_it82[] = { + {PCI_VENDOR_ID_ITE, 0x8212, OK, "ITE", "8212F PATA RAID"}, + {}, +}; + +#define IT8212_MEMMAP_SIZE (128 * 1024) +#define IT8212_MEMMAP_MASK (IT8212_MEMMAP_SIZE - 1) + +static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t it8212_chip_readb(const struct flashctx *flash, + const chipaddr addr); +static const struct par_programmer par_programmer_it8212 = { + .chip_readb = it8212_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = it8212_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +static int it8212_shutdown(void *data) +{ + if (! it8212_rom_enable) { + uintptr_t addr = pci_read_long(pcidev_dev, PCI_ROM_ADDRESS); + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, addr & ~0x01); + } + physunmap(it8212_bar, IT8212_MEMMAP_SIZE); + pci_cleanup(pacc); + release_io_perms(); + return 0; +} + +int it8212_init(void) +{ + uintptr_t addr; + + /* Needed only for PCI accesses on some platforms. + * FIXME: Refactor that into get_mem_perms/get_io_perms/get_pci_perms? + */ + get_io_perms(); + + /* No need to check for errors, pcidev_init() will not return in case + * of errors. + */ + addr = pcidev_init(PCI_ROM_ADDRESS, ata_it82); + + it8212_bar = physmap("IT8212F flash", addr, IT8212_MEMMAP_SIZE); + if (it8212_bar == ERROR_PTR) + goto error_out_unmap; + if (register_shutdown(it8212_shutdown, NULL)) + return 1; + + /* To restore ROM BAR enable once we are done. */ + it8212_rom_enable = addr & 0x01; + if (! it8212_rom_enable) + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, addr | 0x01); + + max_rom_decode.parallel = IT8212_MEMMAP_SIZE; + register_par_programmer(&par_programmer_it8212, BUS_PARALLEL); + return 0; + +error_out_unmap: + physunmap(it8212_bar, IT8212_MEMMAP_SIZE); + pci_cleanup(pacc); + release_io_perms(); + return 1; +} + +static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) +{ + pci_mmio_writeb(val, it8212_bar + (addr & IT8212_MEMMAP_MASK)); +} + +static uint8_t it8212_chip_readb(const struct flashctx *flash, + const chipaddr addr) +{ + return pci_mmio_readb(it8212_bar + (addr & IT8212_MEMMAP_MASK)); +} Index: flashrom-it8212f/flashrom.c =================================================================== --- flashrom-it8212f/flashrom.c (revision 1539) +++ flashrom-it8212f/flashrom.c (working copy) @@ -261,6 +261,16 @@ }, #endif +#if CONFIG_IT8212 == 1 + { + .name = "it8212", + .init = it8212_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; Index: flashrom-it8212f/programmer.h =================================================================== --- flashrom-it8212f/programmer.h (revision 1539) +++ flashrom-it8212f/programmer.h (working copy) @@ -87,6 +87,9 @@ #if CONFIG_LINUX_SPI == 1 PROGRAMMER_LINUX_SPI, #endif +#if CONFIG_IT8212 == 1 + PROGRAMMER_IT8212, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -456,6 +459,12 @@ int linux_spi_init(void); #endif +/* it8212.c */ +#if CONFIG_IT8212 == 1 +int it8212_init(void); +extern const struct pcidev_status ata_it82[]; +#endif + /* dediprog.c */ #if CONFIG_DEDIPROG == 1 int dediprog_init(void); Index: flashrom-it8212f/print.c =================================================================== --- flashrom-it8212f/print.c (revision 1539) +++ flashrom-it8212f/print.c (working copy) @@ -538,6 +538,11 @@ programmer_table[PROGRAMMER_LINUX_SPI].name); msg_ginfo("Device files /dev/spidev*.*\n"); #endif +#if CONFIG_IT8212 == 1 + msg_ginfo("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_IT8212].name); + print_supported_pcidevs(ata_it82); +#endif } #if CONFIG_INTERNAL == 1

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[commit] r1811 - trunk
by repository service 01 Jun '14

01 Jun '14

Author: stefanct Date: Mon Jun 2 00:36:30 2014 New Revision: 1811 URL: http://flashrom.org/trac/flashrom/changeset/1811 Log: atavia: Fix a few problems overlooked/introduced while rebasing. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/Makefile trunk/atavia.c trunk/flashrom.8.tmpl Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sun Jun 1 15:22:35 2014 (r1810) +++ trunk/Makefile Mon Jun 2 00:36:30 2014 (r1811) @@ -325,11 +325,6 @@ else override CONFIG_ATAHPT = no endif -ifeq ($(CONFIG_ATAVIA), yes) -UNSUPPORTED_FEATURES += CONFIG_ATAVIA=yes -else -override CONFIG_ATAVIA = no -endif ifeq ($(CONFIG_SATAMV), yes) UNSUPPORTED_FEATURES += CONFIG_SATAMV=yes else Modified: trunk/atavia.c ============================================================================== --- trunk/atavia.c Sun Jun 1 15:22:35 2014 (r1810) +++ trunk/atavia.c Mon Jun 2 00:36:30 2014 (r1811) @@ -72,7 +72,7 @@ }; static void *atavia_offset = NULL; -struct pci_dev *dev = NULL; +static struct pci_dev *dev = NULL; static void atavia_prettyprint_access(uint8_t access) { @@ -118,7 +118,7 @@ return ready; } -void *atavia_map(const char *descr, unsigned long phys_addr, size_t len) +void *atavia_map(const char *descr, uintptr_t phys_addr, size_t len) { return (atavia_offset != 0) ? atavia_offset : (void *)phys_addr; } @@ -146,7 +146,6 @@ if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case of errors. */ dev = pcidev_init(ata_via, PCI_ROM_ADDRESS); /* Acutally no BAR setup needed at all. */ if (!dev) return 1; @@ -172,7 +171,7 @@ static void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, const chipaddr addr) { - msg_pspew("%s: 0x%02x to 0x%08lx.\n", __func__, val, addr); + msg_pspew("%s: 0x%02x to 0x%*" PRIxPTR ".\n", __func__, val, PRIxPTR_WIDTH, addr); pci_write_long(dev, BROM_ADDR, (addr & ~3)); pci_write_long(dev, BROM_DATA, val << BYTE_OFFSET(addr)); pci_write_byte(dev, BROM_ACCESS, BROM_TRIGGER | BROM_WRITE | ENABLE_BYTE(addr)); @@ -192,6 +191,6 @@ } uint8_t val = (pci_read_long(dev, BROM_DATA) >> BYTE_OFFSET(addr)) & 0xff; - msg_pspew("%s: 0x%02x from 0x%08lx.\n", __func__, val, addr); + msg_pspew("%s: 0x%02x from 0x%*" PRIxPTR ".\n", __func__, val, PRIxPTR_WIDTH, addr); return val; } Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Sun Jun 1 15:22:35 2014 (r1810) +++ trunk/flashrom.8.tmpl Mon Jun 2 00:36:30 2014 (r1811) @@ -192,7 +192,7 @@ .sp .BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)" .sp -.BR "* atavia" " (for flash ROMs on VIA VT6421A ATA controllers)" +.BR "* atavia" " (for flash ROMs on VIA VT6421A SATA controllers)" .sp .BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family \ based USB SPI programmer), including the DLP Design DLP-USB1232H, \

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PMC25LV010E
by The Raven 01 Jun '14

01 Jun '14

Hello, i have here an "PMC25LV010E" which is not recognized by flashrom. I am no sure whats the difference between "PMC25LV010" and "E". The log is attached, maybe it's only another ID? And i have an "Pm25LV010" here which is recognized as "Pm25LV010A". Maybe is the Description vice verse? If you need more logs or something else, let me know.

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Re: [flashrom] [Patch] Add support for Atmel AT25DL161
by Stefan Tauner 01 Jun '14

01 Jun '14

On Mon, 17 Mar 2014 14:39:14 +0800 Allen Yan <lexkde(a)gmail.com> wrote: > This patch adds support for Atmel AT25DL161, 2Mbytes SPI flash which look > like the low voltage version of Atmel AT25DQ161. It has no pre test for now. Hello Allen, thanks for your patch! Please note that before we can include your patch you need to sign the Developer's Certificate of Origin by stating so in the patch/email. We can not include your patch as is! Please read http://flashrom.org/Development_Guidelines#Sign-off_Procedure for details, thanks. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 1

[commit] r1810 - trunk
by repository service 01 Jun '14

01 Jun '14

Author: stefanct Date: Sun Jun 1 15:22:35 2014 New Revision: 1810 URL: http://flashrom.org/trac/flashrom/changeset/1810 Log: Add support for Atmel (now Adesto) AT25DL081 and AT25DL161. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Jun 1 12:26:23 2014 (r1809) +++ trunk/flashchips.c Sun Jun 1 15:22:35 2014 (r1810) @@ -1709,6 +1709,84 @@ { .vendor = "Atmel", + .name = "AT25DL081", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25DF081, + .total_size = 1024, + .page_size = 256, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at2x_global_unprotect_sec, + .write = spi_chip_write_256, /* Dual I/O (0xA2) supported */ + .read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */ + .voltage = {1650, 1950}, + }, + + { + .vendor = "Atmel", + .name = "AT25DL161", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25DL161, + .total_size = 2048, + .page_size = 256, + /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at2x_global_unprotect_sec, + .write = spi_chip_write_256, /* Dual I/O (0xA2) supported */ + .read = spi_chip_read, /* Fast read (0x0B), dual I/O (0x3B) supported */ + .voltage = {1650, 1950}, + }, + + { + .vendor = "Atmel", .name = "AT25DQ161", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun Jun 1 12:26:23 2014 (r1809) +++ trunk/flashchips.h Sun Jun 1 15:22:35 2014 (r1810) @@ -129,7 +129,7 @@ #define AMIC_A29L040 0x92 #define AMIC_A49LF040A 0x9d -#define ATMEL_ID 0x1F /* Atmel */ +#define ATMEL_ID 0x1F /* Atmel (now used by Adesto) */ #define ATMEL_AT25DF021 0x4300 #define ATMEL_AT25DF041A 0x4401 #define ATMEL_AT25DF081 0x4502 /* EDI 0x00. AT25DL081 has same ID + EDI 0x0100 */

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Re: [flashrom] [PATCH] Add VIA VT6421A LPC programmer driver.
by Stefan Tauner 01 Jun '14

01 Jun '14

I have finally committed the latest version of this patch in r1809, marking the device support as configuration-dependent. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1809 - trunk
by repository service 01 Jun '14

01 Jun '14

Author: stefanct Date: Sun Jun 1 12:26:23 2014 New Revision: 1809 URL: http://flashrom.org/trac/flashrom/changeset/1809 Log: Add VIA VT6421A LPC programmer driver. Due to the mysterious address handling of this chip the user can specify a base address with the offset parameter, e.g.: flashrom -p atavia:offset=0xFFF00000 Thanks to Idwer Vollering for his iterative testing of this code, as well as to Martijn Bastiaan who did the last tests before merging. Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Added: trunk/atavia.c (contents, props changed) Modified: trunk/Makefile trunk/flashrom.8.tmpl trunk/flashrom.c trunk/programmer.h Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sun Jun 1 04:21:02 2014 (r1808) +++ trunk/Makefile Sun Jun 1 12:26:23 2014 (r1809) @@ -192,6 +192,11 @@ else override CONFIG_ATAHPT = no endif +ifeq ($(CONFIG_ATAVIA), yes) +UNSUPPORTED_FEATURES += CONFIG_ATAVIA=yes +else +override CONFIG_ATAVIA = no +endif ifeq ($(CONFIG_DRKAISER), yes) UNSUPPORTED_FEATURES += CONFIG_DRKAISER=yes else @@ -320,6 +325,11 @@ else override CONFIG_ATAHPT = no endif +ifeq ($(CONFIG_ATAVIA), yes) +UNSUPPORTED_FEATURES += CONFIG_ATAVIA=yes +else +override CONFIG_ATAVIA = no +endif ifeq ($(CONFIG_SATAMV), yes) UNSUPPORTED_FEATURES += CONFIG_SATAMV=yes else @@ -384,6 +394,9 @@ # IMPORTANT: This code is not yet working! CONFIG_ATAHPT ?= no +# VIA VT6421A LPC memory support +CONFIG_ATAVIA ?= yes + # Always enable FT2232 SPI dongles for now. CONFIG_FT2232_SPI ?= yes @@ -535,6 +548,12 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_ATAVIA), yes) +FEATURE_CFLAGS += -D'CONFIG_ATAVIA=1' +PROGRAMMER_OBJS += atavia.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_FT2232_SPI), yes) # This is a totally ugly hack. FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'CONFIG_FT2232_SPI=1'") Added: trunk/atavia.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/atavia.c Sun Jun 1 12:26:23 2014 (r1809) @@ -0,0 +1,197 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2011 Jonathan Kollasch <jakllsch(a)kollasch.net> + * Copyright (C) 2012-2013 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include <string.h> +#include "flash.h" +#include "programmer.h" +#include "hwaccess.h" + +#define PCI_VENDOR_ID_VIA 0x1106 + +#define VIA_MAX_RETRIES 300 + +#define BROM_ADDR 0x60 + +#define BROM_DATA 0x64 + +#define BROM_ACCESS 0x68 +#define BROM_TRIGGER 0x80 +#define BROM_WRITE 0x40 +#define BROM_SIZE_MASK 0x30 +#define BROM_SIZE_64K 0x00 +#define BROM_SIZE_32K 0x10 +#define BROM_SIZE_16K 0x20 +#define BROM_SIZE_0K 0x30 +#define BROM_BYTE_ENABLE_MASK 0x0f + +#define BROM_STATUS 0x69 +#define BROM_ERROR_STATUS 0x80 + +/* Select the byte we want to access. This is done by clearing the bit corresponding to the byte we want to + * access, leaving the others set (yes, really). */ +#define ENABLE_BYTE(address) ((~(1 << ((address) & 3))) & BROM_BYTE_ENABLE_MASK) +#define BYTE_OFFSET(address) (((addr) & 3) * 8) + +const struct dev_entry ata_via[] = { + {PCI_VENDOR_ID_VIA, 0x3249, DEP, "VIA", "VT6421A"}, + + {}, +}; + +static void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); +static uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr); +static const struct par_programmer lpc_programmer_atavia = { + .chip_readb = atavia_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = atavia_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +static void *atavia_offset = NULL; +struct pci_dev *dev = NULL; + +static void atavia_prettyprint_access(uint8_t access) +{ + uint8_t bmask = access & BROM_BYTE_ENABLE_MASK; + uint8_t size = access & BROM_SIZE_MASK; + + msg_pspew("Accessing byte(s):%s%s%s%s\n", + ((bmask & (1<<3)) == 0) ? " 3" : "", + ((bmask & (1<<2)) == 0) ? " 2" : "", + ((bmask & (1<<1)) == 0) ? " 1" : "", + ((bmask & (1<<0)) == 0) ? " 0" : ""); + if (size == BROM_SIZE_0K) { + msg_pspew("No ROM device found.\n"); + } else + msg_pspew("ROM device with %s kB attached.\n", + (size == BROM_SIZE_64K) ? ">=64" : + (size == BROM_SIZE_32K) ? "32" : "16"); + msg_pspew("Access is a %s.\n", (access & BROM_WRITE) ? "write" : "read"); + msg_pspew("Device is %s.\n", (access & BROM_TRIGGER) ? "busy" : "ready"); +} + +static bool atavia_ready(struct pci_dev *pcidev_dev) +{ + int try; + uint8_t access, status; + bool ready = false; + + for (try = 0; try < VIA_MAX_RETRIES; try++) { + access = pci_read_byte(pcidev_dev, BROM_ACCESS); + status = pci_read_byte(pcidev_dev, BROM_STATUS); + if (((access & BROM_TRIGGER) == 0) && (status & BROM_ERROR_STATUS) == 0) { + ready = true; + break; + } else { + programmer_delay(1); + continue; + } + } + + msg_pdbg2("\n%s: %s after %d tries (access=0x%02x, status=0x%02x)\n", + __func__, ready ? "suceeded" : "failed", try, access, status); + atavia_prettyprint_access(access); + return ready; +} + +void *atavia_map(const char *descr, unsigned long phys_addr, size_t len) +{ + return (atavia_offset != 0) ? atavia_offset : (void *)phys_addr; +} + +int atavia_init(void) +{ + char *arg = extract_programmer_param("offset"); + if (arg) { + if (strlen(arg) == 0) { + msg_perr("Missing argument for offset.\n"); + free(arg); + return ERROR_FATAL; + } + char *endptr; + atavia_offset = (void *)strtoul(arg, &endptr, 0); + if (*endptr) { + msg_perr("Error: Invalid offset specified: \"%s\".\n", arg); + free(arg); + return ERROR_FATAL; + } + msg_pinfo("Mapping addresses to base %p.\n", atavia_offset); + } + free(arg); + + if (rget_io_perms()) + return 1; + + /* No need to check for errors, pcidev_init() will not return in case of errors. */ + dev = pcidev_init(ata_via, PCI_ROM_ADDRESS); /* Acutally no BAR setup needed at all. */ + if (!dev) + return 1; + + /* Test if a flash chip is attached. */ + pci_write_long(dev, PCI_ROM_ADDRESS, (uint32_t)PCI_ROM_ADDRESS_MASK); + programmer_delay(90); + uint32_t base = pci_read_long(dev, PCI_ROM_ADDRESS); + msg_pdbg2("BROM base=0x%08x\n", base); + if ((base & PCI_ROM_ADDRESS_MASK) == 0) { + msg_pwarn("Controller thinks there is no ROM attached.\n"); + } + + if (!atavia_ready(dev)) { + msg_perr("Controller not ready.\n"); + return 1; + } + + register_par_programmer(&lpc_programmer_atavia, BUS_LPC); + + return 0; +} + +static void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, const chipaddr addr) +{ + msg_pspew("%s: 0x%02x to 0x%08lx.\n", __func__, val, addr); + pci_write_long(dev, BROM_ADDR, (addr & ~3)); + pci_write_long(dev, BROM_DATA, val << BYTE_OFFSET(addr)); + pci_write_byte(dev, BROM_ACCESS, BROM_TRIGGER | BROM_WRITE | ENABLE_BYTE(addr)); + + if (!atavia_ready(dev)) { + msg_perr("not ready after write\n"); + } +} + +static uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr) +{ + pci_write_long(dev, BROM_ADDR, (addr & ~3)); + pci_write_byte(dev, BROM_ACCESS, BROM_TRIGGER | ENABLE_BYTE(addr)); + + if (!atavia_ready(dev)) { + msg_perr("not ready after read\n"); + } + + uint8_t val = (pci_read_long(dev, BROM_DATA) >> BYTE_OFFSET(addr)) & 0xff; + msg_pspew("%s: 0x%02x from 0x%08lx.\n", __func__, val, addr); + return val; +} Modified: trunk/flashrom.8.tmpl ============================================================================== --- trunk/flashrom.8.tmpl Sun Jun 1 04:21:02 2014 (r1808) +++ trunk/flashrom.8.tmpl Sun Jun 1 12:26:23 2014 (r1809) @@ -192,6 +192,8 @@ .sp .BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)" .sp +.BR "* atavia" " (for flash ROMs on VIA VT6421A ATA controllers)" +.sp .BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family \ based USB SPI programmer), including the DLP Design DLP-USB1232H, \ FTDI FT2232H Mini-Module, FTDI FT4232H Mini-Module, openbiosprog-spi, Amontec \ @@ -587,9 +589,9 @@ .B content is an 8-bit hexadecimal value. .SS -.BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel\ -" , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\ -" , " satamv" ", and " atahpt " programmers +.BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel"\ +, " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii"\ +, " satamv" , " atahpt" ", and " atavia " programmers These programmers have an option to specify the PCI address of the card your want to use, which must be specified if more than one card supported by the selected programmer is installed in your system. The syntax is @@ -609,6 +611,18 @@ Example: .B "flashrom \-p nic3com:pci=05:04.0" .SS +.BR "atavia " programmer +Due to the mysterious address handling of the VIA VT6421A controller the user can specify an offset with the +.sp +.B " flashrom \-p atavia:offset=addr" +.sp +syntax where +.B addr +will be interpreted as usual (leading 0x (0) for hexadecimal (octal) values, or else decimal). +For more information please see +.nh +.B http://flashrom.org/VT6421A +.SS .BR "ft2232_spi " programmer An optional parameter specifies the controller type and channel/interface/port it should support. For that you have to use the @@ -891,6 +905,9 @@ needs raw memory access, PCI configuration space access, raw I/O port access (x86) and MSR access (x86). .sp +.B atavia +needs PCI configuration space access. +.sp .BR nic3com ", " nicrealtek " and " nicnatsemi " need PCI configuration space read access and raw I/O port access. .sp @@ -923,7 +940,7 @@ needs no access permissions at all. .sp .BR internal ", " nic3com ", " nicrealtek ", " nicnatsemi ", " -.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv " and " atahpt +.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv ", " atahpt" and " atavia have to be run as superuser/root, and need additional raw access permission. .sp .BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi " and " ft2232_spi Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sun Jun 1 04:21:02 2014 (r1808) +++ trunk/flashrom.c Sun Jun 1 12:26:23 2014 (r1809) @@ -172,6 +172,18 @@ }, #endif +#if CONFIG_ATAVIA == 1 + { + .name = "atavia", + .type = PCI, + .devs.dev = ata_via, + .init = atavia_init, + .map_flash_region = atavia_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_FT2232_SPI == 1 { .name = "ft2232_spi", Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sun Jun 1 04:21:02 2014 (r1808) +++ trunk/programmer.h Sun Jun 1 12:26:23 2014 (r1809) @@ -54,6 +54,9 @@ #if CONFIG_ATAHPT == 1 PROGRAMMER_ATAHPT, #endif +#if CONFIG_ATAVIA == 1 + PROGRAMMER_ATAVIA, +#endif #if CONFIG_FT2232_SPI == 1 PROGRAMMER_FT2232_SPI, #endif @@ -434,6 +437,13 @@ extern const struct dev_entry ata_hpt[]; #endif +/* atavia.c */ +#if CONFIG_ATAVIA == 1 +int atavia_init(void); +void *atavia_map(const char *descr, uintptr_t phys_addr, size_t len); +extern const struct dev_entry ata_via[]; +#endif + /* ft2232_spi.c */ #if CONFIG_FT2232_SPI == 1 int ft2232_spi_init(void);

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ft2232_spi:type=jtagkey
by Alfin Cahya 31 May '14

31 May '14

Found Eon flash chip "EN25QH128" (16384 kB, SPI). This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -VE, -Vw), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:S, 0x001000-0x001fff:S, 0x002000-0x002fff:S, 0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S, 0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:EFAILED at 0x00008000! Expected=0xff, Found=0x66, failed byte count from 0x00008000-0x00008fff: 0xf6d ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. Trying erase function 1... 0x000000-0x00ffff:EFAILED at 0x00000000! Expected=0xff, Found=0xb5, failed byte count from 0x00000000-0x0000ffff: 0xfbbd ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. Trying erase function 2... 0x000000-0xffffff:EFAILED at 0x00000000! Expected=0xff, Found=0xb5, failed byte count from 0x00000000-0x00ffffff: 0x21d231 ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. Trying erase function 3... 0x000000-0xffffff:EFAILED at 0x00000000! Expected=0xff, Found=0xb5, failed byte count from 0x00000000-0x00ffffff: 0x2232bf ERASE FAILED! Looking for another erase function. No usable erase functions left. FAILED! Uh oh. Erase/write failed. Checking if anything has changed. Reading current flash chip contents... done. Apparently at least some data has changed. Your flash chip is in an unknown state.

1 0

Re: [flashrom] [PATCH] Combine block_erase*_en29lv640b and block_erase*_m29f400bt respectively.
by Carl-Daniel Hailfinger 31 May '14

31 May '14

Am 29.05.2014 23:44 schrieb Stefan Tauner: > This patch combines two identical block and chip erase functions respectively: > - Merge block_erase_m29f400bt and block_erase_en29lv640b into > erase_block_shifted_jedec. > - Merge block_erase_chip_m29f400bt and block_erase_chip_en29lv640b into > erase_chip_block_shifted_jedec. > > Leave their implementations in en29lv640b.c for now. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Excellent, a cleanup of old parallel 16bit-native chips. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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flashrom June 2014