flashrom December 2014

flashrom@flashrom.org

27 participants
72 discussions

FAILED: wolf
by Nick Long 30 Dec '14

30 Dec '14

Erasing and writing flash chip... spi_block_erase_20 failed during command execution at address 0x0 Verifiying flash... VERIFY FAILED at 0x00000062! Expected 0xff, Read=0x0b, failed byte count from 0x00000000-0x007fffff: 0x4 Your flash chip is in an unknown state.

1 0

Re: [flashrom] PCI BAR access thru sysfs
by Stefan Tauner 30 Dec '14

30 Dec '14

On Wed, 10 Dec 2014 15:03:39 -0800 Ed Swierk <eswierk(a)skyportsystems.com> wrote: > Various kernel options are known to interfere with flashrom's attempts to > access physical memory through /dev/mem. Some (like CONFIG_STRICT_DEVMEM) > are important security measures that cannot be disabled without recompiling > the kernel, and are likely to be used more widely over time. > > However, complete access to physical memory is unnecessary for some use > cases. For example, the SPI interface on an Intel NIC can be accessed by > mmapping a BAR resource file in the PCI device directory in sysfs. Has > anyone considered implementing such an alternative access method for PCI > devices in flashrom? Hello Ed, The issue is on our radar but we have not made any plans how to approach it. RFCs, PoCs and Patches very welcome ;) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

Re: [flashrom] Gigabyte GA-J1900N-D3V-1.x data
by Stefan Tauner 30 Dec '14

30 Dec '14

On Tue, 23 Dec 2014 00:55:47 -0800 Matt Taggart <matt(a)lackof.org> wrote: > Replying to just you to keep noise off the list. Please don't. The topic is quite generic and posting it on the list may save me some time in the future and discussing such stuff is exactly what the mailing list is for. > Stefan Tauner writes: > > > That's not unusual for various reasons (e.g. the firmware uses the > > flash as scratchpad). The rom.bin on your website looks sane to me and > > since I don't expect any problems regarding reading the chip with > > flashrom, I will mark probing and reading as tested, thanks. > > I would like to write test this board and I wanted to run my idea for a > testing procedure by you. > > I managed to find an older vendor BIOS version and can use the vendor DOS > flash tools to switch between them. I have used flashrom to read an image > of each. So how about trying this: > > 1) run 'flashrom -p internal -r rom1.bin' to get a dump of the current > vendor version > 2) run 'flashrom -p internal -w rom1.bin' to write the same version back, > and hopefully get back a report that they are identical > 3) run 'flashrom -p internal -w rom2.bin` to write the vendor's other > version, and hopefully the write succeeds > 4) reboot and confirm running the rom2.bin version > 5) run 'flashrom -p internal -w rom1.bin' to put the original back > 6) reboot and confirm running the rom1.bin version > 7) if anything went wrong, buy an external clip and use it to write one of > the images back. Since we think the reading is working, should the images I > have be the same as what I'd want to write with an external? (or would I > need an image originally read with the external?) Usually boards either allow to access the chip or they don't. So in theory one could simply do - flashrom -r backup - flashrom -E - flashrom -w backup Practically erase + write is slightly more risky than flashing another good image directly because flashrom writes in the smallest block size possible and that sometimes saves one from a brick. If you plan to hack on coreboot you should get a programmer anyway (I recommend a BBB because it is very versatile for coreboot development (SPI programmer (even easily convertible to 1.8V), USB debug). Images read with flashrom from a chip should always be identical no matter which programmer is used. The only reasons for differences are bugs and firmware that writes to the flash while booting (introducing discrepancies between the flash contents while powered on and off, which are usually benign... because the firmware must be prepared for crashing OSes ;) Hope that answers your questions. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

FAILED: HM77 (Macbook Pro retina)
by Trammell Hudson 29 Dec '14

29 Dec '14

No changes were written to the executable portions of the ROM. The data regions at 0x2000-0x2FFF, 0x6400-0x67FF, 0xC000-0x14FFF, 0x1C000, 0x3C000, 0x40000-0x4BFFF were overwritten correctly. My firmware image differed only in those regions below 0x190000, so it might have successfully written to the entire 0x0-0x4BFFF (or even higher) space. The ROM image that I was writing had changes in the executable firmware volume starting at 0x190000. These were not written to the ROM. I have successfully rebooted and can reflash via external SPI if necessary for further tests. Output log from flashrom -V during the write process: flashrom v0.9.6.1-r1564 on Darwin 12.0.0 (x86_64) flashrom was built with libpci 3.1.7, GCC 4.2.1 (Based on Apple Inc. build 5658) (LLVM build 2336.1.00), little endian Command line (8 args): ./flashrom -p internal -V -f -o /Volumes/NO NAME/write.log -w /Volumes/NO NAME/mbp101.rom Calibrating delay loop... OS timer resolution is 1 usecs, 1597M loops per second, 10 myus = 9 us, 100 myus = 127 us, 1000 myus = 1003 us, 10000 myus = 9928 us, 4 myus = 4 us, OK. Initializing internal programmer Error accessing low megabyte, 0x100000 bytes at 0x00000000 Failed getting access to coreboot low tables. dmidecode execution unsuccessful - continuing without DMI info Found chipset "Intel HM77" with PCI ID 8086:1e57. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0xc21: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 WARNING: SPI Configuration Lockdown activated. Reading OPCODES... done OP Type Pre-OP op[0]: 0x9f, read w/o addr, none op[1]: 0x02, write w/ addr, none op[2]: 0x03, read w/ addr, none op[3]: 0x01, write w/o addr, none op[4]: 0x05, read w/o addr, none op[5]: 0x20, write w/ addr, none op[6]: 0xd8, write w/ addr, none op[7]: 0xff, read w/o addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x06 0x06: 0x0004 (HSFC) HSFC: FGO=0, FCYCLE=2, FDBC=0, SME=0 0x08: 0x00000000 (FADDR) 0x50: 0x0000ffff (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x07ff0190 FREG1: BIOS region (0x00190000-0x007fffff) is read-write. 0x5C: 0x018f0001 FREG2: Management Engine region (0x00001000-0x0018ffff) is read-write. 0x60: 0x00001fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00001fff FREG4: Platform Data region is unused. 0x74: 0x866f0190 PR0: WARNING: 0x00190000-0x0066ffff is read-only. 0x78: 0x9fff0692 PR1: WARNING: 0x00692000-0x01ffffff is read-only. 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on http://flashrom.org/Supported_hardware#Supported_mainboards yet. Writes have been disabled. You can enforce write support with the ich_spi_force programmer option, but it will most likely harm your hardware! If you force flashrom you will get no support if something breaks. 0x90: 0xc4 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0xfc4200 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=2, SME=0, SCF=4 0x94: 0x0606 (PREOP) 0x96: 0x3c6c (OPTYPE) 0x98: 0x0103029f (OPMENU) 0x9C: 0xffd82005 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00800000 (LVSCC) LVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x0, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x02040003 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 3 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x64900024 FLILL 0x00000000 --- Details --- Component 1 density: 8 MB Component 2 is not used. Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 50 MHz Write and Erase Clock Freq.: 50 MHz Fast Read is supported. Fast Read Clock Frequency: 50 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x07ff0190 FLREG2 0x018f0001 FLREG3 0x00001fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00190000 - 0x007fffff Region 2 (ME ) 0x00001000 - 0x0018ffff Region 3 (GbE ) is unused. === Master Section === FLMSTR1 0xffff0000 FLMSTR2 0xffff0000 FLMSTR3 0xffff0118 --- Details --- Descr. BIOS ME GbE Platf. BIOS rw rw rw rw rw ME rw rw rw rw rw GbE rw rw rw rw rw SPI Read Configuration: prefetching disabled, caching enabled, OK. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found Macronix flash chip "MX25L6405" (8192 kB, SPI) at physical address 0xff800000. Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute. Probing for SST SST25LF080A, 1024 kB: Invalid OPCODE 0xab, will not execute. Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Unknown SFDP-capable chip, 0 kB: Invalid OPCODE 0x5a, will not execute. Receiving SFDP signature failed. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x70, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x70, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Found Macronix flash chip "MX25L6405" (8192 kB, SPI). Write/erase is not working yet on your programmer in its current configuration. Continuing anyway. Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x00ffff:EERASE FAILED at 0x00001000! Expected=0xff, Read=0x20, failed byte count from 0x00000000-0x0000ffff: 0xada4 ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. Trying erase function 1... 0x000000-0x00ffff:EW, 0x010000-0x01ffff:EW, 0x020000-0x02ffff:S, 0x030000-0x03ffff:EW, 0x040000-0x04ffff:EW, 0x050000-0x05ffff:S, 0x060000-0x06ffff:S, 0x070000-0x07ffff:S, 0x080000-0x08ffff:S, 0x090000-0x09ffff:S, 0x0a0000-0x0affff:S, 0x0b0000-0x0bffff:S, 0x0c0000-0x0cffff:S, 0x0d0000-0x0dffff:S, 0x0e0000-0x0effff:S, 0x0f0000-0x0fffff:S, 0x100000-0x10ffff:S, 0x110000-0x11ffff:S, 0x120000-0x12ffff:S, 0x130000-0x13ffff:S, 0x140000-0x14ffff:S, 0x150000-0x15ffff:S, 0x160000-0x16ffff:S, 0x170000-0x17ffff:S, 0x180000-0x18ffff:S, 0x190000-0x19ffff:ETransaction error! SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 SSFC: SCGO=0, ACS=1, SPOP=0, COP=6, DBC=0, SME=0, SCF=4 Running OPCODE 0xd8 failed at address 0x190000 (payload length was 0). spi_block_erase_d8 failed during command execution at address 0x190000 Reading current flash chip contents... done. Looking for another erase function. Trying erase function 2... 0x000000-0x7fffff:EInvalid OPCODE 0x06, will not execute. spi_chip_erase_60 failed during command execution Reading current flash chip contents... done. Looking for another erase function. Trying erase function 3... 0x000000-0x7fffff:EInvalid OPCODE 0x06, will not execute. spi_chip_erase_c7 failed during command execution Looking for another erase function. No usable erase functions left. FAILED! Uh oh. Erase/write failed. Checking if anything changed. Your flash chip is in an unknown state. Get help on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org with the subject "FAILED: <your board name>"! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! Restoring MMIO space at 0x104cb28a0 Restoring PCI config space for 00:1f:0 reg 0xdc

3 3

Re: [flashrom] Add PICkit2 as an SPI programmer
by Stefan Tauner 27 Dec '14

27 Dec '14

Hello Justin, I was about to (eventually!) commit your patch when I discovered that you have never signed-off your patches. Please read http://flashrom.org/Development_Guidelines#Sign-off_Procedure for details, thanks. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

updating BIOS for Shuttle SN21G5
by Eduardo de Juan 26 Dec '14

26 Dec '14

hi all I've tried to boot my linux Shuttle XPC from a USB stick but the option does not seem to be available so i guess it's time to update the BIOS. My box is a Shuttle XPC SN21G5. I've downloaded the flashrom program and I have a couple of doubts before I can start. 1.- do I need a .rom type file ? I've visited the Shuttle bios download page and everything there seems to be .bin files, for windows flash utilities. Do you know where I can find bios file that falshrom can use ? 2.- running flashrom in probe mode I get Found chip set "NVIDIA MCP51". This chip set is marked as untested. but I guess that means I just have to go ahead and try. BR, Eduardo

2 5

[PATCH] Fix wrong density encoding on Intel Silvermont.
by Stefan Tauner 26 Dec '14

26 Dec '14

Silvermont (Bay Trail, Rangeley, Avoton) seems to still use the old density encoding with 3 bits per chip. Documentation is unavailable (held concealed by Intel) but thanks to the efforts of Tai-Hong (Type) Wu the layout is clear now. This patch is based on his one but solves the issue differently reducing the code complexity. Signed-off-by: T.H.Wu Type <thwu(a)lunartoday.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- Hello Tai-Hong, thanks a lot for your patch! And sorry for the late reply. Now that I got some time I have looked into your patch. Your solution seems to work fine but I decided that I'd rather move the dual output supported bit to the "common" bit field struct and rename all involved structs accordingly. This gets rid of the rather unreadable double ternary branch. I will probably commit this patch before you get a chance to test it again because I want to do the 0.9.8 release soonish, but I'd appreciate a later test very much too if you want to do that. ich_descriptors.c | 38 +++++++++++++++++++------------------- ich_descriptors.h | 18 +++++++----------- 2 files changed, 26 insertions(+), 30 deletions(-) diff --git a/ich_descriptors.c b/ich_descriptors.c index 1966f66..90f70ee 100644 --- a/ich_descriptors.c +++ b/ich_descriptors.c @@ -127,27 +127,27 @@ static const char *pprint_density(enum ich_chipset cs, const struct ich_descript case CHIPSET_ICH10: case CHIPSET_5_SERIES_IBEX_PEAK: case CHIPSET_6_SERIES_COUGAR_POINT: - case CHIPSET_7_SERIES_PANTHER_POINT: { + case CHIPSET_7_SERIES_PANTHER_POINT: + case CHIPSET_BAYTRAIL: { uint8_t size_enc; if (idx == 0) { - size_enc = desc->component.old.comp1_density; + size_enc = desc->component.dens_old.comp1_density; } else { - size_enc = desc->component.old.comp2_density; + size_enc = desc->component.dens_old.comp2_density; } if (size_enc > 5) return "reserved"; return size_str[size_enc]; } case CHIPSET_8_SERIES_LYNX_POINT: - case CHIPSET_BAYTRAIL: case CHIPSET_8_SERIES_LYNX_POINT_LP: case CHIPSET_8_SERIES_WELLSBURG: case CHIPSET_9_SERIES_WILDCAT_POINT: { uint8_t size_enc; if (idx == 0) { - size_enc = desc->component.new.comp1_density; + size_enc = desc->component.dens_new.comp1_density; } else { - size_enc = desc->component.new.comp2_density; + size_enc = desc->component.dens_new.comp2_density; } if (size_enc > 7) return "reserved"; @@ -207,16 +207,16 @@ void prettyprint_ich_descriptor_component(enum ich_chipset cs, const struct ich_ msg_pdbg2("Component 2 density: %s\n", pprint_density(cs, desc, 1)); else msg_pdbg2("Component 2 is not used.\n"); - msg_pdbg2("Read Clock Frequency: %s\n", pprint_freq(cs, desc->component.common.freq_read)); - msg_pdbg2("Read ID and Status Clock Freq.: %s\n", pprint_freq(cs, desc->component.common.freq_read_id)); - msg_pdbg2("Write and Erase Clock Freq.: %s\n", pprint_freq(cs, desc->component.common.freq_write)); - msg_pdbg2("Fast Read is %ssupported.\n", desc->component.common.fastread ? "" : "not "); - if (desc->component.common.fastread) + msg_pdbg2("Read Clock Frequency: %s\n", pprint_freq(cs, desc->component.modes.freq_read)); + msg_pdbg2("Read ID and Status Clock Freq.: %s\n", pprint_freq(cs, desc->component.modes.freq_read_id)); + msg_pdbg2("Write and Erase Clock Freq.: %s\n", pprint_freq(cs, desc->component.modes.freq_write)); + msg_pdbg2("Fast Read is %ssupported.\n", desc->component.modes.fastread ? "" : "not "); + if (desc->component.modes.fastread) msg_pdbg2("Fast Read Clock Frequency: %s\n", - pprint_freq(cs, desc->component.common.freq_fastread)); + pprint_freq(cs, desc->component.modes.freq_fastread)); if (cs > CHIPSET_6_SERIES_COUGAR_POINT) msg_pdbg2("Dual Output Fast Read Support: %sabled\n", - desc->component.new.dual_output ? "dis" : "en"); + desc->component.modes.dual_output ? "dis" : "en"); if (desc->component.FLILL == 0) msg_pdbg2("No forbidden opcodes.\n"); else { @@ -816,22 +816,22 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors case CHIPSET_5_SERIES_IBEX_PEAK: case CHIPSET_6_SERIES_COUGAR_POINT: case CHIPSET_7_SERIES_PANTHER_POINT: + case CHIPSET_BAYTRAIL: if (idx == 0) { - size_enc = desc->component.old.comp1_density; + size_enc = desc->component.dens_old.comp1_density; } else { - size_enc = desc->component.old.comp2_density; + size_enc = desc->component.dens_old.comp2_density; } size_max = 5; break; case CHIPSET_8_SERIES_LYNX_POINT: - case CHIPSET_BAYTRAIL: case CHIPSET_8_SERIES_LYNX_POINT_LP: case CHIPSET_8_SERIES_WELLSBURG: case CHIPSET_9_SERIES_WILDCAT_POINT: if (idx == 0) { - size_enc = desc->component.new.comp1_density; + size_enc = desc->component.dens_new.comp1_density; } else { - size_enc = desc->component.new.comp2_density; + size_enc = desc->component.dens_new.comp2_density; } size_max = 7; break; @@ -842,7 +842,7 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors } if (size_enc > size_max) { - msg_perr("Density of ICH SPI component with index %d is invalid." + msg_perr("Density of ICH SPI component with index %d is invalid.\n" "Encoded density is 0x%x while maximum allowed is 0x%x.\n", idx, size_enc, size_max); return -1; diff --git a/ich_descriptors.h b/ich_descriptors.h index c41f9d9..2c21598 100644 --- a/ich_descriptors.h +++ b/ich_descriptors.h @@ -123,23 +123,19 @@ struct ich_desc_component { freq_fastread :3, freq_write :3, freq_read_id :3, - :2; - } common; + dual_output :1, /* new since Cougar Point/6 */ + :1; + } modes; struct { uint32_t comp1_density :3, comp2_density :3, - :11, - :13, - :2; - } old; + :26; + } dens_old; struct { uint32_t comp1_density :4, /* new since Lynx Point/8 */ comp2_density :4, - :9, - :13, - dual_output :1, /* new since Cougar Point/6 */ - :1; - } new; + :24; + } dens_new; }; union { /* 0x04 */ uint32_t FLILL; /* Flash Invalid Instructions Register */ -- Kind regards, Stefan Tauner

1 0

Fwd: Intel 28F001BN/BX-T erase/write operation verified on 3C905B-TXNM
by Lu Xie 25 Dec '14

25 Dec '14

I am forwarding this email since I haven't heard any confirmation after weeks. Happy holidays! Lu ---------- Forwarded message ---------- From: Lu Xie <firexl(a)gmail.com> Date: Fri, Dec 12, 2014 at 4:42 PM Subject: Intel 28F001BN/BX-T erase/write operation verified on 3C905B-TXNM To: flashrom(a)flashrom.org Hi, I tried programming Intel 28F001BN/BX-T on 3C905B-TXNM but it failed at erase/write. I checked that chip's datasheet and it says PIN 1 and 30 must be pulled to 12V to accept erase/write operation, but the card can only offer 5V at PIN 1 and NC at PIN 30. So I wired 12V to the two pins and then flashrom erased/wrote the chip successfully. Please check the attached output files for the two attempts. Lu

1 0

Unable to access a supported mobo: P5GC-MX/1333
by belg4mit＠pthbb.org 24 Dec '14

24 Dec '14

Hello, I have a P5GC-MX/133 (Rev 305g). This model is listed as supported on the website*, After building trunk from source, I invoked flashrom as shown, but the tool indicates the board is not supported. Am I missing something? # flashrom --programmer internal:mainboard=ASUS:P5GC-MX/1333 flashrom v0.9.7-r1850 on Linux 2.6.32-65-generic (i686) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "Intel ICH7/ICH7R". Enabling flash write... OK. No suitable board enable found for vendor="ASUS", model="P5GC-MX/1333". Aborting to be safe. Error: Programmer initialization failed. Thanks! -Jerrad * Apparently per http://flashrom.org/pipermail/flashrom/2010-June/003501.html

3 7

Re: [flashrom] Flashrom with FTDI support
by Stefan Tauner 24 Dec '14

24 Dec '14

On Mon, 22 Dec 2014 08:08:40 +0000 Ohad Benjamin <ohad(a)panpwr.com> wrote: > This is the output I get after compiling and trying to run flashrom.exe with the programmer connected: > > flashrom v0.9.7-r1711 on Windows 6.1 (x86) > flashrom is free software, get the source code at http://www.flashrom.org > > Calibrating delay loop... OK. > Unable to open FTDI device: -6 (ftdi_usb_reset failed). > Error: Programmer initialization failed. > > This is what I get when the programmer is disconnected: > > $ flashrom.exe -p ft2232_spi:type=232H > flashrom v0.9.7-r1711 on Windows 6.1 (x86) > flashrom is free software, get the source code at http://www.flashrom.org > > Calibrating delay loop... OK. > Unable to open FTDI device: -3 (device not found). > Error: Programmer initialization failed. > That might be some incompatibility between the ftdi and usb drivers and/or Windows. I can't really help with that. I recommend testing the same hardware setup with Linux or another Unix. Another approach would be to try to use libftdi-1.0... there is a number of bit-rotting patches dealing with this, see http://patchwork.coreboot.org/patch/3904/ etc. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

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flashrom December 2014