On Sun, 7 Dec 2014 11:02:35 +0100
Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote:
> This flash chip can be configured (one time) to use 64 KiB or 256 KiB sectors.
> Additionally, in the 64 KiB mode it supports 16 4 KiB sub-sectors that can be
> (one time) programmed to be on the top or bottom of the device. The sub-sectors
> can be erased with the 0x20 opcode but because this opcode does not work
> with the remaining sectors and flashrom can not cope with that the 0x20
> opcode is not supported yet.
>
> This patch adds two definitions, one for the 64 KiB and 256 KiB configuration
> respectively. The device also shares the RDID with the various S25FL128
> devices so we have to increase the maximum number of successfully probed
> chips to 8.
>
> The 64 KiB mode was tested on real hardware.
>
> Signed-off-by: Jernej Škrabec <jernej.skrabec(a)planet.si>
> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at>
I have committed this patch in r1858 because Jernej told me that he
*currently* is unable to test the patch on real hardware. Since the
modifications were minor there shouldn't be any issues though.
--
Kind regards/Mit freundlichen Grüßen, Stefan Tauner
Hello :-)
Here are the results for this chip.
Tested with Arduino (serprog).
Probing: OK
Reading: OK
Erasing: OK
Writing: OK
The writing (sign) on the Chip is:
Pm25LV512
AE1034
M23360LG
Should i test something else?
BTW: This chip was found on a "newer" nvidia graphic card (GF108 /
Gforce GT430 / 1GB Ram).
Hi everyone!
31 Jan 2015 and 1 Feb 2015:
https://fosdem.org/2015/news/2014-09-19-call-for-participation-part-two/
I would love to be there again and some of you already said they'd try
to be there, but I forgot who. Who can be there with me at the booth and
when can you be there?
A preliminary stand application has already been sent by me to somewhat
hit the deadline, but I'd like to fill it in a bit more.
Side note: If someone has an interesting topic for a lightning talk,
please submit one!
Regards,
Carl-Daniel
Hi,
attached patch adds a BUILD_EVERYTHING flag to Makefile
that sets all CONFIG_* flags to "yes" if they were "no".
This provides a comfortable way to ensure maximum code exposure
to tools like coverity[0] or clang's scan-build.
BUILD_EVERYTHING will likely fail on non-Linux/x86 systems,
but it seems that's a hard dependency to compile everything at
this time, so well...
Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de>
Regards,
Patrick
[0] https://scan.coverity.com/projects/1020
On Wed, 15 Oct 2014 18:13:54 +0800
alexlu6(a)mxic.com.tw wrote:
>
> Dear sirs,
>
> This mail comes from Macronix to add the new MX25L6495F flash chip
> support
> in the flashrom project in order to help the adoption of the chip for
> Google Chromium OS.
> Please help to review it. Thanks a lot!
Hello Alex,
I'd like to add support for this chip to vanilla flashrom as well but
could not find a public datasheet to add a few additional bits. Will
this chip and a respective datasheet be available publicly?
--
Kind regards/Mit freundlichen Grüßen, Stefan Tauner
So, you are manually flashing a Dell Chromebook and you're wondering if this error is significant?On 30 Dec 2014 21:36, Nick Long <vieuphoria(a)gmail.com> wrote:
>
> Erasing and writing flash chip... spi_block_erase_20 failed during command execution at address 0x0
> Verifiying flash... VERIFY FAILED at 0x00000062! Expected 0xff, Read=0x0b, failed byte count from 0x00000000-0x007fffff: 0x4
> Your flash chip is in an unknown state.
flashrom v0.9.7-r1711 on Linux 3.17.7-gentoo (x86_64)
flashrom is free software, get the source code at http://www.flashrom.org
flashrom was built with libpci 3.2.0, GCC 4.8.3, little endian
Command line (3 args): flashrom --programmer internal -V
Calibrating delay loop... OS timer resolution is 1 usecs, 1594M loops
per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1001 us,
10000 myus = 10005 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "Notebook "
DMI string system-product-name: "W840SU Series "
DMI string system-version: "Not Applicable "
DMI string baseboard-manufacturer: "Notebook "
DMI string baseboard-product-name: "W840SU Series "
DMI string baseboard-version: "Not Applicable "
DMI string chassis-type: "Laptop"
Laptop detected via DMI.
W836xx enter config mode worked or we were already in config mode.
W836xx leave config mode had no effect.
Active config mode, unknown reg 0x20 ID: 85.
Please send the output of "flashrom -V" to
flashrom(a)flashrom.org with W836xx: your board name: flashrom -V
as the subject to help us finish support for your Super I/O. Thanks.
Found ITE EC, ID 0x8587, Rev 0x06 on port 0x2e.
========================================================================
WARNING! You seem to be running flashrom on an unsupported laptop.
Laptops, notebooks and netbooks are difficult to support and we
recommend to use the vendor flashing utility. The embedded controller
(EC) in these machines often interacts badly with flashing.
See the manpage and http://www.flashrom.org/Laptops for details.
If flash is shared with the EC, erase is guaranteed to brick your laptop
and write may brick your laptop.
Read and probe may irritate your EC and cause fan failure, backlight
failure and sudden poweroff.
You have been warned.
========================================================================
Aborting.
Error: Programmer initialization failed.
On Sat, 13 Dec 2014 05:42:33 +0800
Lu Xie <firexl(a)gmail.com> wrote:
> Hi,
>
> I tried programming Intel 28F001BN/BX-T on 3C905B-TXNM but it failed at
> erase/write. I checked that chip's datasheet and it says PIN 1 and 30 must
> be pulled to 12V to accept erase/write operation, but the card can only
> offer 5V at PIN 1 and NC at PIN 30. So I wired 12V to the two pins and then
> flashrom erased/wrote the chip successfully. Please check the attached
> output files for the two attempts.
Hello Lu,
Thanks for report! The successful log does not correspond 100% with the
first one: the failure happens at the very beginning of the flash
address space while the successful write does skip the first blocks and
does only erase and write the last one. This can easily happen
depending on the existing data and the image provided to flashrom. Just
to make sure... can you please elaborate what happened between the two
attempts that could explain what I wrote above?
--
Kind regards/Mit freundlichen Grüßen, Stefan Tauner
