flashrom December 2012

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Logs for Asus P5B-VM
by user 31 Dec '12

31 Dec '12

Logs for Asus P5B-VM.

2 1

[PATCH] fixup! Add pci_init_common() to unify PCI init.
by Stefan Tauner 31 Dec '12

31 Dec '12

oops. forgot to save after renaming the method :) Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- pcidev.c | 4 ++-- programmer.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/pcidev.c b/pcidev.c index 7f1f243..a5a7088 100644 --- a/pcidev.c +++ b/pcidev.c @@ -162,7 +162,7 @@ static int pcidev_shutdown(void *data) return 0; } -int pcidev_init_common(void) +int pci_init_common(void) { pacc = pci_alloc(); /* Get the pci_access structure */ pci_init(pacc); /* Initialize the PCI library */ @@ -182,7 +182,7 @@ uintptr_t pcidev_init(int bar, const struct dev_entry *devs) int i; uintptr_t addr = 0, curaddr = 0; - if(pcidev_init_common() != 0) + if(pci_init_common() != 0) return 1; pci_filter_init(pacc, &filter); diff --git a/programmer.h b/programmer.h index 5cbf289..77b78bd 100644 --- a/programmer.h +++ b/programmer.h @@ -238,7 +238,7 @@ void internal_delay(int usecs); extern uint32_t io_base_addr; extern struct pci_access *pacc; extern struct pci_dev *pcidev_dev; -int pcidev_init_common(void); +int pci_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); uintptr_t pcidev_init(int bar, const struct dev_entry *devs); /* rpci_write_* are reversible writes. The original PCI config space register -- Kind regards, Stefan Tauner

1 0

[PATCH 4/4] Allow physmap_common() to round address ranges to page boundaries.
by Stefan Tauner 31 Dec '12

31 Dec '12

Automatically round address ranges requested from physmap_autocleanup() to page boundaries. Other physmap() variants were not changed so this is safe regarding unmapping. This patch also changes the display width of all addresses in physmap.c to 16 hex characters. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- physmap.c | 54 +++++++++++++++++++++++++++++++++++------------------- 1 file changed, 35 insertions(+), 19 deletions(-) diff --git a/physmap.c b/physmap.c index a9445d5..e6d9a30 100644 --- a/physmap.c +++ b/physmap.c @@ -20,6 +20,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <inttypes.h> #include <unistd.h> #include <stdbool.h> #include <stdio.h> @@ -215,6 +216,27 @@ void physunmap(void *virt_addr, size_t len) } #endif +/* Round start to nearest page boundary below and set len so that the resulting + * address range ends at the lowest possible page boundary where the original + * address range is still entirely contained. It returns the difference between + * the rounded start address and the original start address. */ +static unsigned long round_to_page_boundaries(unsigned long *start, size_t *len) +{ + unsigned long page_size = getpagesize(); + unsigned long page_mask = ~(page_size-1); + unsigned long end = *start + *len; + unsigned long old_start = *start; + msg_gspew("page_size=%lu\n", page_size); + msg_gspew("pre-rounding: start=0x%016" PRIx64 ", len=0x%0zx, end=0x%016" PRIx64 "\n", + *start, *len, end); + *start = *start & page_mask; + end = (end + page_size - 1) & page_mask; + *len = end - *start; + msg_gspew("post-rounding: start=0x%016" PRIx64 ", len=0x%0zx, end=0x%016" PRIx64 "\n", + *start, *len, *start + *len); + return old_start - *start; +} + struct physmap_stutdown_data { void *addr; size_t len; @@ -233,25 +255,18 @@ static int physmap_shutdown(void *data) } static void *physmap_common(const char *descr, unsigned long phys_addr, size_t len, bool mayfail, - bool readonly, bool autocleanup) + bool readonly, bool autocleanup, bool round) { void *virt_addr; + unsigned long offset = 0; if (len == 0) { - msg_pspew("Not mapping %s, zero size at 0x%08lx.\n", - descr, phys_addr); + msg_pspew("Not mapping %s, zero size at 0x%016" PRIx64 ".\n", descr, phys_addr); return ERROR_PTR; } - if ((getpagesize() - 1) & len) { - msg_perr("Mapping %s at 0x%08lx, unaligned size 0x%lx.\n", - descr, phys_addr, (unsigned long)len); - } - - if ((getpagesize() - 1) & phys_addr) { - msg_perr("Mapping %s, 0x%lx bytes at unaligned 0x%08lx.\n", - descr, (unsigned long)len, phys_addr); - } + if (round) + offset = round_to_page_boundaries(&phys_addr, &len); if (readonly) virt_addr = sys_physmap_ro_cached(phys_addr, len); @@ -261,8 +276,7 @@ static void *physmap_common(const char *descr, unsigned long phys_addr, size_t l if (ERROR_PTR == virt_addr) { if (NULL == descr) descr = "memory"; - msg_perr("Error accessing %s, 0x%lx bytes at 0x%08lx\n", descr, - (unsigned long)len, phys_addr); + msg_perr("Error accessing %s, 0x%0zx bytes at 0x%016" PRIx64 "\n", descr, len, phys_addr); perror(MEM_DEV " mmap failed"); #ifdef __linux__ if (EINVAL == errno) { @@ -277,7 +291,9 @@ static void *physmap_common(const char *descr, unsigned long phys_addr, size_t l "and reboot, or reboot into\n" "single user mode.\n"); #endif - if (!mayfail) + if (mayfail) + return ERROR_PTR; + else exit(3); } @@ -296,7 +312,7 @@ static void *physmap_common(const char *descr, unsigned long phys_addr, size_t l } } - return virt_addr; + return virt_addr + offset; unmap_out: physunmap(virt_addr, len); return ERROR_PTR; @@ -304,17 +320,17 @@ unmap_out: void *physmap(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, false, false, false); + return physmap_common(descr, phys_addr, len, false, false, false, false); } void *physmap_autocleanup(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, false, false, true); + return physmap_common(descr, phys_addr, len, false, false, true, true); } void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, true, true, false); + return physmap_common(descr, phys_addr, len, true, true, false, false); } #if defined(__i386__) || defined(__x86_64__) -- Kind regards, Stefan Tauner

1 0

[PATCH 3/4] Automatically unmap physmap()s.
by Stefan Tauner 31 Dec '12

31 Dec '12

Similarly to the previous PCI self-clean up patch this one allows to get rid of a huge number of programmer shutdown functions and makes introducing bugs harder. It adds a new function physmap_autocleanup() that takes care of unmapping at shutdown. Callers are changed where it makes sense. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 12 +++++++----- drkaiser.c | 12 ++---------- gfxnvidia.c | 11 ++--------- ichspi.c | 4 +++- it85spi.c | 3 +++ mcp6x_spi.c | 15 +++++---------- nicintel.c | 22 +++------------------- nicintel_spi.c | 10 +++------- ogp_spi.c | 11 ++--------- physmap.c | 54 ++++++++++++++++++++++++++++++++++++++++++++---------- programmer.h | 1 + satamv.c | 11 +---------- satasii.c | 14 ++++---------- sb600spi.c | 6 ++++-- 14 files changed, 84 insertions(+), 102 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 267008c..8bce1a3 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -497,7 +497,9 @@ static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name) msg_pdbg("\nRoot Complex Register Block address = 0x%x\n", tmp); /* Map RCBA to virtual memory */ - rcrb = physmap("ICH RCRB", tmp, 0x4000); + rcrb = physmap_autocleanup("ICH RCRB", tmp, 0x4000); + if (rcrb == ERROR_PTR) + return 1; /* Test Boot BIOS Strap Status */ bnt = mmio_readl(rcrb + 0x3410); @@ -568,7 +570,9 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, msg_pdbg("Root Complex Register Block address = 0x%x\n", tmp); /* Map RCBA to virtual memory */ - rcrb = physmap("ICH RCRB", tmp, 0x4000); + rcrb = physmap_autocleanup("ICH RCRB", tmp, 0x4000); + if (rcrb == ERROR_PTR) + return 1; gcs = mmio_readl(rcrb + 0x3410); msg_pdbg("GCS = 0x%x: ", gcs); @@ -721,10 +725,8 @@ static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) case 0x8410: /* VX900 */ mmio_base = pci_read_long(dev, 0xbc) << 8; mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); - if (mmio_base_physmapped == ERROR_PTR) { - physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + if (mmio_base_physmapped == ERROR_PTR) return ERROR_FATAL; - } /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; diff --git a/drkaiser.c b/drkaiser.c index a6eca1c..062ec73 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -56,12 +56,6 @@ static const struct par_programmer par_programmer_drkaiser = { .chip_writen = fallback_chip_writen, }; -static int drkaiser_shutdown(void *data) -{ - physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); - return 0; -} - int drkaiser_init(void) { uint32_t addr; @@ -77,10 +71,8 @@ int drkaiser_init(void) PCI_MAGIC_DRKAISER_VALUE); /* Map 128kB flash memory window. */ - drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", - addr, DRKAISER_MEMMAP_SIZE); - - if (register_shutdown(drkaiser_shutdown, NULL)) + drkaiser_bar = physmap_autocleanup("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE); + if (drkaiser_bar == ERROR_PTR) return 1; max_rom_decode.parallel = 128 * 1024; diff --git a/gfxnvidia.c b/gfxnvidia.c index a994d68..ec63cf6 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -77,12 +77,6 @@ static const struct par_programmer par_programmer_gfxnvidia = { .chip_writen = fallback_chip_writen, }; -static int gfxnvidia_shutdown(void *data) -{ - physunmap(nvidia_bar, GFXNVIDIA_MEMMAP_SIZE); - return 0; -} - int gfxnvidia_init(void) { uint32_t reg32; @@ -96,9 +90,8 @@ int gfxnvidia_init(void) io_base_addr += 0x300000; msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); - nvidia_bar = physmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); - - if (register_shutdown(gfxnvidia_shutdown, NULL)) + nvidia_bar = physmap_autocleanup("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); + if (nvidia_bar == ERROR_PTR) return 1; /* Allow access to flash interface (will disable screen). */ diff --git a/ichspi.c b/ichspi.c index fadfe62..4b52745 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1845,7 +1845,9 @@ int via_init_spi(struct pci_dev *dev, uint32_t mmio_base) { int i; - ich_spibar = physmap("VIA SPI MMIO registers", mmio_base, 0x70); + ich_spibar = physmap_autocleanup("VIA SPI MMIO registers", mmio_base, 0x70); + if (ich_spibar == ERROR_PTR) + return ERROR_FATAL; /* Do we really need no write enable? Like the LPC one at D17F0 0x40 */ /* Not sure if it speaks all these bus protocols. */ diff --git a/it85spi.c b/it85spi.c index 0b074eb..b778436 100644 --- a/it85spi.c +++ b/it85spi.c @@ -262,6 +262,9 @@ static int it85xx_spi_common_init(struct superio s) * Major TODO here, and it will be a lot of work. */ base = (chipaddr)physmap("it85 communication", 0xFFFFF000, 0x1000); + if (base == ERROR_PTR) + return 1; + msg_pdbg("%s():%d base=0x%08x\n", __func__, __LINE__, (unsigned int)base); ce_high = (unsigned char *)(base + 0xE00); /* 0xFFFFFE00 */ diff --git a/mcp6x_spi.c b/mcp6x_spi.c index ac40557..0c519eb 100644 --- a/mcp6x_spi.c +++ b/mcp6x_spi.c @@ -135,25 +135,20 @@ int mcp6x_spi_init(int want_spi) /* Accessing a NULL pointer BAR is evil. Don't do it. */ if (!mcp6x_spibaraddr && want_spi) { - msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR " - "is invalid.\n"); + msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR is invalid.\n"); return 1; } else if (!mcp6x_spibaraddr && !want_spi) { msg_pdbg("MCP SPI is not used.\n"); return 0; } else if (mcp6x_spibaraddr && !want_spi) { - msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently" - " doesn't have SPI enabled.\n"); + msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled.\n"); /* FIXME: Should we enable SPI anyway? */ return 0; } /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ - mcp6x_spibar = physmap("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); - -#if 0 - /* FIXME: Run the physunmap in a shutdown function. */ - physunmap(mcp6x_spibar, 0x544); -#endif + mcp6x_spibar = physmap_autocleanup("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); + if (mcp6x_spibar == ERROR_PTR) + return 1; status = mmio_readw(mcp6x_spibar + 0x530); msg_pdbg("SPI control is 0x%04x, req=%i, gnt=%i\n", diff --git a/nicintel.c b/nicintel.c index 8481915..5463af2 100644 --- a/nicintel.c +++ b/nicintel.c @@ -59,13 +59,6 @@ static const struct par_programmer par_programmer_nicintel = { .chip_writen = fallback_chip_writen, }; -static int nicintel_shutdown(void *data) -{ - physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); - physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); - return 0; -} - int nicintel_init(void) { uintptr_t addr; @@ -81,19 +74,15 @@ int nicintel_init(void) */ addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); - nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); + nicintel_bar = physmap_autocleanup("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); if (nicintel_bar == ERROR_PTR) - goto error_out_unmap; + return 1; /* FIXME: Using pcidev_dev _will_ cause pretty explosions in the future. */ addr = pcidev_readbar(pcidev_dev, PCI_BASE_ADDRESS_0); /* FIXME: This is not an aligned mapping. Use 4k? */ - nicintel_control_bar = physmap("Intel NIC control/status reg", - addr, NICINTEL_CONTROL_MEMMAP_SIZE); + nicintel_control_bar = physmap_autocleanup("Intel NIC control/status reg", addr, NICINTEL_CONTROL_MEMMAP_SIZE); if (nicintel_control_bar == ERROR_PTR) - goto error_out; - - if (register_shutdown(nicintel_shutdown, NULL)) return 1; /* FIXME: This register is pretty undocumented in all publicly available @@ -111,11 +100,6 @@ int nicintel_init(void) register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL); return 0; - -error_out_unmap: - physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); -error_out: - return 1; } static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val, diff --git a/nicintel_spi.c b/nicintel_spi.c index f61c2b1..8630f3f 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -151,16 +151,12 @@ static int nicintel_spi_shutdown(void *data) { uint32_t tmp; - /* Disable writes manually. See the comment about EECD in - * nicintel_spi_init() for details. - */ + /* Disable writes manually. See the comment about EECD in nicintel_spi_init() for details. */ tmp = pci_mmio_readl(nicintel_spibar + EECD); tmp &= ~FLASH_WRITES_ENABLED; tmp |= FLASH_WRITES_DISABLED; pci_mmio_writel(tmp, nicintel_spibar + EECD); - physunmap(nicintel_spibar, MEMMAP_SIZE); - return 0; } @@ -174,8 +170,8 @@ int nicintel_spi_init(void) /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); - nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", - io_base_addr, MEMMAP_SIZE); + nicintel_spibar = physmap_autocleanup("Intel Gigabit NIC w/ SPI flash", io_base_addr, MEMMAP_SIZE); + /* Automatic restore of EECD on shutdown is not possible because EECD * does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED, * but other bits with side effects as well. Those other bits must be diff --git a/ogp_spi.c b/ogp_spi.c index 6fb1a77..d66b2ef 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -97,12 +97,6 @@ static const struct bitbang_spi_master bitbang_spi_master_ogp = { .half_period = 0, }; -static int ogp_spi_shutdown(void *data) -{ - physunmap(ogp_spibar, 4096); - return 0; -} - int ogp_spi_init(void) { char *type; @@ -133,9 +127,8 @@ int ogp_spi_init(void) io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, ogp_spi); - ogp_spibar = physmap("OGP registers", io_base_addr, 4096); - - if (register_shutdown(ogp_spi_shutdown, NULL)) + ogp_spibar = physmap_autocleanup("OGP registers", io_base_addr, 4096); + if (ogp_spibar == ERROR_PTR) return 1; if (bitbang_spi_init(&bitbang_spi_master_ogp)) diff --git a/physmap.c b/physmap.c index 5aa9874..a9445d5 100644 --- a/physmap.c +++ b/physmap.c @@ -21,6 +21,7 @@ */ #include <unistd.h> +#include <stdbool.h> #include <stdio.h> #include <stdlib.h> #include <string.h> @@ -214,13 +215,25 @@ void physunmap(void *virt_addr, size_t len) } #endif -#define PHYSMAP_NOFAIL 0 -#define PHYSMAP_MAYFAIL 1 -#define PHYSMAP_RW 0 -#define PHYSMAP_RO 1 +struct physmap_stutdown_data { + void *addr; + size_t len; +}; -static void *physmap_common(const char *descr, unsigned long phys_addr, - size_t len, int mayfail, int readonly) +static int physmap_shutdown(void *data) +{ + if (data == NULL) { + msg_perr("%s: tried to shutdown without valid data!\n", __func__); + return 1; + } + struct physmap_stutdown_data *d = data; + physunmap(d->addr, d->len); + free(data); + return 0; +} + +static void *physmap_common(const char *descr, unsigned long phys_addr, size_t len, bool mayfail, + bool readonly, bool autocleanup) { void *virt_addr; @@ -268,19 +281,40 @@ static void *physmap_common(const char *descr, unsigned long phys_addr, exit(3); } + if (autocleanup) { + struct physmap_stutdown_data *d = malloc(sizeof(struct physmap_stutdown_data)); + if (d == NULL) { + msg_perr("%s: Out of memory!\n", __func__); + goto unmap_out; + } + + d->addr = virt_addr; + d->len = len; + if (register_shutdown(physmap_shutdown, d) != 0) { + msg_perr("%s: Could not register shutdown function!\n", __func__); + goto unmap_out; + } + } + return virt_addr; +unmap_out: + physunmap(virt_addr, len); + return ERROR_PTR; } void *physmap(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, PHYSMAP_NOFAIL, - PHYSMAP_RW); + return physmap_common(descr, phys_addr, len, false, false, false); +} + +void *physmap_autocleanup(const char *descr, unsigned long phys_addr, size_t len) +{ + return physmap_common(descr, phys_addr, len, false, false, true); } void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, PHYSMAP_MAYFAIL, - PHYSMAP_RO); + return physmap_common(descr, phys_addr, len, true, true, false); } #if defined(__i386__) || defined(__x86_64__) diff --git a/programmer.h b/programmer.h index 7703ec1..5cbf289 100644 --- a/programmer.h +++ b/programmer.h @@ -272,6 +272,7 @@ int processor_flash_enable(void); /* physmap.c */ void *physmap(const char *descr, unsigned long phys_addr, size_t len); +void *physmap_autocleanup(const char *descr, unsigned long phys_addr, size_t len); void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len); void physunmap(void *virt_addr, size_t len); #if CONFIG_INTERNAL == 1 diff --git a/satamv.c b/satamv.c index 46a0e2d..726dd5a 100644 --- a/satamv.c +++ b/satamv.c @@ -57,12 +57,6 @@ static const struct par_programmer par_programmer_satamv = { .chip_writen = fallback_chip_writen, }; -static int satamv_shutdown(void *data) -{ - physunmap(mv_bar, 0x20000); - return 0; -} - /* * Random notes: * FCE# Flash Chip Enable @@ -93,13 +87,10 @@ int satamv_init(void) */ addr = pcidev_init(PCI_BASE_ADDRESS_0, satas_mv); - mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); + mv_bar = physmap_autocleanup("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) return 1; - if (register_shutdown(satamv_shutdown, NULL)) - return 1; - tmp = pci_mmio_readl(mv_bar + FLASH_PARAM); msg_pspew("Flash Parameters:\n"); msg_pspew("TurnOff=0x%01x\n", (tmp >> 0) & 0x7); diff --git a/satasii.c b/satasii.c index 730c420..36f4cd1 100644 --- a/satasii.c +++ b/satasii.c @@ -54,12 +54,6 @@ static const struct par_programmer par_programmer_satasii = { .chip_writen = fallback_chip_writen, }; -static int satasii_shutdown(void *data) -{ - physunmap(sii_bar, SATASII_MEMMAP_SIZE); - return 0; -} - static uint32_t satasii_wait_done(void) { uint32_t ctrl_reg; @@ -94,15 +88,15 @@ int satasii_init(void) reg_offset = 0x50; } - sii_bar = physmap("SATA SiI registers", addr, SATASII_MEMMAP_SIZE) + reg_offset; + sii_bar = physmap_autocleanup("SATA SiI registers", addr, SATASII_MEMMAP_SIZE); + if (sii_bar == ERROR_PTR) + return 1; + sii_bar += reg_offset; /* Check if ROM cycle are OK. */ if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) msg_pinfo("Warning: Flash seems unconnected.\n"); - if (register_shutdown(satasii_shutdown, NULL)) - return 1; - register_par_programmer(&par_programmer_satasii, BUS_PARALLEL); return 0; diff --git a/sb600spi.c b/sb600spi.c index fe60aa9..7888bb9 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -224,8 +224,10 @@ int sb600_probe_spi(struct pci_dev *dev) return 0; /* Physical memory has to be mapped at page (4k) boundaries. */ - sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000, - 0x1000); + sb600_spibar = physmap_autocleanup("SB600 SPI registers", tmp & 0xfffff000, 0x1000); + if (sb600_spibar == ERROR_PTR) + return 1; + /* The low bits of the SPI base address are used as offset into * the mapped page. */ -- Kind regards, Stefan Tauner

1 0

[PATCH 2/4] Add pci_init_common() to unify PCI init.
by Stefan Tauner 31 Dec '12

31 Dec '12

Previously the internal programmer used its own code to initialize pcilib. This patch extracts the common code from the internal programmer and pcidev_init() into pcidev_init_common(). This fixes the non-existent PCI cleanup of the internal programmer. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- internal.c | 6 ++---- pcidev.c | 15 +++++++++++---- programmer.h | 1 + 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/internal.c b/internal.c index eda4d59..9b34715 100644 --- a/internal.c +++ b/internal.c @@ -245,10 +245,8 @@ int internal_init(void) internal_buses_supported = BUS_NONSPI; /* Initialize PCI access for flash enables */ - pacc = pci_alloc(); /* Get the pci_access structure */ - /* Set all options you want -- here we stick with the defaults */ - pci_init(pacc); /* Initialize the PCI library */ - pci_scan_bus(pacc); /* We want to get the list of devices */ + if(pci_init_common() != 0) + return 1; if (processor_flash_enable()) { msg_perr("Processor detection/init failed.\n" diff --git a/pcidev.c b/pcidev.c index 37bcc22..7f1f243 100644 --- a/pcidev.c +++ b/pcidev.c @@ -162,6 +162,16 @@ static int pcidev_shutdown(void *data) return 0; } +int pcidev_init_common(void) +{ + pacc = pci_alloc(); /* Get the pci_access structure */ + pci_init(pacc); /* Initialize the PCI library */ + if (register_shutdown(pcidev_shutdown, NULL)) + return 1; + pci_scan_bus(pacc); /* We want to get the list of devices */ + return 0; +} + uintptr_t pcidev_init(int bar, const struct dev_entry *devs) { struct pci_dev *dev; @@ -172,11 +182,8 @@ uintptr_t pcidev_init(int bar, const struct dev_entry *devs) int i; uintptr_t addr = 0, curaddr = 0; - pacc = pci_alloc(); /* Get the pci_access structure */ - pci_init(pacc); /* Initialize the PCI library */ - if (register_shutdown(pcidev_shutdown, NULL)) + if(pcidev_init_common() != 0) return 1; - pci_scan_bus(pacc); /* We want to get the list of devices */ pci_filter_init(pacc, &filter); /* Filter by bb:dd.f (if supplied by the user). */ diff --git a/programmer.h b/programmer.h index 8de42bc..7703ec1 100644 --- a/programmer.h +++ b/programmer.h @@ -238,6 +238,7 @@ void internal_delay(int usecs); extern uint32_t io_base_addr; extern struct pci_access *pacc; extern struct pci_dev *pcidev_dev; +int pcidev_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); uintptr_t pcidev_init(int bar, const struct dev_entry *devs); /* rpci_write_* are reversible writes. The original PCI config space register -- Kind regards, Stefan Tauner

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[PATCH 1/4] Let pcidev clean itself up.
by Stefan Tauner 31 Dec '12

31 Dec '12

We got a nice shutdown function registration infrastructure, but did not use it very wisely. Instead we added shutdown functions to a myriad of programmers unnecessarily. In this patch we get rid of those that do only call pci_cleanup(pacc) by adding a shutdown function the pcidev.c itself that gets registered by pcidev_init(). Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- atahpt.c | 10 ---------- drkaiser.c | 3 +-- gfxnvidia.c | 6 +----- nic3com.c | 2 +- nicintel.c | 5 +---- nicintel_spi.c | 2 +- nicrealtek.c | 7 +++++-- ogp_spi.c | 2 -- pcidev.c | 15 +++++++++++++++ satamv.c | 7 +------ satasii.c | 1 - 11 files changed, 26 insertions(+), 34 deletions(-) diff --git a/atahpt.c b/atahpt.c index 92f7deb..d19cb75 100644 --- a/atahpt.c +++ b/atahpt.c @@ -56,13 +56,6 @@ static const struct par_programmer par_programmer_atahpt = { .chip_writen = fallback_chip_writen, }; -static int atahpt_shutdown(void *data) -{ - /* Flash access is disabled automatically by PCI restore. */ - pci_cleanup(pacc); - return 0; -} - int atahpt_init(void) { uint32_t reg32; @@ -77,9 +70,6 @@ int atahpt_init(void) reg32 |= (1 << 24); rpci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32); - if (register_shutdown(atahpt_shutdown, NULL)) - return 1; - register_par_programmer(&par_programmer_atahpt, BUS_PARALLEL); return 0; diff --git a/drkaiser.c b/drkaiser.c index e461061..a6eca1c 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -59,8 +59,6 @@ static const struct par_programmer par_programmer_drkaiser = { static int drkaiser_shutdown(void *data) { physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); - /* Flash write is disabled automatically by PCI restore. */ - pci_cleanup(pacc); return 0; } @@ -71,6 +69,7 @@ int drkaiser_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ addr = pcidev_init(PCI_BASE_ADDRESS_2, drkaiser_pcidev); /* Write magic register to enable flash write. */ diff --git a/gfxnvidia.c b/gfxnvidia.c index 624fd7c..a994d68 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -80,10 +80,6 @@ static const struct par_programmer par_programmer_gfxnvidia = { static int gfxnvidia_shutdown(void *data) { physunmap(nvidia_bar, GFXNVIDIA_MEMMAP_SIZE); - /* Flash interface access is disabled (and screen enabled) automatically - * by PCI restore. - */ - pci_cleanup(pacc); return 0; } @@ -94,6 +90,7 @@ int gfxnvidia_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia); io_base_addr += 0x300000; @@ -101,7 +98,6 @@ int gfxnvidia_init(void) nvidia_bar = physmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); - /* Must be done before rpci calls. */ if (register_shutdown(gfxnvidia_shutdown, NULL)) return 1; diff --git a/nic3com.c b/nic3com.c index 05eada6..4ec6193 100644 --- a/nic3com.c +++ b/nic3com.c @@ -81,7 +81,6 @@ static int nic3com_shutdown(void *data) OUTL(internal_conf, io_base_addr + INTERNAL_CONFIG); } - pci_cleanup(pacc); return 0; } @@ -90,6 +89,7 @@ int nic3com_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_3com); id = pcidev_dev->device_id; diff --git a/nicintel.c b/nicintel.c index d210d78..8481915 100644 --- a/nicintel.c +++ b/nicintel.c @@ -63,7 +63,6 @@ static int nicintel_shutdown(void *data) { physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); - pci_cleanup(pacc); return 0; } @@ -77,8 +76,7 @@ int nicintel_init(void) if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case - * of errors. + /* No need to check for errors, pcidev_init() will not return in case of errors. * FIXME: BAR2 is not available if the device uses the CardBus function. */ addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); @@ -117,7 +115,6 @@ int nicintel_init(void) error_out_unmap: physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); error_out: - pci_cleanup(pacc); return 1; } diff --git a/nicintel_spi.c b/nicintel_spi.c index 325e61c..f61c2b1 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -160,7 +160,6 @@ static int nicintel_spi_shutdown(void *data) pci_mmio_writel(tmp, nicintel_spibar + EECD); physunmap(nicintel_spibar, MEMMAP_SIZE); - pci_cleanup(pacc); return 0; } @@ -172,6 +171,7 @@ int nicintel_spi_init(void) if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", diff --git a/nicrealtek.c b/nicrealtek.c index 3c3b261..0929e5d 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -51,22 +51,25 @@ static const struct par_programmer par_programmer_nicrealtek = { .chip_writen = fallback_chip_writen, }; +#if 0 static int nicrealtek_shutdown(void *data) { /* FIXME: We forgot to disable software access again. */ - pci_cleanup(pacc); return 0; } +#endif int nicrealtek_init(void) { if (rget_io_perms()) return 1; + /* No need to check for errors, pcidev_init() will not return in case of errors. */ io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); - +#if 0 if (register_shutdown(nicrealtek_shutdown, NULL)) return 1; +#endif /* Beware, this ignores the vendor ID! */ switch (pcidev_dev->device_id) { diff --git a/ogp_spi.c b/ogp_spi.c index d1bb12f..6fb1a77 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -100,8 +100,6 @@ static const struct bitbang_spi_master bitbang_spi_master_ogp = { static int ogp_spi_shutdown(void *data) { physunmap(ogp_spibar, 4096); - pci_cleanup(pacc); - return 0; } diff --git a/pcidev.c b/pcidev.c index 1a26e99..37bcc22 100644 --- a/pcidev.c +++ b/pcidev.c @@ -154,6 +154,14 @@ uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) return (uintptr_t)addr; } +static int pcidev_shutdown(void *data) +{ + if (pacc != NULL) + pci_cleanup(pacc); + pcidev_dev = NULL; + return 0; +} + uintptr_t pcidev_init(int bar, const struct dev_entry *devs) { struct pci_dev *dev; @@ -166,6 +174,8 @@ uintptr_t pcidev_init(int bar, const struct dev_entry *devs) pacc = pci_alloc(); /* Get the pci_access structure */ pci_init(pacc); /* Initialize the PCI library */ + if (register_shutdown(pcidev_shutdown, NULL)) + return 1; pci_scan_bus(pacc); /* We want to get the list of devices */ pci_filter_init(pacc, &filter); @@ -244,6 +254,11 @@ struct undo_pci_write_data { int undo_pci_write(void *p) { struct undo_pci_write_data *data = p; + if (pacc == NULL) { + msg_perr("%s: Tried to undo PCI writes without a valid PCI context!\n" + "Please report a bug at flashrom(a)flashrom.org\n", __func__); + return 1; + } msg_pdbg("Restoring PCI config space for %02x:%02x:%01x reg 0x%02x\n", data->dev.bus, data->dev.dev, data->dev.func, data->reg); switch (data->type) { diff --git a/satamv.c b/satamv.c index c0c1ffa..46a0e2d 100644 --- a/satamv.c +++ b/satamv.c @@ -60,7 +60,6 @@ static const struct par_programmer par_programmer_satamv = { static int satamv_shutdown(void *data) { physunmap(mv_bar, 0x20000); - pci_cleanup(pacc); return 0; } @@ -96,7 +95,7 @@ int satamv_init(void) mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) - goto error_out; + return 1; if (register_shutdown(satamv_shutdown, NULL)) return 1; @@ -159,10 +158,6 @@ int satamv_init(void) register_par_programmer(&par_programmer_satamv, BUS_PARALLEL); return 0; - -error_out: - pci_cleanup(pacc); - return 1; } /* BAR2 (MEM) can map NVRAM and flash. We set it to flash in the init function. diff --git a/satasii.c b/satasii.c index 7b94203..730c420 100644 --- a/satasii.c +++ b/satasii.c @@ -57,7 +57,6 @@ static const struct par_programmer par_programmer_satasii = { static int satasii_shutdown(void *data) { physunmap(sii_bar, SATASII_MEMMAP_SIZE); - pci_cleanup(pacc); return 0; } -- Kind regards, Stefan Tauner

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Re: [flashrom] [PATCH] automatically round address ranges requested from physmap_common to page boundaries
by Stefan Tauner 31 Dec '12

31 Dec '12

On Mon, 30 May 2011 02:45:44 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > this patch also changes the display width of all addresses in physmap.c to 16 hex characters. > > FIXME: what about unmappings? > munmap is safe. > djgpp's __dpmi_free_physical_address_mapping: unknown. > DirectHW's unmap_physical: unknown. > > FIXME: jakllsch suggested using PRIx64 instead of x, because it's more portable FIXME: in the case we can not map and 'mayfail' is true we should return ERROR_PTR instead of ERROR_PTR + diff -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] 2theMax RAID 100 (HPT370)
by Roy 30 Dec '12

30 Dec '12

2012/12/28 Idwer Vollering <vidwer(a)gmail.com>: > 2012/12/27 Roy <roytam(a)gmail.com>: >> Hi all, >> >> I got a 2theMax RAID 100 card with SST MPF 39SF512 70-4C-NH 64KB ROm on >> PCB, >> flashrom segfaults at the end. > > Interesting. Can you run flashrom from GDB? > > 'gdb --args ./flashrom -p atahpt -V' > (gdb) start > (wait a little) > (gdb) bt > Sure. But isn't pcilib yells the prefix path is NULL? root@www6:~/flashrom-0.9.6.1# gdb -args ./flashrom -p atahpt GNU gdb (GDB) 7.0.1-debian Copyright (C) 2009 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html> This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "i486-linux-gnu". For bug reporting instructions, please see: <http://www.gnu.org/software/gdb/bugs/>... Reading symbols from /root/flashrom-0.9.6.1/flashrom...done. (gdb) r Starting program: /root/flashrom-0.9.6.1/flashrom -p atahpt flashrom v0.9.6.1-r1564 on Linux 2.6.32-5-686 (i686) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom(a)flashrom.org if it works for you. Please add the name of your PCI device to the subject. Thank you for your help! === No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. pcilib: Cannot open (null)/devices/0000:00:0f.0/config Program received signal SIGSEGV, Segmentation fault. 0xb7ee52ae in ?? () from /lib/i686/cmov/libc.so.6 (gdb) bt #0 0xb7ee52ae in ?? () from /lib/i686/cmov/libc.so.6 #1 0xb7ee6745 in ?? () from /lib/i686/cmov/libc.so.6 #2 0xb7ee98ad in free () from /lib/i686/cmov/libc.so.6 #3 0x0806dd5f in undo_pci_write (p=0x80a30e0) at pcidev.c:274 #4 0x08049ff2 in programmer_shutdown () at flashrom.c:367 #5 0x0804db16 in main (argc=3, argv=0xbffffd94) at cli_classic.c:521 (gdb) >> >> lspci: >> 00:0f.0 Mass storage controller [0180]: HighPoint Technologies, Inc. >> HPT366/368/370/370A/372/372N [1103:0004] (rev 03) >> Subsystem: HighPoint Technologies, Inc. HPT370 UDMA100 >> [1103:0005] >> Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- >> ParErr- >> Stepping- SERR- FastB2B- DisINTx- >> Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- >> <TAbort- <MAbort- >SERR- <PERR- INTx- >> Latency: 120 (2000ns min, 2000ns max), Cache Line Size: 32 bytes >> Interrupt: pin A routed to IRQ 18 >> Region 0: I/O ports at a800 [size=8] >> Region 1: I/O ports at a400 [size=4] >> Region 2: I/O ports at a000 [size=8] >> Region 3: I/O ports at 9800 [size=4] >> Region 4: I/O ports at 9400 [size=256] >> [virtual] Expansion ROM at 20020000 [disabled] [size=128K] >> Kernel driver in use: HPT366_IDE > > Does unloading/not loading hpt366_ide at boot time improve things? > >> 00: 03 11 04 00 05 00 00 02 03 00 80 01 08 78 00 00 >> 10: 01 a8 00 00 01 a4 00 00 01 a0 00 00 01 98 00 00 >> 20: 01 94 00 00 00 00 00 00 00 00 00 00 03 11 05 00 >> 30: 00 00 00 00 60 00 00 00 00 00 00 00 0a 01 08 08 >> 40: a7 4e 81 06 a7 4e 81 06 a7 4e 81 06 a7 4e 81 06 >> 50: 05 01 00 00 05 01 00 00 1b 00 00 23 24 00 26 00 >> 60: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00 >> 70: 00 00 00 00 00 00 00 00 94 00 00 00 00 00 00 00 >> 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> >> flashrom v0.9.6.1-r1564 on Linux 2.6.32-5-686 (i686) >> flashrom is free software, get the source code at >> http://www.flashrom.org >> >> flashrom was built with libpci 3.1.7, GCC 4.4.5, little endian > > On which operating system is it built, segfaulting? Debian 6.0.6 i386. > >> Command line (3 args): ./flashrom -p atahpt -V >> Calibrating delay loop... OS timer resolution is 1 usecs, 230M loops per >> second, delay more than 10% too short (got 76% of expected delay), >> recalculating... 291M loops per second, 10 myus = 10 us, 100 myus = 97 >> us, >> 1000 myus = 962 us, 10000 myus = 9635 us, 4 myus = 5 us, OK. >> Initializing atahpt programmer >> Found "Highpoint HPT366/368/370/370A/372/372N" (1103:0004, BDF 00:0f.0). >> === >> This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output >> to flashrom(a)flashrom.org if it works for you. Please add the name of >> your >> PCI device to the subject. Thank you for your help! >> === >> Requested BAR is I/O >> The following protocols are supported: Parallel. >> Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Atmel AT49F040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Eon EN29LV640B, 8192 kB: probe_en29lv640b: id1 0x0000, id2 >> 0x0000 >> Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0x00, id2 >> 0x00 >> Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0x00, id2 >> 0x00 >> Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 >> 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 >> 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 >> 0x00, >> id2 0x00, id1 parity violation, id1 is normal flash content, id2 is >> normal >> flash content >> Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing >> information, using default 10mS/40uS. probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing >> information, using default 10mS/40uS. probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for PMC Pm39LV512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0x00, id2 0x00, >> id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0x00, id2 0x00 >> Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0x00, id2 0x00 >> Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, >> id1 >> parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: >> probe_jedec_common: >> id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, >> id2 >> is normal flash content >> Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: >> probe_jedec_common: >> id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, >> id2 >> is normal flash content >> Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: >> Old >> Winbond W29* probe method disabled because the probing sequence puts the >> AMIC A49LF040A in a funky state. Use 'flashrom -c >> W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with >> such a >> chip. >> Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: >> probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is >> normal >> flash content, id2 is normal flash content >> Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 >> 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 >> is >> normal flash content >> Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x00, >> id2 >> 0x00, id1 parity violation, id1 is normal flash content, id2 is normal >> flash >> content >> Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x00, id2 >> 0x00, >> id1 parity violation, id1 is normal flash content, id2 is normal flash >> content >> No EEPROM/flash device found. >> Note: flashrom can never write if the flash chip isn't found >> automatically. >> Restoring PCI config space for 00:0f:0 reg 0x58 >> pcilib: Cannot open (null)/devices/0000:00:0f.0/config >> >> HTH, >> Roy >> >> >> _______________________________________________ >> flashrom mailing list >> flashrom(a)flashrom.org >> http://www.flashrom.org/mailman/listinfo/flashrom

2 2

VIA VT6421A (HZ-006)
by Roy 30 Dec '12

30 Dec '12

Hi all, It has "HZ-006" printed on the PCB. It does have Pm39LV512-70JCB on the board, but it seems no firmware written and no boot ROM messages. lspci: 00:0f.0 RAID bus controller [0104]: VIA Technologies, Inc. VT6421 IDE RAID Controller [1106:3249] (rev 50) Subsystem: VIA Technologies, Inc. VT6421 IDE RAID Controller [1106:3249] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 Interrupt: pin A routed to IRQ 18 Region 0: I/O ports at a800 [size=16] Region 1: I/O ports at a400 [size=16] Region 2: I/O ports at a000 [size=16] Region 3: I/O ports at 9800 [size=16] Region 4: I/O ports at 9400 [size=32] Region 5: I/O ports at 9000 [size=256] [virtual] Expansion ROM at 20020000 [disabled] [size=64K] Capabilities: [e0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: sata_via 00: 06 11 49 32 07 00 90 02 50 00 04 01 00 20 00 00 10: 01 a8 00 00 01 a4 00 00 01 a0 00 00 01 98 00 00 20: 01 94 00 00 01 90 00 00 00 00 00 00 06 11 49 32 30: 00 00 00 00 e0 00 00 00 00 00 00 00 0a 01 00 00 40: 33 03 f1 44 0e af 00 00 00 00 00 03 00 00 00 00 50: 00 00 04 00 00 00 00 00 00 10 10 00 05 00 20 00 60: 00 00 ff ff 00 00 00 00 00 00 00 00 00 00 ff ff 70: 00 00 00 00 01 f0 00 00 01 00 01 00 11 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 0b f2 c9 35 10 ac c0 00 a8 a8 a8 a8 ff 00 b6 b6 b0: 0f 0f 0f 0f 34 00 00 00 00 00 20 00 00 00 00 00 c0: 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 d0: 02 01 00 00 00 00 00 00 02 01 00 00 00 00 00 00 e0: 01 00 02 00 00 00 00 00 50 01 49 32 06 11 49 32 f0: 00 00 70 00 00 00 00 00 00 00 00 00 00 00 00 00 flashrom v0.9.6.1-r1564 on Linux 2.6.32-5-686 (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.7, GCC 4.4.5, little endian Command line (3 args): ./flashrom -p atavia -V Calibrating delay loop... OS timer resolution is 1 usecs, 261M loops per second, delay more than 10% too short (got 87% of expected delay), recalculating... 296M loops per second, 10 myus = 10 us, 100 myus = 98 us, 1000 myus = 986 us, 10000 myus = 9789 us, 4 myus = 5 us, OK. Initializing atavia programmer Found "VIA VT6421A" (1106:3249, BDF 00:0f.0). === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom(a)flashrom.org if it works for you. Please add the name of your PCI device to the subject. Thank you for your help! === Requested BAR is ROM Error: No supported PCI device found. HTH, Roy

2 4

W836xx: Compaq Presario CQ60: flashrom -V
by Narcis Garcia - GiLUG 30 Dec '12

30 Dec '12

$ sudo flashrom -p internal -V flashrom v0.9.6.1-r1563 on Linux 3.5.0-21-generic (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian Command line (3 args): flashrom -p internal -V Calibrating delay loop... OS timer resolution is 1 usecs, 1661M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1017 us, 10000 myus = 10012 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Hewlett-Packard" DMI string system-product-name: "Compaq Presario CQ60 Notebook PC" DMI string system-version: "F.26" DMI string baseboard-manufacturer: "Wistron" DMI string baseboard-product-name: "3612" DMI string baseboard-version: "09.45" DMI string chassis-type: "Notebook" Laptop detected via DMI. W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: fc. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed.

1 0

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flashrom December 2012