December 2012 - flashrom - mail.coreboot.org

[commit] r1639 - trunk
by repository service Dec. 30, 2012

Dec. 30, 2012

Author: stefanct Date: Sun Dec 30 02:23:17 2012 New Revision: 1639 URL: http://flashrom.org/trac/flashrom/changeset/1639 Log: Constify parameters and globals. This makes some stuff const (partially to get a more convenient libflashrom interface). Signed-off-by: Nico Huber <nico.huber(a)secunet.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/cli_classic.c trunk/flash.h trunk/flashrom.c trunk/programmer.h Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Sat Dec 29 20:26:55 2012 (r1638) +++ trunk/cli_classic.c Sun Dec 30 02:23:17 2012 (r1639) @@ -532,7 +532,7 @@ free(layoutfile); free(pparam); /* clean up global variables */ - free(chip_to_probe); + free((char *)chip_to_probe); /* Silence! Freeing is not modifying contents. */ chip_to_probe = NULL; #ifndef STANDALONE ret |= close_logfile(); Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sat Dec 29 20:26:55 2012 (r1638) +++ trunk/flash.h Sun Dec 30 02:23:17 2012 (r1639) @@ -222,7 +222,7 @@ extern int verbose_screen; extern int verbose_logfile; extern const char flashrom_version[]; -extern char *chip_to_probe; +extern const char *chip_to_probe; void map_flash_registers(struct flashctx *flash); int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int erase_flash(struct flashctx *flash); @@ -231,7 +231,7 @@ int min(int a, int b); int max(int a, int b); void tolower_string(char *str); -char *extract_param(char **haystack, const char *needle, const char *delim); +char *extract_param(const char *const *haystack, const char *needle, const char *delim); int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len); int need_erase(uint8_t *have, uint8_t *want, unsigned int len, enum write_granularity gran); char *strcat_realloc(char *dest, const char *src); Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sat Dec 29 20:26:55 2012 (r1638) +++ trunk/flashrom.c Sun Dec 30 02:23:17 2012 (r1639) @@ -40,13 +40,13 @@ #include "hwaccess.h" const char flashrom_version[] = FLASHROM_VERSION; -char *chip_to_probe = NULL; +const char *chip_to_probe = NULL; int verbose_screen = MSG_INFO; int verbose_logfile = MSG_DEBUG2; static enum programmer programmer = PROGRAMMER_INVALID; -static char *programmer_param = NULL; +static const char *programmer_param = NULL; /* * Programmers supporting multiple buses can have differing size limits on @@ -351,7 +351,7 @@ return 0; } -int programmer_init(enum programmer prog, char *param) +int programmer_init(enum programmer prog, const char *param) { int ret; @@ -517,7 +517,7 @@ * needle and remove everything from the first occurrence of needle to the next * delimiter from haystack. */ -char *extract_param(char **haystack, const char *needle, const char *delim) +char *extract_param(const char *const *haystack, const char *needle, const char *delim) { char *param_pos, *opt_pos, *rest; char *opt = NULL; Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sat Dec 29 20:26:55 2012 (r1638) +++ trunk/programmer.h Sun Dec 30 02:23:17 2012 (r1639) @@ -122,7 +122,7 @@ extern const struct programmer_entry programmer_table[]; -int programmer_init(enum programmer prog, char *param); +int programmer_init(enum programmer prog, const char *param); int programmer_shutdown(void); enum bitbang_spi_master_type {

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Re: [flashrom] [PATCH] Simplify hwaccess.c.
by Stefan Tauner Dec. 29, 2012

Dec. 29, 2012

On Sun, 26 Aug 2012 20:59:25 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > Previously the code was focused on architectures which led to lots of > duplicate code and spread the information regarding differences between > the architectures accross the file. > > With this patch there is a single function header for any function and the > differentiation between architectures (and OS where needed) happens > in one place. Also, this patch adds simple defines to bundle often used arch > and os checks. A central check for unknown architectures and OSes has > been added on top. > > Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> self-acked and committed in r1638. thanks again, peter! -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1638 - trunk
by repository service Dec. 29, 2012

Dec. 29, 2012

Author: stefanct Date: Sat Dec 29 20:26:55 2012 New Revision: 1638 URL: http://flashrom.org/trac/flashrom/changeset/1638 Log: Simplify hwaccess.c. Previously the code was focused on architectures which led to lots of duplicate code and spread the information regarding differences between the architectures accross the file. With this patch there is a single function header for any function and the differentiation between architectures (and OS where needed) happens in one place for each function. Also, this patch adds simple defines to bundle often used arch and os checks. A central check for unknown architectures and OSes has been added on top. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/hwaccess.c Modified: trunk/hwaccess.c ============================================================================== --- trunk/hwaccess.c Sat Dec 29 16:04:20 2012 (r1637) +++ trunk/hwaccess.c Sat Dec 29 20:26:55 2012 (r1638) @@ -18,6 +18,20 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#define IS_X86 (defined(__i386__) || defined(__x86_64__) || defined(__amd64__)) +#define IS_MIPS (defined (__mips) || defined (__mips__) || defined (__MIPS__) || defined (mips)) +#define IS_PPC (defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)) +#define IS_ARM (defined (__arm__) || defined (_ARM)) +#if !(IS_X86 || IS_MIPS || IS_PPC || IS_ARM) +#error Unknown architecture +#endif + +#define IS_BSD (defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__OpenBSD__)) +#define IS_LINUX (defined(__gnu_linux__) || defined(__linux__)) +#if !(IS_BSD || IS_LINUX || defined(__DJGPP__) || defined(__LIBPAYLOAD__) || defined(__sun)) +#error "Unknown operating system" +#endif + #include <stdint.h> #include <string.h> #include <stdlib.h> @@ -32,30 +46,39 @@ #include "flash.h" #include "hwaccess.h" -#if defined(__i386__) || defined(__x86_64__) +#if IS_X86 && IS_BSD +int io_fd; +#endif -/* sync primitive is not needed because x86 uses uncached accesses - * which have a strongly ordered memory model. +/* Prevent reordering and/or merging of reads/writes to hardware. + * Such reordering and/or merging would break device accesses which depend on the exact access order. */ static inline void sync_primitive(void) { -} - -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) -int io_fd; +/* This is needed only on PowerPC because... + * - x86 uses uncached accesses which have a strongly ordered memory model and + * - MIPS uses uncached accesses in mode 2 on /dev/mem which has also a strongly ordered memory model + * - ARM uses a strongly ordered memory model for device memories. + */ +#if IS_PPC + asm("eieio" : : : "memory"); #endif +} -int release_io_perms(void *p) +static int release_io_perms(void *p) { +#if IS_X86 #if defined(__DJGPP__) || defined(__LIBPAYLOAD__) -#else -#if defined (__sun) && (defined(__i386) || defined(__amd64)) + /* Nothing to release */ +#elif defined (__sun) sysi86(SI86V86, V86SC_IOPL, 0); -#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__) +#elif IS_BSD close(io_fd); -#else +#elif IS_LINUX iopl(0); #endif +#else +/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ #endif return 0; } @@ -63,81 +86,32 @@ /* Get I/O permissions with automatic permission release on shutdown. */ int rget_io_perms(void) { +#if IS_X86 #if defined(__DJGPP__) || defined(__LIBPAYLOAD__) /* We have full permissions by default. */ - return 0; -#else -#if defined (__sun) && (defined(__i386) || defined(__amd64)) +#elif defined (__sun) if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { -#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__) +#elif IS_BSD if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#else +#elif IS_LINUX if (iopl(3) != 0) { #endif msg_perr("ERROR: Could not get I/O privileges (%s).\n" "You need to be root.\n", strerror(errno)); #if defined (__OpenBSD__) - msg_perr("Please set securelevel=-1 in /etc/rc.securelevel " - "and reboot, or reboot into \n"); + msg_perr("Please set securelevel=-1 in /etc/rc.securelevel and reboot, or reboot into \n"); msg_perr("single user mode.\n"); #endif return 1; } else { register_shutdown(release_io_perms, NULL); } - return 0; +#else +/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */ #endif -} - -#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) - -static inline void sync_primitive(void) -{ - /* Prevent reordering and/or merging of reads/writes to hardware. - * Such reordering and/or merging would break device accesses which - * depend on the exact access order. - */ - ___asm___ volatile ("eieio" : : : "memory"); -} - -/* PCI port I/O is not yet implemented on PowerPC. */ -int rget_io_perms(void) -{ return 0; } -#elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips) - -/* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses - * in mode 2 which has a strongly ordered memory model. - */ -static inline void sync_primitive(void) -{ -} - -/* PCI port I/O is not yet implemented on MIPS. */ -int rget_io_perms(void) -{ - return 0; -} - -#elif defined (__arm__) - -static inline void sync_primitive(void) -{ -} - -int rget_io_perms(void) -{ - return 0; -} - -#else - -#error Unknown architecture - -#endif - void mmio_writeb(uint8_t val, void *addr) { *(volatile uint8_t *) addr = val;

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Re: [flashrom] [PATCH 0/4] SPI status registers.
by Stefan Tauner Dec. 29, 2012

Dec. 29, 2012

On Sun, 23 Sep 2012 16:54:53 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > Nuff said. > Well, the S33 naming might be no ideal, RFC. > > Stefan Tauner (4): > Improve SPI status register pretty printing. > Add a generic SPI block unprotect function. > Add support for Intel S33 series flash chips. > Add support for Atmel's AT25F series of SPI flash chips. > > Makefile | 4 +- > a25.c | 100 --------- > at25.c | 281 ------------------------- > chipdrivers.h | 50 +++-- > flash.h | 1 + > flashchips.c | 522 ++++++++++++++++++++++++++++++++++++++++++++-- > flashchips.h | 17 +- > spi.h | 8 +- > spi25.c | 298 ++------------------------ > spi25_statusreg.c | 601 +++++++++++++++++++++++++++++++++++++++++++++++++++++ > 10 files changed, 1169 insertions(+), 713 deletions(-) > delete mode 100644 a25.c > delete mode 100644 at25.c > create mode 100644 spi25_statusreg.c Self-acked and committed in r1634-r1637 with small improvements in 1/4. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1637 - trunk
by repository service Dec. 29, 2012

Dec. 29, 2012

Author: stefanct Date: Sat Dec 29 16:04:20 2012 New Revision: 1637 URL: http://flashrom.org/trac/flashrom/changeset/1637 Log: Add support for Atmel's AT25F series of SPI flash chips. This adds support for the following chips: - AT25F512, AT25F512A, AT25F512B - AT25F1024, AT25F1024A - AT25F2048 - AT25F4096 Besides the definitions of the the chips in flashchips.c this includes - a dedicated probing method (probe_spi_at25f) - pretty printing methods (spi_prettyprint_status_register_at25f*), and - unlocking methods (spi_disable_blockprotect_at25f*) Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/spi.h trunk/spi25.c trunk/spi25_statusreg.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Sat Dec 29 16:04:12 2012 (r1636) +++ trunk/chipdrivers.h Sat Dec 29 16:04:20 2012 (r1637) @@ -38,6 +38,7 @@ int probe_spi_rems(struct flashctx *flash); int probe_spi_res1(struct flashctx *flash); int probe_spi_res2(struct flashctx *flash); +int probe_spi_at25f(struct flashctx *flash); int spi_write_enable(struct flashctx *flash); int spi_write_disable(struct flashctx *flash); int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen); @@ -68,13 +69,19 @@ int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash); int spi_prettyprint_status_register_at25df(struct flashctx *flash); int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash); +int spi_prettyprint_status_register_at25f(struct flashctx *flash); +int spi_prettyprint_status_register_at25f512a(struct flashctx *flash); int spi_prettyprint_status_register_at25f512b(struct flashctx *flash); +int spi_prettyprint_status_register_at25f4096(struct flashctx *flash); int spi_prettyprint_status_register_at25fs010(struct flashctx *flash); int spi_prettyprint_status_register_at25fs040(struct flashctx *flash); int spi_prettyprint_status_register_at26df081a(struct flashctx *flash); int spi_disable_blockprotect_at25df(struct flashctx *flash); int spi_disable_blockprotect_at25df_sec(struct flashctx *flash); +int spi_disable_blockprotect_at25f(struct flashctx *flash); +int spi_disable_blockprotect_at25f512a(struct flashctx *flash); int spi_disable_blockprotect_at25f512b(struct flashctx *flash); +int spi_disable_blockprotect_at25f4096(struct flashctx *flash); int spi_disable_blockprotect_at25fs010(struct flashctx *flash); int spi_disable_blockprotect_at25fs040(struct flashctx *flash); int spi_prettyprint_status_register_s33(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Dec 29 16:04:12 2012 (r1636) +++ trunk/flashchips.c Sat Dec 29 16:04:20 2012 (r1637) @@ -1667,6 +1667,65 @@ { .vendor = "Atmel", + .name = "AT25F512", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F512, + .total_size = 64, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", + .name = "AT25F512A", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F512A, + .total_size = 64, + .page_size = 128, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f512a, + /* FIXME: It is not correct to use this one, because the BP1 bit is N/A. */ + .unlock = spi_disable_blockprotect_at25f512a, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", .name = "AT25F512B", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, @@ -1705,6 +1764,95 @@ .write = spi_chip_write_256, .read = spi_chip_read, .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", + /* The A suffix indicates 33MHz instead of 20MHz clock rate. + * All other properties seem to be the same.*/ + .name = "AT25F1024(A)", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F1024, + .total_size = 128, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", + .name = "AT25F2048", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F2048, + .total_size = 256, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Atmel", + .name = "AT25F4096", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F4096, + .total_size = 512, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f4096, + .unlock = spi_disable_blockprotect_at25f4096, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, }, { Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sat Dec 29 16:04:12 2012 (r1636) +++ trunk/flashchips.h Sat Dec 29 16:04:20 2012 (r1637) @@ -137,13 +137,12 @@ #define ATMEL_AT25DF321A 0x4701 #define ATMEL_AT25DF641 0x4800 #define ATMEL_AT25DQ161 0x8600 -#define ATMEL_AT25F512 /* No device ID found in datasheet. Vendor ID - * can be read with AT25F512A_RDID */ -#define ATMEL_AT25F512A 0x65 /* Needs AT25F512A_RDID */ +#define ATMEL_AT25F512 0x65 /* guessed, no device ID in datasheet. Needs AT25F_RDID */ +#define ATMEL_AT25F512A 0x65 /* Needs AT25F_RDID */ #define ATMEL_AT25F512B 0x6500 -#define ATMEL_AT25F1024 /* No device ID found in datasheet. Vendor ID - * can be read with AT25F512A_RDID */ -#define ATMEL_AT25F1024A 0x60 /* Needs AT25F512A_RDID */ +#define ATMEL_AT25F1024 0x60 /* Needs AT25F_RDID */ +#define ATMEL_AT25F2048 0x63 /* Needs AT25F_RDID */ +#define ATMEL_AT25F4096 0x64 /* Needs AT25F_RDID */ #define ATMEL_AT25FS010 0x6601 #define ATMEL_AT25FS040 0x6604 #define ATMEL_AT26DF041 0x4400 Modified: trunk/spi.h ============================================================================== --- trunk/spi.h Sat Dec 29 16:04:12 2012 (r1636) +++ trunk/spi.h Sat Dec 29 16:04:20 2012 (r1637) @@ -30,10 +30,10 @@ /* INSIZE may be 0x04 for some chips*/ #define JEDEC_RDID_INSIZE 0x03 -/* AT25F512A has bit 3 as don't care bit in commands */ -#define AT25F512A_RDID 0x15 /* 0x15 or 0x1d */ -#define AT25F512A_RDID_OUTSIZE 0x01 -#define AT25F512A_RDID_INSIZE 0x02 +/* Some Atmel AT25F* models have bit 3 as don't care bit in commands */ +#define AT25F_RDID 0x15 /* 0x15 or 0x1d */ +#define AT25F_RDID_OUTSIZE 0x01 +#define AT25F_RDID_INSIZE 0x02 /* Read Electronic Manufacturer Signature */ #define JEDEC_REMS 0x90 Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Sat Dec 29 16:04:12 2012 (r1636) +++ trunk/spi25.c Sat Dec 29 16:04:20 2012 (r1637) @@ -279,6 +279,28 @@ return 1; } +/* Only used for some Atmel chips. */ +int probe_spi_at25f(struct flashctx *flash) +{ + static const unsigned char cmd[AT25F_RDID_OUTSIZE] = { AT25F_RDID }; + unsigned char readarr[AT25F_RDID_INSIZE]; + uint32_t id1; + uint32_t id2; + + if (spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr)) + return 0; + + id1 = readarr[0]; + id2 = readarr[1]; + + msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); + + if (id1 == flash->chip->manufacture_id && id2 == flash->chip->model_id) + return 1; + + return 0; +} + int spi_chip_erase_60(struct flashctx *flash) { int result; Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Sat Dec 29 16:04:12 2012 (r1636) +++ trunk/spi25_statusreg.c Sat Dec 29 16:04:20 2012 (r1637) @@ -378,6 +378,40 @@ return spi_prettyprint_status_register_at25df(flash); } +/* used for AT25F512, AT25F1024(A), AT25F2048 */ +int spi_prettyprint_status_register_at25f(struct flashctx *flash) +{ + uint8_t status; + + status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_wpen(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bit(status, 4); + spi_prettyprint_status_register_bp(status, 1); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25f512a(struct flashctx *flash) +{ + uint8_t status; + + status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_wpen(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bit(status, 4); + spi_prettyprint_status_register_bit(status, 3); + spi_prettyprint_status_register_bp(status, 0); + spi_prettyprint_status_register_welwip(status); + return 0; +} + int spi_prettyprint_status_register_at25f512b(struct flashctx *flash) { uint8_t status = spi_read_status_register(flash); @@ -392,6 +426,21 @@ return 0; } +int spi_prettyprint_status_register_at25f4096(struct flashctx *flash) +{ + uint8_t status; + + status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_wpen(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bp(status, 2); + spi_prettyprint_status_register_welwip(status); + return 0; +} + int spi_prettyprint_status_register_at25fs010(struct flashctx *flash) { uint8_t status = spi_read_status_register(flash); @@ -450,6 +499,16 @@ return spi_disable_blockprotect_at25df(flash); } +int spi_disable_blockprotect_at25f(struct flashctx *flash) +{ + return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0); +} + +int spi_disable_blockprotect_at25f512a(struct flashctx *flash) +{ + return spi_disable_blockprotect_generic(flash, 0x04, 1 << 7, 0); +} + int spi_disable_blockprotect_at25f512b(struct flashctx *flash) { /* spi_disable_blockprotect_at25df is not really the right way to do @@ -458,6 +517,11 @@ return spi_disable_blockprotect_at25df(flash); } +int spi_disable_blockprotect_at25f4096(struct flashctx *flash) +{ + return spi_disable_blockprotect_generic(flash, 0x1C, 1 << 7, 0); +} + int spi_disable_blockprotect_at25fs010(struct flashctx *flash) { return spi_disable_blockprotect_generic(flash, 0x6C, 1 << 7, 0);

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[commit] r1636 - trunk
by repository service Dec. 29, 2012

Dec. 29, 2012

Author: stefanct Date: Sat Dec 29 16:04:12 2012 New Revision: 1636 URL: http://flashrom.org/trac/flashrom/changeset/1636 Log: Add support for Intel S33 series flash chips. This includes: Bottom boot block: * 16Mb/2MB: QB25F160S33B8, QB25F016S33B8, QH25F160S33B8, QH25F016S33B8 * 32Mb/4MB: QB25F320S33B8, QH25F320S33B8 * 64Mb/8MB: QB25F640S33B8, QH25F640S33B8 Top boot block: * 16Mb/2MB: QB25F160S33T8, QB25F016S33T8, QH25F160S33T8, QH25F016S33T8 * 32Mb/4MB: QB25F320S33T8, QH25F320S33T8 * 64Mb/8MB: QB25F640S33T8, QH25F640S33T8 At least some seem to be marketed by other vendors (too?) but also with Intel's vendor ID. Besides a 0xC7 chip erase and a 0xD8 uniform 64kB block erase they support also erasing the top/bottom 8 8kB blocks with opcode 0x40. But since this command fails for all addresses outside those ranges, it is not easily implemented with flashrom's current code base and hence left out. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/spi25_statusreg.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Sat Dec 29 16:04:05 2012 (r1635) +++ trunk/chipdrivers.h Sat Dec 29 16:04:12 2012 (r1636) @@ -77,6 +77,8 @@ int spi_disable_blockprotect_at25f512b(struct flashctx *flash); int spi_disable_blockprotect_at25fs010(struct flashctx *flash); int spi_disable_blockprotect_at25fs040(struct flashctx *flash); +int spi_prettyprint_status_register_s33(struct flashctx *flash); +int spi_disable_blockprotect_s33(struct flashctx *flash); int spi_prettyprint_status_register_sst25(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Dec 29 16:04:05 2012 (r1635) +++ trunk/flashchips.c Sat Dec 29 16:04:12 2012 (r1636) @@ -4422,6 +4422,240 @@ { .vendor = "Intel", + .name = "25F160S33B8", + .bustype = BUS_SPI, + .manufacture_id = INTEL_ID, + .model_id = INTEL_25F160S33B8, + .total_size = 2048, + .page_size = 256, + /* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + /* This chip supports erasing of the 8 so-called "parameter blocks" with + * opcode 0x40. Trying to access an address outside these 8 8kB blocks does + * have no effect on the memory contents, but sets a flag in the SR. + .eraseblocks = { + {8 * 1024, 8}, + {64 * 1024, 31} // inaccessible + }, + .block_erase = spi_block_erase_40, + }, { */ + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_s33, + .unlock = spi_disable_blockprotect_s33, + .write = spi_chip_write_256, + .read = spi_chip_read, /* also fast read 0x0B */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Intel", + .name = "25F160S33T8", + .bustype = BUS_SPI, + .manufacture_id = INTEL_ID, + .model_id = INTEL_25F160S33T8, + .total_size = 2048, + .page_size = 256, + /* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + /* This chip supports erasing of the 8 so-called "parameter blocks" with + * opcode 0x40. Trying to access an address outside these 8 8kB blocks does + * have no effect on the memory contents, but sets a flag in the SR. + .eraseblocks = { + {64 * 1024, 31}, // inaccessible + {8 * 1024, 8} + }, + .block_erase = spi_block_erase_40, + }, { */ + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_s33, + .unlock = spi_disable_blockprotect_s33, + .write = spi_chip_write_256, + .read = spi_chip_read, /* also fast read 0x0B */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Intel", + .name = "25F320S33B8", + .bustype = BUS_SPI, + .manufacture_id = INTEL_ID, + .model_id = INTEL_25F320S33B8, + .total_size = 4096, + .page_size = 256, + /* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + /* This chip supports erasing of the 8 so-called "parameter blocks" with + * opcode 0x40. Trying to access an address outside these 8 8kB blocks does + * have no effect on the memory contents, but sets a flag in the SR. + .eraseblocks = { + {8 * 1024, 8}, + {64 * 1024, 63} // inaccessible + }, + .block_erase = spi_block_erase_40, + }, { */ + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_s33, + .unlock = spi_disable_blockprotect_s33, + .write = spi_chip_write_256, + .read = spi_chip_read, /* also fast read 0x0B */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Intel", + .name = "25F320S33T8", + .bustype = BUS_SPI, + .manufacture_id = INTEL_ID, + .model_id = INTEL_25F320S33T8, + .total_size = 4096, + .page_size = 256, + /* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + /* This chip supports erasing of the 8 so-called "parameter blocks" with + * opcode 0x40. Trying to access an address outside these 8 8kB blocks does + * have no effect on the memory contents, but sets a flag in the SR. + .eraseblocks = { + {64 * 1024, 63}, // inaccessible + {8 * 1024, 8} + }, + .block_erase = spi_block_erase_40, + }, { */ + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_s33, + .unlock = spi_disable_blockprotect_s33, + .write = spi_chip_write_256, + .read = spi_chip_read, /* also fast read 0x0B */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Intel", + .name = "25F640S33B8", + .bustype = BUS_SPI, + .manufacture_id = INTEL_ID, + .model_id = INTEL_25F640S33B8, + .total_size = 8192, + .page_size = 256, + /* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + /* This chip supports erasing of the 8 so-called "parameter blocks" with + * opcode 0x40. Trying to access an address outside these 8 8kB blocks does + * have no effect on the memory contents, but sets a flag in the SR. + .eraseblocks = { + {8 * 1024, 8}, + {64 * 1024, 127} // inaccessible + }, + .block_erase = spi_block_erase_40, + }, { */ + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_s33, + .unlock = spi_disable_blockprotect_s33, + .write = spi_chip_write_256, + .read = spi_chip_read, /* also fast read 0x0B */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Intel", + .name = "25F640S33T8", + .bustype = BUS_SPI, + .manufacture_id = INTEL_ID, + .model_id = INTEL_25F640S33T8, + .total_size = 8192, + .page_size = 256, + /* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + /* This chip supports erasing of the 8 so-called "parameter blocks" with + * opcode 0x40. Trying to access an address outside these 8 8kB blocks does + * have no effect on the memory contents, but sets a flag in the SR. + .eraseblocks = { + {64 * 1024, 127}, // inaccessible + {8 * 1024, 8} + }, + .block_erase = spi_block_erase_40, + }, { */ + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_s33, + .unlock = spi_disable_blockprotect_s33, + .write = spi_chip_write_256, + .read = spi_chip_read, /* also fast read 0x0B */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Intel", .name = "28F001BN/BX-B", .bustype = BUS_PARALLEL, .manufacture_id = INTEL_ID, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sat Dec 29 16:04:05 2012 (r1635) +++ trunk/flashchips.h Sat Dec 29 16:04:12 2012 (r1636) @@ -364,6 +364,12 @@ #define INTEL_28F008B3B 0xD3 /* 28F008B3-B */ #define INTEL_28F004B3T 0xD4 /* 28F004B3-T */ #define INTEL_28F004B3B 0xD5 /* 28F004B3-B */ +#define INTEL_25F160S33B8 0x8911 /* Same as 25F016S33B8 */ +#define INTEL_25F320S33B8 0x8912 +#define INTEL_25F640S33B8 0x8913 +#define INTEL_25F160S33T8 0x8915 /* Same as 25F016S33T8 */ +#define INTEL_25F320S33T8 0x8916 +#define INTEL_25F640S33T8 0x8917 #define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */ #define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */ Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Sat Dec 29 16:04:05 2012 (r1635) +++ trunk/spi25_statusreg.c Sat Dec 29 16:04:12 2012 (r1636) @@ -468,6 +468,29 @@ return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0); } +/* === Intel === */ + +/* TODO: Clear P_FAIL and E_FAIL with Clear SR Fail Flags Command (30h) here? */ +int spi_disable_blockprotect_s33(struct flashctx *flash) +{ + return spi_disable_blockprotect_generic(flash, 0x1C, 1 << 7, 0); +} + +int spi_prettyprint_status_register_s33(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + msg_cdbg("Chip status register is %02x\n", status); + + spi_prettyprint_status_register_srwd(status); + msg_cdbg("Chip status register: Program Fail Flag (P_FAIL) is %sset\n", + (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Erase Fail Flag (E_FAIL) is %sset\n", + (status & (1 << 5)) ? "" : "not "); + spi_prettyprint_status_register_bp(status, 2); + spi_prettyprint_status_register_welwip(status); + return 0; +} + /* === SST === */ static void spi_prettyprint_status_register_sst25_common(uint8_t status)

1 0

[commit] r1635 - trunk
by repository service Dec. 29, 2012

Dec. 29, 2012

Author: stefanct Date: Sat Dec 29 16:04:05 2012 New Revision: 1635 URL: http://flashrom.org/trac/flashrom/changeset/1635 Log: Add a generic SPI block unprotect function. This does not only remove a huge pile of duplicate code, it does also fix a bug in spi_disable_blockprotect_at25df(), which is also a good example why duplicated code is a bad idea. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/spi25_statusreg.c Modified: trunk/spi25_statusreg.c ============================================================================== --- trunk/spi25_statusreg.c Sat Dec 29 16:03:51 2012 (r1634) +++ trunk/spi25_statusreg.c Sat Dec 29 16:04:05 2012 (r1635) @@ -123,35 +123,61 @@ return readarr[0]; } -/* A generic brute-force block protection disable works like this: - * Write 0x00 to the status register. Check if any locks are still set (that - * part is chip specific). Repeat once. +/* A generic block protection disable. + * Tests if a protection is enabled with the block protection mask (bp_mask) and returns success otherwise. + * Tests if the register bits are locked with the lock_mask (lock_mask). + * Tests if a hardware protection is active (i.e. low) with the write protection mask (wp_mask) and bails out + * in that case. + * Finally tries to disable engaged protections and checks if any locks are still set. */ -int spi_disable_blockprotect(struct flashctx *flash) +static int spi_disable_blockprotect_generic(struct flashctx *flash, uint8_t bp_mask, uint8_t lock_mask, uint8_t wp_mask) { uint8_t status; int result; status = spi_read_status_register(flash); - /* If block protection is disabled, stop here. */ - if ((status & 0x3c) == 0) + if ((status & bp_mask) == 0) { + msg_cdbg2("Block protection is disabled.\n"); return 0; + } msg_cdbg("Some block protection in effect, disabling... "); - result = spi_write_status_register(flash, status & ~0x3c); + if ((status & lock_mask) != 0) { + msg_cdbg("\n\tNeed to disable the register lock first... "); + if (wp_mask != 0 && (status & wp_mask) == 0) { + msg_cerr("Hardware protection is active, disabling write protection is impossible.\n"); + return 1; + } + /* All bits except the register lock bit (often called SPRL, SRWD, WPEN) are readonly. */ + result = spi_write_status_register(flash, status & ~lock_mask); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + msg_cdbg("done.\n"); + } + /* Global unprotect. Make sure to mask the register lock bit as well. */ + result = spi_write_status_register(flash, status & ~(bp_mask | lock_mask)); if (result) { msg_cerr("spi_write_status_register failed.\n"); return result; } status = spi_read_status_register(flash); - if ((status & 0x3c) != 0) { + if ((status & bp_mask) != 0) { msg_cerr("Block protection could not be disabled!\n"); return 1; } - msg_cdbg("done.\n"); + msg_cdbg("disabled.\n"); return 0; } +/* A common block protection disable that tries to unset the status register bits masked by 0x3C. */ +int spi_disable_blockprotect(struct flashctx *flash) +{ + return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0); +} + + static void spi_prettyprint_status_register_hex(uint8_t status) { msg_cdbg("Chip status register is 0x%02x.\n", status); @@ -414,43 +440,7 @@ int spi_disable_blockprotect_at25df(struct flashctx *flash) { - uint8_t status; - int result; - - status = spi_read_status_register(flash); - /* If block protection is disabled, stop here. */ - if ((status & (3 << 2)) == 0) - return 0; - - msg_cdbg("Some block protection in effect, disabling... "); - if (status & (1 << 7)) { - msg_cdbg("Need to disable Sector Protection Register Lock\n"); - if ((status & (1 << 4)) == 0) { - msg_cerr("WP# pin is active, disabling " - "write protection is impossible.\n"); - return 1; - } - /* All bits except bit 7 (SPRL) are readonly. */ - result = spi_write_status_register(flash, status & ~(1 << 7)); - if (result) { - msg_cerr("spi_write_status_register failed.\n"); - return result; - } - - } - /* Global unprotect. Make sure to mask SPRL as well. */ - result = spi_write_status_register(flash, status & ~0xbc); - if (result) { - msg_cerr("spi_write_status_register failed.\n"); - return result; - } - status = spi_read_status_register(flash); - if ((status & (3 << 2)) != 0) { - msg_cerr("Block protection could not be disabled!\n"); - return 1; - } - msg_cdbg("done.\n"); - return 0; + return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 1 << 4); } int spi_disable_blockprotect_at25df_sec(struct flashctx *flash) @@ -470,72 +460,12 @@ int spi_disable_blockprotect_at25fs010(struct flashctx *flash) { - uint8_t status; - int result; - - status = spi_read_status_register(flash); - /* If block protection is disabled, stop here. */ - if ((status & 0x6c) == 0) - return 0; - - msg_cdbg("Some block protection in effect, disabling... "); - if (status & (1 << 7)) { - msg_cdbg("Need to disable Status Register Write Protect\n"); - /* Clear bit 7 (WPEN). */ - result = spi_write_status_register(flash, status & ~(1 << 7)); - if (result) { - msg_cerr("spi_write_status_register failed.\n"); - return result; - } - } - /* Global unprotect. Make sure to mask WPEN as well. */ - result = spi_write_status_register(flash, status & ~0xec); - if (result) { - msg_cerr("spi_write_status_register failed.\n"); - return result; - } - status = spi_read_status_register(flash); - if ((status & 0x6c) != 0) { - msg_cerr("Block protection could not be disabled!\n"); - return 1; - } - msg_cdbg("done.\n"); - return 0; -} + return spi_disable_blockprotect_generic(flash, 0x6C, 1 << 7, 0); + } int spi_disable_blockprotect_at25fs040(struct flashctx *flash) { - uint8_t status; - int result; - - status = spi_read_status_register(flash); - /* If block protection is disabled, stop here. */ - if ((status & 0x7c) == 0) - return 0; - - msg_cdbg("Some block protection in effect, disabling... "); - if (status & (1 << 7)) { - msg_cdbg("Need to disable Status Register Write Protect\n"); - /* Clear bit 7 (WPEN). */ - result = spi_write_status_register(flash, status & ~(1 << 7)); - if (result) { - msg_cerr("spi_write_status_register failed.\n"); - return result; - } - } - /* Global unprotect. Make sure to mask WPEN as well. */ - result = spi_write_status_register(flash, status & ~0xfc); - if (result) { - msg_cerr("spi_write_status_register failed.\n"); - return result; - } - status = spi_read_status_register(flash); - if ((status & 0x7c) != 0) { - msg_cerr("Block protection could not be disabled!\n"); - return 1; - } - msg_cdbg("done.\n"); - return 0; + return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0); } /* === SST === */

1 0

[commit] r1634 - trunk
by repository service Dec. 29, 2012

Dec. 29, 2012

Author: stefanct Date: Sat Dec 29 16:03:51 2012 New Revision: 1634 URL: http://flashrom.org/trac/flashrom/changeset/1634 Log: Improve SPI status register pretty printing. - Move all functions related to SPI status registers to a new file spi25_statusreg.c. This includes the generic as well as the SST-specific functions from spi25.c and the chip-specific functions from a25.c and at25.c. - introduce helper functions * spi_prettyprint_status_register_hex() * spi_prettyprint_status_register_bpl() * spi_prettyprint_status_register_plain() Use the latter on every compatible flash chip that has no better printlock function set and get rid of the implicit pretty printing in the SPI probing functions. - remove * spi_prettyprint_status_register_common() * spi_prettyprint_status_register_amic_a25lq032() because it can be fully substituted with spi_prettyprint_status_register_amic_a25l032(). * spi_prettyprint_status_register() (old switch, no longer needed) - promote and export * spi_prettyprint_status_register_amic_a25l05p() as spi_prettyprint_status_register_default_bp1(). * spi_prettyprint_status_register_amic_a25l40p() as spi_prettyprint_status_register_default_bp2(). * spi_prettyprint_status_register_st_m25p() as spi_prettyprint_status_register_default_bp3(). - add #define TEST_BAD_REW and use it for a number of Atmel chips which had only TEST_BAD_READ set even though they dont have erasers or a write function set. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Added: trunk/spi25_statusreg.c (contents, props changed) Deleted: trunk/a25.c trunk/at25.c Modified: trunk/Makefile trunk/chipdrivers.h trunk/flash.h trunk/flashchips.c trunk/spi25.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Dec 27 19:40:40 2012 (r1633) +++ trunk/Makefile Sat Dec 29 16:03:51 2012 (r1634) @@ -296,8 +296,8 @@ CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ - sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o \ - a25.o at25.o opaque.o sfdp.o en29lv640b.o + sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ + opaque.o sfdp.o en29lv640b.o ############################################################################### # Library code. Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Thu Dec 27 19:40:40 2012 (r1633) +++ trunk/chipdrivers.h Sat Dec 29 16:03:51 2012 (r1634) @@ -51,47 +51,44 @@ int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -uint8_t spi_read_status_register(struct flashctx *flash); -int spi_write_status_register(struct flashctx *flash, int status); -void spi_prettyprint_status_register_bit(uint8_t status, int bit); -void spi_prettyprint_status_register_bp(uint8_t status, int bp); -void spi_prettyprint_status_register_srwd(uint8_t status); -void spi_prettyprint_status_register_welwip(uint8_t status); -int spi_prettyprint_status_register(struct flashctx *flash); -int spi_disable_blockprotect(struct flashctx *flash); int spi_byte_program(struct flashctx *flash, unsigned int addr, uint8_t databyte); int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); -/* sfdp.c */ -int probe_spi_sfdp(struct flashctx *flash); - -/* opaque.c */ -int probe_opaque(struct flashctx *flash); -int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); - -/* a25.c */ -int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash); -int spi_prettyprint_status_register_amic_a25l40p(struct flashctx *flash); +/* spi25_statusreg.c */ +uint8_t spi_read_status_register(struct flashctx *flash); +int spi_write_status_register(struct flashctx *flash, int status); +int spi_prettyprint_status_register_plain(struct flashctx *flash); +int spi_prettyprint_status_register_default_bp1(struct flashctx *flash); +int spi_prettyprint_status_register_default_bp2(struct flashctx *flash); +int spi_prettyprint_status_register_default_bp3(struct flashctx *flash); +int spi_disable_blockprotect(struct flashctx *flash); int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash); -int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash); - -/* at25.c */ int spi_prettyprint_status_register_at25df(struct flashctx *flash); int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash); int spi_prettyprint_status_register_at25f512b(struct flashctx *flash); int spi_prettyprint_status_register_at25fs010(struct flashctx *flash); int spi_prettyprint_status_register_at25fs040(struct flashctx *flash); -int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash); +int spi_prettyprint_status_register_at26df081a(struct flashctx *flash); int spi_disable_blockprotect_at25df(struct flashctx *flash); int spi_disable_blockprotect_at25df_sec(struct flashctx *flash); int spi_disable_blockprotect_at25f512b(struct flashctx *flash); int spi_disable_blockprotect_at25fs010(struct flashctx *flash); int spi_disable_blockprotect_at25fs040(struct flashctx *flash); +int spi_prettyprint_status_register_sst25(struct flashctx *flash); +int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash); +int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash); + +/* sfdp.c */ +int probe_spi_sfdp(struct flashctx *flash); + +/* opaque.c */ +int probe_opaque(struct flashctx *flash); +int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); /* 82802ab.c */ uint8_t wait_82802ab(struct flashctx *flash); Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Thu Dec 27 19:40:40 2012 (r1633) +++ trunk/flash.h Sat Dec 29 16:03:51 2012 (r1634) @@ -188,6 +188,7 @@ #define TEST_BAD_READ (1 << 5) #define TEST_BAD_ERASE (1 << 6) #define TEST_BAD_WRITE (1 << 7) +#define TEST_BAD_REW (TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE) #define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE) #define TEST_BAD_MASK 0xf0 Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Thu Dec 27 19:40:40 2012 (r1633) +++ trunk/flashchips.c Sat Dec 29 16:03:51 2012 (r1634) @@ -564,7 +564,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -598,7 +598,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -633,7 +633,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -668,7 +668,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -703,7 +703,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -738,7 +738,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l05p, + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -778,7 +778,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -813,7 +813,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -848,7 +848,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -886,7 +886,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -924,7 +924,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -956,7 +956,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -988,7 +988,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1020,7 +1020,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1052,7 +1052,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1084,7 +1084,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1116,7 +1116,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25l40p, + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1194,7 +1194,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_amic_a25lq032, + .printlock = spi_prettyprint_status_register_amic_a25l032, .unlock = NULL, /* Two status reg bytes (read with 0x35 and 0x05) */ .write = spi_chip_write_256, .read = spi_chip_read, @@ -1810,7 +1810,9 @@ .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_20, } - }, /* Supports also an incompatible page write (of exactly 256 B) and an auto-erasing write. */ + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + /* Supports also an incompatible page write (of exactly 256 B) and an auto-erasing write. */ .write = spi_chip_write_1, .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, /* 3.0-3.6V for higher speed, 2.7-3.6V normal */ @@ -1847,7 +1849,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_atmel_at26df081a, + .printlock = spi_prettyprint_status_register_at26df081a, .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1923,7 +1925,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_atmel_at26df081a, + .printlock = spi_prettyprint_status_register_at26df081a, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1943,7 +1945,7 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .printlock = spi_prettyprint_status_register_atmel_at26df081a, + .printlock = spi_prettyprint_status_register_at26df081a, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -1957,7 +1959,7 @@ .model_id = ATMEL_AT26F004, .total_size = 512, .page_size = 256, - .tested = TEST_UNTESTED, + .tested = TEST_BAD_WRITE, .feature_bits = FEATURE_WRSR_WREN, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1980,6 +1982,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .write = NULL /* Incompatible Page write */, .read = spi_chip_read, .voltage = {2700, 3600}, @@ -2090,7 +2093,7 @@ .total_size = 16896 /* No power of two sizes */, .page_size = 1056 /* No power of two sizes */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL /* Incompatible Page write */, @@ -2107,7 +2110,7 @@ .total_size = 128 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2124,7 +2127,7 @@ .total_size = 256 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2141,7 +2144,7 @@ .total_size = 512 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2158,7 +2161,7 @@ .total_size = 1024 /* Size can only be determined from status register */, .page_size = 256 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2175,7 +2178,7 @@ .total_size = 2048 /* Size can only be determined from status register */, .page_size = 512 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2192,7 +2195,7 @@ .total_size = 4224 /* No power of two sizes */, .page_size = 528 /* No power of two sizes */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2211,7 +2214,7 @@ /* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */ /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ .feature_bits = FEATURE_OTP, - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2228,7 +2231,7 @@ .total_size = 8192 /* Size can only be determined from status register */, .page_size = 1024 /* Size can only be determined from status register */, /* does not support EWSR nor WREN and has no writable status register bits whatsoever */ - .tested = TEST_BAD_READ, + .tested = TEST_BAD_REW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .write = NULL, @@ -2621,6 +2624,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, @@ -2654,6 +2658,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2687,6 +2692,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2720,6 +2726,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2753,6 +2760,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2787,6 +2795,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2821,6 +2830,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2855,6 +2865,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2889,6 +2900,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2923,6 +2935,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2957,6 +2970,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -2991,6 +3005,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3025,6 +3040,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3059,6 +3075,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3093,6 +3110,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3127,6 +3145,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3161,6 +3180,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3198,6 +3218,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3235,6 +3256,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3272,6 +3294,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3306,6 +3329,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3340,6 +3364,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3374,6 +3399,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3408,6 +3434,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3442,6 +3469,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3477,6 +3505,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3512,6 +3541,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3553,6 +3583,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3588,6 +3619,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3623,6 +3655,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3658,6 +3691,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3693,6 +3727,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -3729,6 +3764,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4017,6 +4053,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4054,6 +4091,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4092,6 +4130,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4130,6 +4169,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4168,6 +4208,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4206,6 +4247,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4243,6 +4285,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4279,6 +4322,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4671,6 +4715,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp1, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4705,6 +4750,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4742,6 +4788,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4779,6 +4826,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4816,6 +4864,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4853,6 +4902,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4887,6 +4937,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4921,6 +4972,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4955,6 +5007,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -4989,6 +5042,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5023,6 +5077,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5057,6 +5112,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5461,6 +5517,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5492,6 +5549,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5523,6 +5581,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5554,6 +5613,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5585,6 +5645,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5753,6 +5814,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ @@ -5784,6 +5846,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5821,6 +5884,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5852,6 +5916,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5883,6 +5948,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5920,6 +5986,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5951,6 +6018,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6224,6 +6292,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6314,6 +6383,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6342,6 +6412,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6370,6 +6441,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6398,6 +6470,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6426,6 +6499,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6457,6 +6531,7 @@ .block_erase = spi_block_erase_60, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ .read = spi_chip_read, @@ -6488,6 +6563,7 @@ .block_erase = spi_block_erase_60, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ .read = spi_chip_read, @@ -6519,6 +6595,7 @@ .block_erase = spi_block_erase_60, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, @@ -6556,6 +6633,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25vf016, .unlock = spi_disable_blockprotect, .write = spi_aai_write, .read = spi_chip_read, @@ -6593,6 +6671,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_aai_write, .read = spi_chip_read, @@ -6630,6 +6709,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -6661,6 +6741,7 @@ .block_erase = spi_block_erase_60, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ .read = spi_chip_read, @@ -6698,6 +6779,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25vf040b, .unlock = spi_disable_blockprotect, .write = spi_aai_write, .read = spi_chip_read, @@ -6735,6 +6817,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25vf040b, .unlock = spi_disable_blockprotect, .write = spi_aai_write, .read = spi_chip_read, @@ -6772,6 +6855,7 @@ .block_erase = spi_block_erase_c7, }, }, + .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_aai_write, .read = spi_chip_read, @@ -7726,6 +7810,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7759,6 +7844,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, @@ -7787,6 +7873,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7816,6 +7903,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, @@ -7844,6 +7932,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7872,6 +7961,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7900,6 +7990,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7927,6 +8018,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7955,6 +8047,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -7983,6 +8076,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8011,6 +8105,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8039,6 +8134,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8071,6 +8167,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8101,6 +8198,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8132,6 +8230,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8949,6 +9048,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -8987,6 +9087,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9025,6 +9126,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9063,6 +9165,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9100,6 +9203,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9130,6 +9234,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9161,6 +9266,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9192,6 +9298,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9223,6 +9330,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9260,6 +9368,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9297,6 +9406,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -9334,6 +9444,7 @@ .block_erase = spi_block_erase_c7, } }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Thu Dec 27 19:40:40 2012 (r1633) +++ trunk/spi25.c Sat Dec 29 16:03:51 2012 (r1634) @@ -148,14 +148,8 @@ msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); - if (id1 == chip->manufacture_id && id2 == chip->model_id) { - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - + if (id1 == chip->manufacture_id && id2 == chip->model_id) return 1; - } /* Test if this is a pure vendor match. */ if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) @@ -210,14 +204,8 @@ msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); - if (id1 == chip->manufacture_id && id2 == chip->model_id) { - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - + if (id1 == chip->manufacture_id && id2 == chip->model_id) return 1; - } /* Test if this is a pure vendor match. */ if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id) @@ -268,10 +256,6 @@ if (id2 != flash->chip->model_id) return 0; - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); return 1; } @@ -292,168 +276,9 @@ if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id) return 0; - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); return 1; } -uint8_t spi_read_status_register(struct flashctx *flash) -{ - static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR }; - /* FIXME: No workarounds for driver/hardware bugs in generic code. */ - unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */ - int ret; - - /* Read Status Register */ - ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, - readarr); - if (ret) - msg_cerr("RDSR failed!\n"); - - return readarr[0]; -} - -/* Common highest bit: Status Register Write Disable (SRWD). */ -void spi_prettyprint_status_register_srwd(uint8_t status) -{ - msg_cdbg("Chip status register: Status Register Write Disable (SRWD) is %sset\n", - (status & (1 << 7)) ? "" : "not "); -} - -void spi_prettyprint_status_register_welwip(uint8_t status) -{ - msg_cdbg("Chip status register: Write Enable Latch (WEL) is " - "%sset\n", (status & (1 << 1)) ? "" : "not "); - msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is " - "%sset\n", (status & (1 << 0)) ? "" : "not "); -} - -/* Prettyprint the status register. Common definitions. */ -void spi_prettyprint_status_register_bp(uint8_t status, int bp) -{ - switch (bp) { - /* Fall through. */ - case 4: - msg_cdbg("Chip status register: Block Protect 4 (BP4) " - "is %sset\n", (status & (1 << 5)) ? "" : "not "); - case 3: - msg_cdbg("Chip status register: Block Protect 3 (BP3) " - "is %sset\n", (status & (1 << 5)) ? "" : "not "); - case 2: - msg_cdbg("Chip status register: Block Protect 2 (BP2) " - "is %sset\n", (status & (1 << 4)) ? "" : "not "); - case 1: - msg_cdbg("Chip status register: Block Protect 1 (BP1) " - "is %sset\n", (status & (1 << 3)) ? "" : "not "); - case 0: - msg_cdbg("Chip status register: Block Protect 0 (BP0) " - "is %sset\n", (status & (1 << 2)) ? "" : "not "); - } -} - -/* Prettyprint the status register. Unnamed bits. */ -void spi_prettyprint_status_register_bit(uint8_t status, int bit) -{ - msg_cdbg("Chip status register: Bit %i " - "is %sset\n", bit, (status & (1 << bit)) ? "" : "not "); -} - -static void spi_prettyprint_status_register_common(uint8_t status) -{ - spi_prettyprint_status_register_bp(status, 3); - spi_prettyprint_status_register_welwip(status); -} - -/* Prettyprint the status register. Works for - * ST M25P series - * MX MX25L series - */ -void spi_prettyprint_status_register_st_m25p(uint8_t status) -{ - spi_prettyprint_status_register_srwd(status); - spi_prettyprint_status_register_bit(status, 6); - spi_prettyprint_status_register_common(status); -} - -void spi_prettyprint_status_register_sst25(uint8_t status) -{ - msg_cdbg("Chip status register: Block Protect Write Disable " - "(BPL) is %sset\n", (status & (1 << 7)) ? "" : "not "); - msg_cdbg("Chip status register: Auto Address Increment Programming " - "(AAI) is %sset\n", (status & (1 << 6)) ? "" : "not "); - spi_prettyprint_status_register_common(status); -} - -/* Prettyprint the status register. Works for - * SST 25VF016 - */ -void spi_prettyprint_status_register_sst25vf016(uint8_t status) -{ - static const char *const bpt[] = { - "none", - "1F0000H-1FFFFFH", - "1E0000H-1FFFFFH", - "1C0000H-1FFFFFH", - "180000H-1FFFFFH", - "100000H-1FFFFFH", - "all", "all" - }; - spi_prettyprint_status_register_sst25(status); - msg_cdbg("Resulting block protection : %s\n", - bpt[(status & 0x1c) >> 2]); -} - -void spi_prettyprint_status_register_sst25vf040b(uint8_t status) -{ - static const char *const bpt[] = { - "none", - "0x70000-0x7ffff", - "0x60000-0x7ffff", - "0x40000-0x7ffff", - "all blocks", "all blocks", "all blocks", "all blocks" - }; - spi_prettyprint_status_register_sst25(status); - msg_cdbg("Resulting block protection : %s\n", - bpt[(status & 0x1c) >> 2]); -} - -int spi_prettyprint_status_register(struct flashctx *flash) -{ - const struct flashchip *chip = flash->chip; - uint8_t status; - - status = spi_read_status_register(flash); - msg_cdbg("Chip status register is %02x\n", status); - switch (chip->manufacture_id) { - case ST_ID: - if (((chip->model_id & 0xff00) == 0x2000) || - ((chip->model_id & 0xff00) == 0x2500)) - spi_prettyprint_status_register_st_m25p(status); - break; - case MACRONIX_ID: - if ((chip->model_id & 0xff00) == 0x2000) - spi_prettyprint_status_register_st_m25p(status); - break; - case SST_ID: - switch (chip->model_id) { - case 0x2541: - spi_prettyprint_status_register_sst25vf016(status); - break; - case 0x8d: - case 0x258d: - spi_prettyprint_status_register_sst25vf040b(status); - break; - default: - spi_prettyprint_status_register_sst25(status); - break; - } - break; - } - return 0; -} - int spi_chip_erase_60(struct flashctx *flash) { int result; @@ -879,92 +704,6 @@ } } -int spi_write_status_enable(struct flashctx *flash) -{ - static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; - int result; - - /* Send EWSR (Enable Write Status Register). */ - result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); - - if (result) - msg_cerr("%s failed\n", __func__); - - return result; -} - -/* - * This is according the SST25VF016 datasheet, who knows it is more - * generic that this... - */ -static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode) -{ - int result; - int i = 0; - /* - * WRSR requires either EWSR or WREN depending on chip type. - * The code below relies on the fact hat EWSR and WREN have the same - * INSIZE and OUTSIZE. - */ - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ enable_opcode }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_WRSR_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution\n", __func__); - /* No point in waiting for the command to complete if execution - * failed. - */ - return result; - } - /* WRSR performs a self-timed erase before the changes take effect. - * This may take 50-85 ms in most cases, and some chips apparently - * allow running RDSR only once. Therefore pick an initial delay of - * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. - */ - programmer_delay(100 * 1000); - while (spi_read_status_register(flash) & SPI_SR_WIP) { - if (++i > 490) { - msg_cerr("Error: WIP bit after WRSR never cleared\n"); - return TIMEOUT_ERROR; - } - programmer_delay(10 * 1000); - } - return 0; -} - -int spi_write_status_register(struct flashctx *flash, int status) -{ - int feature_bits = flash->chip->feature_bits; - int ret = 1; - - if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { - msg_cdbg("Missing status register write definition, assuming " - "EWSR is needed\n"); - feature_bits |= FEATURE_WRSR_EWSR; - } - if (feature_bits & FEATURE_WRSR_WREN) - ret = spi_write_status_register_flag(flash, status, JEDEC_WREN); - if (ret && (feature_bits & FEATURE_WRSR_EWSR)) - ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR); - return ret; -} - int spi_byte_program(struct flashctx *flash, unsigned int addr, uint8_t databyte) { @@ -1049,35 +788,6 @@ return result; } -/* A generic brute-force block protection disable works like this: - * Write 0x00 to the status register. Check if any locks are still set (that - * part is chip specific). Repeat once. - */ -int spi_disable_blockprotect(struct flashctx *flash) -{ - uint8_t status; - int result; - - status = spi_read_status_register(flash); - /* If block protection is disabled, stop here. */ - if ((status & 0x3c) == 0) - return 0; - - msg_cdbg("Some block protection in effect, disabling... "); - result = spi_write_status_register(flash, status & ~0x3c); - if (result) { - msg_cerr("spi_write_status_register failed.\n"); - return result; - } - status = spi_read_status_register(flash); - if ((status & 0x3c) != 0) { - msg_cerr("Block protection could not be disabled!\n"); - return 1; - } - msg_cdbg("done.\n"); - return 0; -} - int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes, unsigned int len) { Added: trunk/spi25_statusreg.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/spi25_statusreg.c Sat Dec 29 16:03:51 2012 (r1634) @@ -0,0 +1,591 @@ +/* + * This file is part of the flashrom project. + * It handles everything related to status registers of the JEDEC family 25. + * + * Copyright (C) 2007, 2008, 2009, 2010 Carl-Daniel Hailfinger + * Copyright (C) 2008 coresystems GmbH + * Copyright (C) 2008 Ronald Hoogenboom <ronald(a)zonnet.nl> + * Copyright (C) 2012 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "flash.h" +#include "chipdrivers.h" +#include "spi.h" + +/* === Generic functions === */ +int spi_write_status_enable(struct flashctx *flash) +{ + static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; + int result; + + /* Send EWSR (Enable Write Status Register). */ + result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); + + if (result) + msg_cerr("%s failed\n", __func__); + + return result; +} + +static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode) +{ + int result; + int i = 0; + /* + * WRSR requires either EWSR or WREN depending on chip type. + * The code below relies on the fact hat EWSR and WREN have the same + * INSIZE and OUTSIZE. + */ + struct spi_command cmds[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ enable_opcode }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_WRSR_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + result = spi_send_multicommand(flash, cmds); + if (result) { + msg_cerr("%s failed during command execution\n", __func__); + /* No point in waiting for the command to complete if execution + * failed. + */ + return result; + } + /* WRSR performs a self-timed erase before the changes take effect. + * This may take 50-85 ms in most cases, and some chips apparently + * allow running RDSR only once. Therefore pick an initial delay of + * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. + */ + programmer_delay(100 * 1000); + while (spi_read_status_register(flash) & SPI_SR_WIP) { + if (++i > 490) { + msg_cerr("Error: WIP bit after WRSR never cleared\n"); + return TIMEOUT_ERROR; + } + programmer_delay(10 * 1000); + } + return 0; +} + +int spi_write_status_register(struct flashctx *flash, int status) +{ + int feature_bits = flash->chip->feature_bits; + int ret = 1; + + if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { + msg_cdbg("Missing status register write definition, assuming " + "EWSR is needed\n"); + feature_bits |= FEATURE_WRSR_EWSR; + } + if (feature_bits & FEATURE_WRSR_WREN) + ret = spi_write_status_register_flag(flash, status, JEDEC_WREN); + if (ret && (feature_bits & FEATURE_WRSR_EWSR)) + ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR); + return ret; +} + +uint8_t spi_read_status_register(struct flashctx *flash) +{ + static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR }; + /* FIXME: No workarounds for driver/hardware bugs in generic code. */ + unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */ + int ret; + + /* Read Status Register */ + ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr); + if (ret) + msg_cerr("RDSR failed!\n"); + + return readarr[0]; +} + +/* A generic brute-force block protection disable works like this: + * Write 0x00 to the status register. Check if any locks are still set (that + * part is chip specific). Repeat once. + */ +int spi_disable_blockprotect(struct flashctx *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(flash); + /* If block protection is disabled, stop here. */ + if ((status & 0x3c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling... "); + result = spi_write_status_register(flash, status & ~0x3c); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if ((status & 0x3c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + msg_cdbg("done.\n"); + return 0; +} + +static void spi_prettyprint_status_register_hex(uint8_t status) +{ + msg_cdbg("Chip status register is 0x%02x.\n", status); +} + +/* Common highest bit: Status Register Write Disable (SRWD). */ +static void spi_prettyprint_status_register_srwd(uint8_t status) +{ + msg_cdbg("Chip status register: Status Register Write Disable (SRWD) is %sset\n", + (status & (1 << 7)) ? "" : "not "); +} + +/* Common highest bit: Block Protect Write Disable (BPL). */ +static void spi_prettyprint_status_register_bpl(uint8_t status) +{ + msg_cdbg("Chip status register: Block Protect Write Disable (BPL) is %sset\n", + (status & (1 << 7)) ? "" : "not "); +} + +/* Common lowest 2 bits: WEL and WIP. */ +static void spi_prettyprint_status_register_welwip(uint8_t status) +{ + msg_cdbg("Chip status register: Write Enable Latch (WEL) is %sset\n", + (status & (1 << 1)) ? "" : "not "); + msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is %sset\n", + (status & (1 << 0)) ? "" : "not "); +} + +/* Common block protection (BP) bits. */ +static void spi_prettyprint_status_register_bp(uint8_t status, int bp) +{ + switch (bp) { + /* Fall through. */ + case 4: + msg_cdbg("Chip status register: Block Protect 4 (BP4) is %sset\n", + (status & (1 << 5)) ? "" : "not "); + case 3: + msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n", + (status & (1 << 5)) ? "" : "not "); + case 2: + msg_cdbg("Chip status register: Block Protect 2 (BP2) is %sset\n", + (status & (1 << 4)) ? "" : "not "); + case 1: + msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n", + (status & (1 << 3)) ? "" : "not "); + case 0: + msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n", + (status & (1 << 2)) ? "" : "not "); + } +} + +/* Unnamed bits. */ +static void spi_prettyprint_status_register_bit(uint8_t status, int bit) +{ + msg_cdbg("Chip status register: Bit %i is %sset\n", bit, (status & (1 << bit)) ? "" : "not "); +} + +int spi_prettyprint_status_register_plain(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + return 0; +} + +/* Works for many chips of the + * AMIC A25L series + * and MX MX25L512 + */ +int spi_prettyprint_status_register_default_bp1(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_srwd(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bit(status, 4); + spi_prettyprint_status_register_bp(status, 1); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +/* Works for many chips of the + * AMIC A25L series + */ +int spi_prettyprint_status_register_default_bp2(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_srwd(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bit(status, 5); + spi_prettyprint_status_register_bp(status, 2); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +/* Works for many chips of the + * ST M25P series + * MX MX25L series + */ +int spi_prettyprint_status_register_default_bp3(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_srwd(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_bp(status, 3); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +/* === Amic === + * FIXME: spi_disable_blockprotect is incorrect but works fine for chips using + * spi_prettyprint_status_register_default_bp1 or + * spi_prettyprint_status_register_default_bp2. + * FIXME: spi_disable_blockprotect is incorrect and will fail for chips using + * spi_prettyprint_status_register_amic_a25l032 if those have locks controlled + * by the second status register. + */ + +int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_srwd(status); + msg_cdbg("Chip status register: Sector Protect Size (SEC) is %i KB\n", (status & (1 << 6)) ? 4 : 64); + msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top"); + spi_prettyprint_status_register_bp(status, 2); + spi_prettyprint_status_register_welwip(status); + msg_cdbg("Chip status register 2 is NOT decoded!\n"); + return 0; +} + +/* === Atmel === */ + +static void spi_prettyprint_status_register_atmel_at25_wpen(uint8_t status) +{ + msg_cdbg("Chip status register: Write Protect Enable (WPEN) is %sset\n", + (status & (1 << 7)) ? "" : "not "); +} + +static void spi_prettyprint_status_register_atmel_at25_srpl(uint8_t status) +{ + msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) is %sset\n", + (status & (1 << 7)) ? "" : "not "); +} + +static void spi_prettyprint_status_register_atmel_at25_epewpp(uint8_t status) +{ + msg_cdbg("Chip status register: Erase/Program Error (EPE) is %sset\n", + (status & (1 << 5)) ? "" : "not "); + msg_cdbg("Chip status register: WP# pin (WPP) is %sasserted\n", + (status & (1 << 4)) ? "not " : ""); +} + +static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status) +{ + msg_cdbg("Chip status register: Software Protection Status (SWP): "); + switch (status & (3 << 2)) { + case 0x0 << 2: + msg_cdbg("no sectors are protected\n"); + break; + case 0x1 << 2: + msg_cdbg("some sectors are protected\n"); + /* FIXME: Read individual Sector Protection Registers. */ + break; + case 0x3 << 2: + msg_cdbg("all sectors are protected\n"); + break; + default: + msg_cdbg("reserved for future use\n"); + break; + } +} + +int spi_prettyprint_status_register_at25df(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_srpl(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_atmel_at25_epewpp(status); + spi_prettyprint_status_register_atmel_at25_swp(status); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash) +{ + /* FIXME: We should check the security lockdown. */ + msg_cdbg("Ignoring security lockdown (if present)\n"); + msg_cdbg("Ignoring status register byte 2\n"); + return spi_prettyprint_status_register_at25df(flash); +} + +int spi_prettyprint_status_register_at25f512b(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_srpl(status); + spi_prettyprint_status_register_bit(status, 6); + spi_prettyprint_status_register_atmel_at25_epewpp(status); + spi_prettyprint_status_register_bit(status, 3); + spi_prettyprint_status_register_bp(status, 0); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25fs010(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_wpen(status); + msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is " + "%sset\n", (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " + "%sset\n", (status & (1 << 5)) ? "" : "not "); + spi_prettyprint_status_register_bit(status, 4); + msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is " + "%sset\n", (status & (1 << 3)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " + "%sset\n", (status & (1 << 2)) ? "" : "not "); + /* FIXME: Pretty-print detailed sector protection status. */ + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25fs040(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_wpen(status); + spi_prettyprint_status_register_bp(status, 4); + /* FIXME: Pretty-print detailed sector protection status. */ + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at26df081a(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_atmel_at25_srpl(status); + msg_cdbg("Chip status register: Sequential Program Mode Status (SPM) is %sset\n", + (status & (1 << 6)) ? "" : "not "); + spi_prettyprint_status_register_atmel_at25_epewpp(status); + spi_prettyprint_status_register_atmel_at25_swp(status); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_disable_blockprotect_at25df(struct flashctx *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(flash); + /* If block protection is disabled, stop here. */ + if ((status & (3 << 2)) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling... "); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Sector Protection Register Lock\n"); + if ((status & (1 << 4)) == 0) { + msg_cerr("WP# pin is active, disabling " + "write protection is impossible.\n"); + return 1; + } + /* All bits except bit 7 (SPRL) are readonly. */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + + } + /* Global unprotect. Make sure to mask SPRL as well. */ + result = spi_write_status_register(flash, status & ~0xbc); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if ((status & (3 << 2)) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + msg_cdbg("done.\n"); + return 0; +} + +int spi_disable_blockprotect_at25df_sec(struct flashctx *flash) +{ + /* FIXME: We should check the security lockdown. */ + msg_cinfo("Ignoring security lockdown (if present)\n"); + return spi_disable_blockprotect_at25df(flash); +} + +int spi_disable_blockprotect_at25f512b(struct flashctx *flash) +{ + /* spi_disable_blockprotect_at25df is not really the right way to do + * this, but the side effects of said function work here as well. + */ + return spi_disable_blockprotect_at25df(flash); +} + +int spi_disable_blockprotect_at25fs010(struct flashctx *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(flash); + /* If block protection is disabled, stop here. */ + if ((status & 0x6c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling... "); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Status Register Write Protect\n"); + /* Clear bit 7 (WPEN). */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + } + /* Global unprotect. Make sure to mask WPEN as well. */ + result = spi_write_status_register(flash, status & ~0xec); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if ((status & 0x6c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + msg_cdbg("done.\n"); + return 0; +} + +int spi_disable_blockprotect_at25fs040(struct flashctx *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(flash); + /* If block protection is disabled, stop here. */ + if ((status & 0x7c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling... "); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Status Register Write Protect\n"); + /* Clear bit 7 (WPEN). */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + } + /* Global unprotect. Make sure to mask WPEN as well. */ + result = spi_write_status_register(flash, status & ~0xfc); + if (result) { + msg_cerr("spi_write_status_register failed.\n"); + return result; + } + status = spi_read_status_register(flash); + if ((status & 0x7c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + msg_cdbg("done.\n"); + return 0; +} + +/* === SST === */ + +static void spi_prettyprint_status_register_sst25_common(uint8_t status) +{ + spi_prettyprint_status_register_hex(status); + + spi_prettyprint_status_register_bpl(status); + msg_cdbg("Chip status register: Auto Address Increment Programming (AAI) is %sset\n", + (status & (1 << 6)) ? "" : "not "); + spi_prettyprint_status_register_bp(status, 3); + spi_prettyprint_status_register_welwip(status); +} + +int spi_prettyprint_status_register_sst25(struct flashctx *flash) +{ + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_sst25_common(status); + return 0; +} + +int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash) +{ + static const char *const bpt[] = { + "none", + "1F0000H-1FFFFFH", + "1E0000H-1FFFFFH", + "1C0000H-1FFFFFH", + "180000H-1FFFFFH", + "100000H-1FFFFFH", + "all", "all" + }; + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_sst25_common(status); + msg_cdbg("Resulting block protection : %s\n", bpt[(status & 0x1c) >> 2]); + return 0; +} + +int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash) +{ + static const char *const bpt[] = { + "none", + "0x70000-0x7ffff", + "0x60000-0x7ffff", + "0x40000-0x7ffff", + "all blocks", "all blocks", "all blocks", "all blocks" + }; + uint8_t status = spi_read_status_register(flash); + spi_prettyprint_status_register_sst25_common(status); + msg_cdbg("Resulting block protection : %s\n", bpt[(status & 0x1c) >> 2]); + return 0; +}

1 0

Report: Gigabyte B75M-D3P F6 read
by dpcimanager＠users.sourceforge.net Dec. 29, 2012

Dec. 29, 2012

flashrom v0.9.6.1-r1622 on Darwin 12.2.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.9, LLVM Clang 4.1 ((tags/Apple/clang-421.11.66)), little endian Command line (5 args): ~/Downloads/DPCIManager.app/Contents/MacOS/flashrom -VV -r ~/Documents/Gigabyte B75M-D3P F63.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 479M loops per second, 10 myus = 10 us, 100 myus = 98 us, 1000 myus = 986 us, 10000 myus = 9751 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x00000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x00000400. No coreboot table found. DMI string system-manufacturer: "Gigabyte Technology Co., Ltd." DMI string system-product-name: "B75M-D3P" DMI string system-version: "To be filled by O.E.M." DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd." DMI string baseboard-product-name: "B75M-D3P" DMI string baseboard-version: "To be filled by O.E.M." DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8728 on port 0x2e Found chipset "Intel B75" with PCI ID 8086:1e49. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode enabled 0xff600000/0xff200000 FWH decode enabled 0xff500000/0xff100000 FWH decode enabled 0xff400000/0xff000000 FWH decode enabled Maximum FWH chip size: 0x100000 bytes BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled Root Complex Register Block address = 0xfed1c000 GCS = 0xc64: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 WARNING: SPI Configuration Lockdown activated. Reading OPCODES... done OP Type Pre-OP op[0]: 0x02, write w/ addr, none op[1]: 0x03, read w/ addr, none op[2]: 0x20, write w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x9f, read w/o addr, none op[5]: 0x01, write w/o addr, none op[6]: 0x00, read w/o addr, none op[7]: 0x00, read w/o addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x00 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x007fffc0 (FADDR) 0x50: 0x0000ffff (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x07ff0000 FREG1: BIOS region (0x00000000-0x007fffff) is read-write. 0x5C: 0x04ff0001 FREG2: Management Engine region (0x00001000-0x004fffff) is read-write. 0x60: 0x00001fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00001fff FREG4: Platform Data region is unused. 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) 0x90: 0x84 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0xf97f10 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=1 0x94: 0x0006 (PREOP) 0x96: 0x043b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9C: 0x0000019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00802005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x02040003 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 3 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x09300024 FLILL 0x00000000 --- Details --- Component 1 density: 8 MB Component 2 is not used. Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 33 MHz Write and Erase Clock Freq.: 33 MHz Fast Read is supported. Fast Read Clock Frequency: 33 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x07ff0000 FLREG2 0x04ff0001 FLREG3 0x00001fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00000000 - 0x007fffff Region 2 (ME ) 0x00001000 - 0x004fffff Region 3 (GbE ) is unused. === Master Section === FLMSTR1 0xffff0000 FLMSTR2 0xffff0000 FLMSTR3 0xffff0118 --- Details --- Descr. BIOS ME GbE Platf. BIOS rw rw rw rw rw ME rw rw rw rw rw GbE rw rw rw rw rw SPI Read Configuration: prefetching enabled, caching enabled, OK. Super I/O ID 0x8728 is not on the list of flash capable controllers. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25LQ32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found Macronix flash chip "MX25L6405" (8192 kB, SPI) at physical address 0xff800000. Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx N25Q016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx N25Q032..1E, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx N25Q032..3E, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx N25Q064..1E, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx N25Q064..3E, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute. Probing for SST SST25LF080A, 1024 kB: Invalid OPCODE 0xab, will not execute. Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25WF512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25WF010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25WF020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25WF040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Unknown SFDP-capable chip, 0 kB: Invalid OPCODE 0x5a, will not execute. Receiving SFDP signature failed. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond unknown Winbond (ex Nexcom) SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x4c, id2 0x24, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xd0, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x4c, id2 0x24, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xd0, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x4c, id2 0x24, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xb6, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xd0, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xd0, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x8d, id2 0xf8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xd0, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xd0, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x4c, id2 0x24, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x8d, id2 0xf8, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xd0, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xd0, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xd0, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xd0, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x4c, id2 0x24, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xd0, id2 0x20, id1 is normal flash content, id2 is normal flash content Found Macronix flash chip "MX25L6405" (8192 kB, SPI). Reading flash... done. Restoring MMIO space at 0x108b3e8a0 Restoring PCI config space for 00:1f:0 reg 0xdc

1 0

2theMax RAID 100 (HPT370)
by Roy Dec. 28, 2012

Dec. 28, 2012

Hi all, I got a 2theMax RAID 100 card with SST MPF 39SF512 70-4C-NH 64KB ROm on PCB, flashrom segfaults at the end. lspci: 00:0f.0 Mass storage controller [0180]: HighPoint Technologies, Inc. HPT366/368/370/370A/372/372N [1103:0004] (rev 03) Subsystem: HighPoint Technologies, Inc. HPT370 UDMA100 [1103:0005] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 120 (2000ns min, 2000ns max), Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 18 Region 0: I/O ports at a800 [size=8] Region 1: I/O ports at a400 [size=4] Region 2: I/O ports at a000 [size=8] Region 3: I/O ports at 9800 [size=4] Region 4: I/O ports at 9400 [size=256] [virtual] Expansion ROM at 20020000 [disabled] [size=128K] Kernel driver in use: HPT366_IDE 00: 03 11 04 00 05 00 00 02 03 00 80 01 08 78 00 00 10: 01 a8 00 00 01 a4 00 00 01 a0 00 00 01 98 00 00 20: 01 94 00 00 00 00 00 00 00 00 00 00 03 11 05 00 30: 00 00 00 00 60 00 00 00 00 00 00 00 0a 01 08 08 40: a7 4e 81 06 a7 4e 81 06 a7 4e 81 06 a7 4e 81 06 50: 05 01 00 00 05 01 00 00 1b 00 00 23 24 00 26 00 60: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 94 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 flashrom v0.9.6.1-r1564 on Linux 2.6.32-5-686 (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.7, GCC 4.4.5, little endian Command line (3 args): ./flashrom -p atahpt -V Calibrating delay loop... OS timer resolution is 1 usecs, 230M loops per second, delay more than 10% too short (got 76% of expected delay), recalculating... 291M loops per second, 10 myus = 10 us, 100 myus = 97 us, 1000 myus = 962 us, 10000 myus = 9635 us, 4 myus = 5 us, OK. Initializing atahpt programmer Found "Highpoint HPT366/368/370/370A/372/372N" (1103:0004, BDF 00:0f.0). === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom(a)flashrom.org if it works for you. Please add the name of your PCI device to the subject. Thank you for your help! === Requested BAR is I/O The following protocols are supported: Parallel. Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F040, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29LV640B, 8192 kB: probe_en29lv640b: id1 0x0000, id2 0x0000 Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0x00, id2 0x00 Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0x00, id2 0x00 Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV512, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0x00, id2 0x00 Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0x00, id2 0x00 Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Restoring PCI config space for 00:0f:0 reg 0x58 pcilib: Cannot open (null)/devices/0000:00:0f.0/config HTH, Roy

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