flashrom July 2011

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flashrom -V
by Byron Johnson 24 Jul '11

24 Jul '11

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[PATCH] ichspi.c: do not print PBR[3] for ICH7 because it does not exist
by Stefan Tauner 23 Jul '11

23 Jul '11

intel document 307013 (ICH7 datasheet) section 21.1.9 does only define PBR[0] (at SPIBAR + 60h) to PBR[2] (SPIBAR + 68h). SPIBAR + 6Ch and following are not defined, but we were printing them as PBR[3] anyway. i could not find any references to PBR[3] in documentation of other related chips (NM10, atom e6xx) either, hence kill it. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- ichspi.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/ichspi.c b/ichspi.c index 99c4613..0258626 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1263,7 +1263,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, mmio_readl(ich_spibar + 0x58)); msg_pdbg("0x5c: 0x%08x (OPMENU+4)\n", mmio_readl(ich_spibar + 0x5c)); - for (i = 0; i < 4; i++) { + for (i = 0; i < 3; i++) { int offs; offs = 0x60 + (i * 4); msg_pdbg("0x%02x: 0x%08x (PBR%d)\n", offs, -- 1.7.1

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Don't Understand Output
by Bryan Moore 23 Jul '11

23 Jul '11

I'm just starting to consider flashing my EeePC 1005HA's BIOS on Ubuntu Oneiric, so I installed flashrom and ran it, but can't make heads-or-tails of the output; I also can't find any sensible information in the FAQ or anywhere else on the web. Help? flashrom output: > Found chipset "Intel ICH7M", enabling flash write... OK. > This chipset supports the following protocols: FWH. > No EEPROM/flash device found. > Note: flashrom can never write if the flash chip isn't found automatically.

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AMD SB700/SB710/SB750/SB850 and Eon EN25F80
by Иван Кинаш 22 Jul '11

22 Jul '11

-- Best regards, Ivan Kinash

1 0

Re: [flashrom] [PATCH] chipset_enable.c: add a message in the case the chipset enable is untested
by Carl-Daniel Hailfinger 22 Jul '11

22 Jul '11

Am 21.07.2011 14:23 schrieb Stefan Tauner: > old output: > Found chipset "Intel QS57", enabling flash write... OK. > This chipset supports the following protocols: FWH, SPI. > > new non-verbose output for tested chipsets: > Found chipset "Intel QS57". Enabling flash write... OK. > This chipset supports the following protocols: FWH, SPI. > > new non-verbose output for untested chipsets: > Found chipset "Intel QS57". > This chipset is marked as untested. If you are using an up-to-date version > of flashrom please email a report to flashrom(a)flashrom.org including a > verbose (-V) log. Thank you! > Enabling flash write... OK. > This chipset supports the following protocols: FWH, SPI. > 4 additional lines... sorry, but that's simply too much. We have users of the DOS version of flashrom, and they have an 80x25 terminal, so wasting 4 lines (16% of the screen) is not acceptable. 2 more lines are already 8% of the screen. The following text would be shorter (2 additional lines), but I'd be happy to see a patch trimming it down even more to one additional line. Found chipset "Intel QS57" (untested). Enabling flash write... OK. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! This chipset supports the following protocols: FWH, SPI. Regards, Carl-Daniel -- http://www.hailfinger.org/

5 6

Re: [flashrom] FAILED update new bios but OK to flash OLD bios - P5N-E SLI
by Stefan Tauner 22 Jul '11

22 Jul '11

On Fri, 22 Jul 2011 10:38:45 +0200 Joël Obrecht <joel.obrecht(a)gmail.com> wrote: > Hi Joshua, > I'm sorry I looked a bit around but I guess I need some more explanations > for using / installing that patch. May I have to replace the data in source > files ? Where ? > Anyway, I tried again with last svn, failed again, I joined the verbose > output. > Joël > sorry, that was too fast. you need to apply the other patch too of course (which is even more important and should be tried without the one of my previous mail first). you can fetch and apply it similarly. the url is: http://patchwork.coreboot.org/patch/3282/raw/ -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] FAILED update new bios but OK to flash OLD bios - P5N-E SLI
by Joshua Roys 22 Jul '11

22 Jul '11

Hello Joël (and Segfault), Can you please try the attached patch? You'll also need to apply the one here: http://patchwork.coreboot.org/patch/2125/ Please reply with the output from `./flashrom -V' Thanks, Josh

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[PATCH] Uniform chip names in flashchips.c
by Mattias Mattsson 22 Jul '11

22 Jul '11

Hi, This patch change the chipnames in flashchips.c to use bash style brace expansion syntax for chip IDs where they correspond to several chips with different names. This is a bit ugly, but at least it is simple and a bit more consistent to what we have now. Maybe someone else has a better solution? Thanks, -mattias Signed-off-by: Mattias Mattsson <vitplister(a)gmail.com> --- flashrom/flashchips.c 2011-07-22 01:21:47.000000000 +0200 +++ flashrom_uniform_chipnames/flashchips.c 2011-07-21 14:21:37.000000000 +0200 @@ -59,7 +59,7 @@ { .vendor = "AMD", - .name = "Am29F010A/B", + .name = "Am29F010{,A,B}", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = AMD_ID, .model_id = AMD_AM29F010B, /* Same as Am29F010A */ @@ -86,7 +86,7 @@ { .vendor = "AMD", - .name = "Am29F002(N)BB", + .name = "Am29F002{,N}BB", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = AMD_ID, .model_id = AMD_AM29F002BB, @@ -118,7 +118,7 @@ { .vendor = "AMD", - .name = "Am29F002(N)BT", + .name = "Am29F002{,N}BT", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = AMD_ID, .model_id = AMD_AM29F002BT, @@ -2242,7 +2242,7 @@ { .vendor = "Atmel", - .name = "AT49F002(N)", + .name = "AT49F002{,N}", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT49F002N, @@ -2274,7 +2274,7 @@ { .vendor = "Atmel", - .name = "AT49F002(N)T", + .name = "AT49F002{,N}T", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = ATMEL_ID, .model_id = ATMEL_AT49F002NT, @@ -3234,7 +3234,7 @@ { .vendor = "Eon", - .name = "EN29F002(A)(N)B", + .name = "EN29F002{,N,A,AN}B", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = EON_ID, .model_id = EON_EN29F002B, @@ -3266,7 +3266,7 @@ { .vendor = "Eon", - .name = "EN29F002(A)(N)T", + .name = "EN29F002{,N,A,AN}T", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = EON_ID, .model_id = EON_EN29F002T, @@ -3518,7 +3518,7 @@ { .vendor = "Intel", - .name = "28F001BN/BX-B", + .name = "28F001{BN,BX}-B", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = INTEL_ID, .model_id = INTEL_28F001B, @@ -3545,7 +3545,7 @@ { .vendor = "Intel", - .name = "28F001BN/BX-T", + .name = "28F001{BN,BX}-T", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = INTEL_ID, .model_id = INTEL_28F001T, @@ -3572,7 +3572,7 @@ { .vendor = "Intel", - .name = "28F002BC/BL/BV/BX-T", + .name = "28F002{BC,BL,BV,BX}-T", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = INTEL_ID, .model_id = INTEL_28F002T, @@ -3599,7 +3599,7 @@ { .vendor = "Intel", - .name = "28F008S3/S5/SC", + .name = "28F008{S3,S5,SC}", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = INTEL_ID, .model_id = INTEL_28F004S3, @@ -3622,7 +3622,7 @@ { .vendor = "Intel", - .name = "28F004B5/BE/BV/BX-B", + .name = "28F004{B5,BE,BV,BX}-B", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = INTEL_ID, .model_id = INTEL_28F004B, @@ -3649,7 +3649,7 @@ { .vendor = "Intel", - .name = "28F004B5/BE/BV/BX-T", + .name = "28F004{B5,BE,BV,BX}-T", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = INTEL_ID, .model_id = INTEL_28F004T, @@ -3676,7 +3676,7 @@ { .vendor = "Intel", - .name = "28F400BV/BX/CE/CV-B", + .name = "28F400{BV,BX,CE,CV}-B", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = INTEL_ID, .model_id = INTEL_28F400B, @@ -3704,7 +3704,7 @@ { .vendor = "Intel", - .name = "28F400BV/BX/CE/CV-T", + .name = "28F400{BV,BX,CE,CV}-T", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = INTEL_ID, .model_id = INTEL_28F400T, @@ -6006,7 +6006,7 @@ { .vendor = "SST", - .name = "SST49LF002A/B", + .name = "SST49LF002{A,B}", .bustype = CHIP_BUSTYPE_FWH, /* A/A Mux */ .manufacture_id = SST_ID, .model_id = SST_SST49LF002A, @@ -6038,7 +6038,7 @@ { .vendor = "SST", - .name = "SST49LF003A/B", + .name = "SST49LF003{A,B}", .bustype = CHIP_BUSTYPE_FWH, /* A/A Mux */ .manufacture_id = SST_ID, .model_id = SST_SST49LF003A, @@ -6073,7 +6073,7 @@ * and is only honored for 64k block erase, but not 4k sector erase. */ .vendor = "SST", - .name = "SST49LF004A/B", + .name = "SST49LF004{A,B}", .bustype = CHIP_BUSTYPE_FWH, /* A/A Mux */ .manufacture_id = SST_ID, .model_id = SST_SST49LF004A, @@ -6869,7 +6869,7 @@ { .vendor = "ST", - .name = "M29F002T/NT", + .name = "M29F002{,N}T", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = ST_ID, .model_id = ST_M29F002T, @@ -8035,7 +8035,7 @@ { .vendor = "Winbond", - .name = "W29C010(M)/W29C011A/W29EE011/W29EE012", + .name = "W29{C010,C010M,C011A,EE011,EE012}", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = WINBOND_ID, .model_id = WINBOND_W29C010, @@ -8058,7 +8058,7 @@ { .vendor = "Winbond", - .name = "W29C020(C)/W29C022", + .name = "W29C0{20,20C,22}", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = WINBOND_ID, .model_id = WINBOND_W29C020, @@ -8082,7 +8082,7 @@ { .vendor = "Winbond", - .name = "W29C040/P", + .name = "W29C040{,P}", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = WINBOND_ID, .model_id = WINBOND_W29C040, @@ -8106,7 +8106,7 @@ { .vendor = "Winbond", - .name = "W29C010(M)/W29C011A/W29EE011/W29EE012", + .name = "W29{C010,C010M,C011A,EE011,EE012}", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = WINBOND_ID, .model_id = WINBOND_W29C010, @@ -8361,7 +8361,7 @@ { .vendor = "Winbond", - .name = "W49F002U/N", + .name = "W49F002U{,N}", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = WINBOND_ID, .model_id = WINBOND_W49F002U,

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Re: [flashrom] [PATCH] dummyflasher.c: add an "content" parameter to select initialization data
by Stefan Tauner 21 Jul '11

21 Jul '11

On Fri, 22 Jul 2011 00:08:41 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > previously the dummies were initialized to be empty (all ones), which makes > writes skip erasing altogether. with this patch the default is to fill it with random > bytes instead. > additionally one can decide other options with the "content" parameter: > content=ones - old behavior > content=random - new default > content=zeros - filled with 0x00 > content=increment - filled with i++ sorry, fixed commit log looks like: dummyflasher.c: add a "content" parameter to select initialization data previously the dummies were initialized to be empty (all ones), which makes write operations skip erasing altogether. with this patch the default is to fill it with random bytes instead. additionally one can decide other options with the "content" parameter: content=ones - old behavior content=random - new default content=zeros - filled with 0x00 content=increment - filled with i++ i am tired. gn8 -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] dummyflasher.c: add an "empty" parameter and initialize with random bytes by default
by Uwe Hermann 21 Jul '11

21 Jul '11

On Thu, Jul 21, 2011 at 05:54:46PM +0200, Stefan Tauner wrote: > previously the dummies were initialized to be empty (all ones), which makes writes skip > erasing altogether. with this patch the default is to fill it with random bytes instead and the > old behavior can be enforced with stating "empty=yes" on the command line. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> I'd make the programmer options a bit more generic to allow for other content easily and consistently: -p dummy:content=ff -p dummy:content=00 -p dummy:content=random -p dummy:content=incrementing etc. The default should be documented in the manpage. > + empty = extract_programmer_param("empty"); > + if (empty != NULL) { > + if (strstr(empty, "yes")) Why not strcasecmp() here? Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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flashrom July 2011