flashrom May 2011

flashrom@flashrom.org

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236 discussions

Re: [flashrom] [PATCH 1/3] Factor out SPI write/read chunking wrappers.
by Carl-Daniel Hailfinger 11 May '11

11 May '11

Hi Michael, thanks for your patch! Am 05.05.2011 03:04 schrieb Michael Karcher: > diff --git a/dummyflasher.c b/dummyflasher.c > index d818a84..b6e67db 100644 > --- a/dummyflasher.c > +++ b/dummyflasher.c > @@ -507,12 +507,6 @@ int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, > return 0; > } > > -int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) > -{ > - /* Maximum read length is unlimited, use 64kB. */ > - return spi_read_chunked(flash, buf, start, len, 64 * 1024); > -} > - > int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) > { > return spi_write_chunked(flash, buf, start, len, > Any reason you didn't kill dummy_write_256()? If you kill it, please remove it from programmer.h and adjust SPI_CONTROLLER_DUMMY in spi.c accordingly. Thanks. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 3/3] kill central list of SPI programmers
by Carl-Daniel Hailfinger 11 May '11

11 May '11

Am 05.05.2011 03:04 schrieb Michael Karcher: > Remove the array spi_programmer, replace it by dynamic registration > instead. Also initially start with no busses supported, and switch to > the default non-SPI only for the internal programmer. > > Signed-off-by: Michael Karcher<flashrom(a)mkarcher.dialup.fu-berlin.de> > Thanks for your patch! I have a few minor nitpicks and design questions, but the code changes seem to be bug-free, so you get an Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Your patch is very readable and got me thinking about future directions of that code, especially multiple registrations... so take the review with a grain of salt. > diff --git a/dummyflasher.c b/dummyflasher.c > index c4c9c4e..fdaa5f2 100644 > --- a/dummyflasher.c > +++ b/dummyflasher.c > @@ -339,7 +339,7 @@ static int emulate_spi_chip_response(unsigned int writecnt, unsigned int readcnt > } > #endif > > -int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, > +static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, > const unsigned char *writearr, unsigned char *readarr) > { > int i; > @@ -375,12 +375,22 @@ int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, > return 0; > } > > -int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) > +static int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) > { > return spi_write_chunked(flash, buf, start, len, > spi_write_256_chunksize); > } > > +static const struct spi_programmer spi_programmer_dummyflasher = { > + .type = SPI_CONTROLLER_DUMMY, > + .max_data_read = MAX_DATA_READ_UNLIMITED, > + .max_data_write = MAX_DATA_UNSPECIFIED, > 256 instead? > + .command = dummy_spi_send_command, > + .multicommand = default_spi_send_multicommand, > + .read = default_spi_read, > + .write_256 = dummy_spi_write_256, > Same comment as for patch 1 of the series. AFAICS dummy_spi_write_256 should be replaced by the default one. > +}; > + > int dummy_init(void) > { > char *bustext = NULL; > Please fix the whitespace (spaces instead of tabs) in it87spi.c and dummyflasher.c. Apparently a newline is missing at the end of spi.c. > diff --git a/bitbang_spi.c b/bitbang_spi.c > index be30944..ca28434 100644 > --- a/bitbang_spi.c > +++ b/bitbang_spi.c > @@ -81,7 +81,7 @@ static uint8_t bitbang_spi_readwrite_byte(uint8_t val) > return ret; > } > > -int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, > +static int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, > const unsigned char *writearr, unsigned char *readarr) > { > int i; > @@ -106,6 +106,16 @@ int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, > return 0; > } > > +static const struct spi_programmer spi_programmer_bitbang = { > Can you make this one non-const to allow changing .type? > + .type = SPI_CONTROLLER_BITBANG, > And leave type empty, to be filled by bitbang_spi_init()? > + .max_data_read = MAX_DATA_READ_UNLIMITED, > + .max_data_write = MAX_DATA_WRITE_UNLIMITED, > + .command = bitbang_spi_send_command, > + .multicommand = default_spi_send_multicommand, > + .read = default_spi_read, > + .write_256 = default_spi_write_256, > +}; > + > int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod) > Could you extend this function signature to have an additional enum spi_controller parameter? If each bitbang-using programmer calls bitbang_spi_init(spi_controller, master, halfperiod) we can keep the spi_controller enums unchanged for now which would help us keep things consistent (for example, ichspi.c uses 3 different spi_controller enums for the same functions). > { > /* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type, > Insert in this function: spi_programmer_bitbang.type=spi_controller; > diff --git a/programmer.h b/programmer.h > index fefb9cd..53a50f6 100644 > --- a/programmer.h > +++ b/programmer.h > @@ -527,7 +518,6 @@ enum spi_controller { > SPI_CONTROLLER_SB600, > SPI_CONTROLLER_VIA, > SPI_CONTROLLER_WBSIO, > - SPI_CONTROLLER_MCP6X_BITBANG, > #endif > #endif > #if CONFIG_FT2232_SPI == 1 > @@ -542,16 +532,9 @@ enum spi_controller { > #if CONFIG_DEDIPROG == 1 > SPI_CONTROLLER_DEDIPROG, > #endif > -#if CONFIG_RAYER_SPI == 1 > - SPI_CONTROLLER_RAYER, > -#endif > -#if CONFIG_NICINTEL_SPI == 1 > - SPI_CONTROLLER_NICINTEL, > -#endif > -#if CONFIG_OGP_SPI == 1 > - SPI_CONTROLLER_OGP, > +#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || (CONFIG_INTERNAL == 1&& (defined(__i386__) || defined(__x86_64__))) > + SPI_CONTROLLER_BITBANG, > #endif > - SPI_CONTROLLER_INVALID /* This must always be the last entry. */ > }; > extern const int spi_programmer_count; > If you use enum spi_controller as parameter for bitbang_spi_init(), we don't need an extra SPI_CONTROLLER_BITBANG and can keep the programmer-specific ones. The calls to bitbang_spi_init() in mcp6x_spi.c, nicintel_spi.c, ogp_spi.c and rayer_spi.c would need to be adjusted as well. I plan to add a union private_data{} to struct spi_programmer to allow storing stuff like struct bitbang_spi_master, avoiding the need for programmer-internal static configuration variables. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1299 - trunk
by repository service 11 May '11

11 May '11

Author: mkarcher Date: Wed May 11 19:07:07 2011 New Revision: 1299 URL: http://flashrom.org/trac/flashrom/changeset/1299 Log: kill central list of SPI programmers Remove the array spi_programmer, replace it by dynamic registration instead. Also initially start with no busses supported, and switch to the default non-SPI only for the internal programmer. Also this patch changes the initialization for the buses_supported variable from "everything-except-SPI" to "nothing". All programmers have to set the bus type on their own, and this enables register_spi_programmer to just add the SPI both for on-board SPI interfaces (where the internal programmer already detected the other bus types), as well as for external programmers (where we have the default "none"). Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/bitbang_spi.c trunk/buspirate_spi.c trunk/dediprog.c trunk/dummyflasher.c trunk/flashrom.c trunk/ft2232_spi.c trunk/ichspi.c trunk/internal.c trunk/it85spi.c trunk/it87spi.c trunk/mcp6x_spi.c trunk/nicintel_spi.c trunk/ogp_spi.c trunk/programmer.h trunk/rayer_spi.c trunk/sb600spi.c trunk/spi.c trunk/spi25.c trunk/wbsio_spi.c Modified: trunk/bitbang_spi.c ============================================================================== --- trunk/bitbang_spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/bitbang_spi.c Wed May 11 19:07:07 2011 (r1299) @@ -64,6 +64,19 @@ bitbang_spi_master->release_bus(); } +static int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); + +static const struct spi_programmer spi_programmer_bitbang = { + .type = SPI_CONTROLLER_BITBANG, + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_WRITE_UNLIMITED, + .command = bitbang_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, +}; + int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod) { /* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type, @@ -85,6 +98,8 @@ bitbang_spi_master = master; bitbang_spi_half_period = halfperiod; + register_spi_programmer(&spi_programmer_bitbang); + /* FIXME: Run bitbang_spi_request_bus here or in programmer init? */ bitbang_spi_set_cs(1); bitbang_spi_set_sck(0); @@ -127,7 +142,7 @@ return ret; } -int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { int i; Modified: trunk/buspirate_spi.c ============================================================================== --- trunk/buspirate_spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/buspirate_spi.c Wed May 11 19:07:07 2011 (r1299) @@ -81,6 +81,19 @@ return 0; } +static int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); + +static const struct spi_programmer spi_programmer_buspirate = { + .type = SPI_CONTROLLER_BUSPIRATE, + .max_data_read = 12, + .max_data_write = 12, + .command = buspirate_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, +}; + static const struct buspirate_spispeeds spispeeds[] = { {"30k", 0x0}, {"125k", 0x1}, @@ -230,8 +243,7 @@ return 1; } - buses_supported = CHIP_BUSTYPE_SPI; - spi_controller = SPI_CONTROLLER_BUSPIRATE; + register_spi_programmer(&spi_programmer_buspirate); return 0; } @@ -271,7 +283,7 @@ return 0; } -int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { static unsigned char *buf = NULL; Modified: trunk/dediprog.c ============================================================================== --- trunk/dediprog.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/dediprog.c Wed May 11 19:07:07 2011 (r1299) @@ -248,7 +248,7 @@ return 0; } -int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +static int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { int ret; /* chunksize must be 512, other sizes will NOT work at all. */ @@ -293,7 +293,7 @@ return 0; } -int dediprog_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) +static int dediprog_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { int ret; @@ -310,7 +310,7 @@ return ret; } -int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { int ret; @@ -526,6 +526,16 @@ return millivolt; } +static const struct spi_programmer spi_programmer_dediprog = { + .type = SPI_CONTROLLER_DEDIPROG, + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, + .command = dediprog_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = dediprog_spi_read, + .write_256 = dediprog_spi_write_256, +}; + /* URB numbers refer to the first log ever captured. */ int dediprog_init(void) { @@ -606,8 +616,7 @@ return 1; } - buses_supported = CHIP_BUSTYPE_SPI; - spi_controller = SPI_CONTROLLER_DEDIPROG; + register_spi_programmer(&spi_programmer_dediprog); /* RE leftover, leave in until the driver is complete. */ #if 0 Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/dummyflasher.c Wed May 11 19:07:07 2011 (r1299) @@ -60,6 +60,19 @@ static int spi_write_256_chunksize = 256; +static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); +static int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); + +static const struct spi_programmer spi_programmer_dummyflasher = { + .type = SPI_CONTROLLER_DUMMY, + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_UNSPECIFIED, + .command = dummy_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = dummy_spi_write_256, +}; int dummy_init(void) { char *bustext = NULL; @@ -91,8 +104,7 @@ msg_pdbg("Enabling support for %s flash.\n", "FWH"); } if (strstr(bustext, "spi")) { - buses_supported |= CHIP_BUSTYPE_SPI; - spi_controller = SPI_CONTROLLER_DUMMY; + register_spi_programmer(&spi_programmer_dummyflasher); msg_pdbg("Enabling support for %s flash.\n", "SPI"); } if (buses_supported == CHIP_BUSTYPE_NONE) @@ -471,7 +483,7 @@ } #endif -int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { int i; @@ -507,7 +519,7 @@ return 0; } -int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) +static int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { return spi_write_chunked(flash, buf, start, len, spi_write_256_chunksize); Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/flashrom.c Wed May 11 19:07:07 2011 (r1299) @@ -521,10 +521,7 @@ .fwh = 0xffffffff, .spi = 0xffffffff }; - /* Default to Parallel/LPC/FWH flash devices. If a known host controller - * is found, the init routine sets the buses_supported bitfield. - */ - buses_supported = CHIP_BUSTYPE_NONSPI; + buses_supported = CHIP_BUSTYPE_NONE; /* Default to top aligned flash at 4 GB. */ flashbase = 0; /* Registering shutdown functions is now allowed. */ @@ -1712,10 +1709,6 @@ msg_gerr("Programmer table miscompilation!\n"); ret = 1; } - if (spi_programmer_count - 1 != SPI_CONTROLLER_INVALID) { - msg_gerr("SPI programmer table miscompilation!\n"); - ret = 1; - } for (flash = flashchips; flash && flash->name; flash++) if (selfcheck_eraseblocks(flash)) ret = 1; Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/ft2232_spi.c Wed May 11 19:07:07 2011 (r1299) @@ -128,6 +128,19 @@ return 0; } +static int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); + +static const struct spi_programmer spi_programmer_ft2232 = { + .type = SPI_CONTROLLER_FT2232, + .max_data_read = 64 * 1024, + .max_data_write = 256, + .command = ft2232_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, +}; + int ft2232_spi_init(void) { int f; @@ -261,13 +274,12 @@ // msg_pdbg("\nft2232 chosen\n"); - buses_supported = CHIP_BUSTYPE_SPI; - spi_controller = SPI_CONTROLLER_FT2232; + register_spi_programmer(&spi_programmer_ft2232); return 0; } -int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { struct ftdi_context *ftdic = &ftdic_context; Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/ichspi.c Wed May 11 19:07:07 2011 (r1299) @@ -313,7 +313,7 @@ return -1; } - switch (spi_controller) { + switch (spi_programmer->type) { case SPI_CONTROLLER_ICH7: case SPI_CONTROLLER_VIA: preop = REGREAD16(ICH7_REG_PREOP); @@ -388,7 +388,7 @@ } msg_pdbg("\n%s: preop=%04x optype=%04x opmenu=%08x%08x\n", __func__, preop, optype, opmenu[0], opmenu[1]); - switch (spi_controller) { + switch (spi_programmer->type) { case SPI_CONTROLLER_ICH7: case SPI_CONTROLLER_VIA: /* Register undo only for enable_undo=1, i.e. first call. */ @@ -432,7 +432,7 @@ { #define BBAR_MASK 0x00ffff00 minaddr &= BBAR_MASK; - switch (spi_controller) { + switch (spi_programmer->type) { case SPI_CONTROLLER_ICH7: case SPI_CONTROLLER_VIA: ichspi_bbar = mmio_readl(ich_spibar + 0x50) & ~BBAR_MASK; @@ -801,7 +801,7 @@ static int run_opcode(OPCODE op, uint32_t offset, uint8_t datalength, uint8_t * data) { - switch (spi_controller) { + switch (spi_programmer->type) { case SPI_CONTROLLER_VIA: if (datalength > 16) { msg_perr("%s: Internal command size error for " @@ -834,7 +834,7 @@ return -1; } -int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { int result; @@ -900,7 +900,7 @@ opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) { addr = (writearr[1] << 16) | (writearr[2] << 8) | (writearr[3] << 0); - switch (spi_controller) { + switch (spi_programmer->type) { case SPI_CONTROLLER_ICH7: case SPI_CONTROLLER_VIA: case SPI_CONTROLLER_ICH9: @@ -953,7 +953,7 @@ return result; } -int ich_spi_send_multicommand(struct spi_command *cmds) +static int ich_spi_send_multicommand(struct spi_command *cmds) { int ret = 0; int i; @@ -1051,6 +1051,26 @@ access_names[rwperms]); } +static const struct spi_programmer spi_programmer_ich7 = { + .type = SPI_CONTROLLER_ICH7, + .max_data_read = 64, + .max_data_write = 64, + .command = ich_spi_send_command, + .multicommand = ich_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, +}; + +static const struct spi_programmer spi_programmer_ich9 = { + .type = SPI_CONTROLLER_ICH9, + .max_data_read = 64, + .max_data_write = 64, + .command = ich_spi_send_command, + .multicommand = ich_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, +}; + int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, int ich_generation) { @@ -1059,20 +1079,19 @@ uint16_t spibar_offset, tmp2; uint32_t tmp; - buses_supported |= CHIP_BUSTYPE_SPI; switch (ich_generation) { case 7: - spi_controller = SPI_CONTROLLER_ICH7; + register_spi_programmer(&spi_programmer_ich7); spibar_offset = 0x3020; break; case 8: - spi_controller = SPI_CONTROLLER_ICH9; + register_spi_programmer(&spi_programmer_ich9); spibar_offset = 0x3020; break; case 9: case 10: default: /* Future version might behave the same */ - spi_controller = SPI_CONTROLLER_ICH9; + register_spi_programmer(&spi_programmer_ich9); spibar_offset = 0x3800; break; } @@ -1083,7 +1102,7 @@ /* Assign Virtual Address */ ich_spibar = rcrb + spibar_offset; - switch (spi_controller) { + switch (spi_programmer->type) { case SPI_CONTROLLER_ICH7: msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0)); @@ -1211,6 +1230,16 @@ return 0; } +static const struct spi_programmer spi_programmer_via = { + .type = SPI_CONTROLLER_VIA, + .max_data_read = 16, + .max_data_write = 16, + .command = ich_spi_send_command, + .multicommand = ich_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, +}; + int via_init_spi(struct pci_dev *dev) { uint32_t mmio_base; @@ -1221,8 +1250,8 @@ ich_spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70); /* Not sure if it speaks all these bus protocols. */ - buses_supported = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI; - spi_controller = SPI_CONTROLLER_VIA; + buses_supported = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH; + register_spi_programmer(&spi_programmer_via); msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0)); msg_pdbg("0x02: 0x%04x (SPIC)\n", mmio_readw(ich_spibar + 2)); Modified: trunk/internal.c ============================================================================== --- trunk/internal.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/internal.c Wed May 11 19:07:07 2011 (r1299) @@ -179,6 +179,11 @@ get_io_perms(); + /* Default to Parallel/LPC/FWH flash devices. If a known host controller + * is found, the init routine sets the buses_supported bitfield. + */ + buses_supported = CHIP_BUSTYPE_NONSPI; + /* Initialize PCI access for flash enables */ pacc = pci_alloc(); /* Get the pci_access structure */ /* Set all options you want -- here we stick with the defaults */ Modified: trunk/it85spi.c ============================================================================== --- trunk/it85spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/it85spi.c Wed May 11 19:07:07 2011 (r1299) @@ -262,12 +262,22 @@ ce_low = (unsigned char*)(base + 0xD00); /* 0xFFFFFD00 */ #endif - /* Set this as spi controller. */ - spi_controller = SPI_CONTROLLER_IT85XX; - return 0; } +static int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); + +static const struct spi_programmer spi_programmer_it85xx = { + .type = SPI_CONTROLLER_IT85XX, + .max_data_read = 64, + .max_data_write = 64, + .command = it85xx_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, +}; + int it85xx_spi_init(struct superio s) { int ret; @@ -284,7 +294,8 @@ if (buses_supported & CHIP_BUSTYPE_FWH) msg_pdbg("Overriding chipset SPI with IT85 FWH|SPI.\n"); /* Really leave FWH enabled? */ - buses_supported |= CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI; + /* Set this as spi controller. */ + register_spi_programmer(&spi_programmer_it85xx); } return ret; } @@ -303,7 +314,7 @@ * 3. read date from LPC/FWH address 0xffff_fdxxh (drive CE# low and get * data from MISO) */ -int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { int i; Modified: trunk/it87spi.c ============================================================================== --- trunk/it87spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/it87spi.c Wed May 11 19:07:07 2011 (r1299) @@ -104,6 +104,21 @@ return; } +static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); +static int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); +static int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); + +static const struct spi_programmer spi_programmer_it87xx = { + .type = SPI_CONTROLLER_IT87XX, + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, + .command = it8716f_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = it8716f_spi_chip_read, + .write_256 = it8716f_spi_chip_write_256, +}; + static uint16_t it87spi_probe(uint16_t port) { uint8_t tmp = 0; @@ -180,9 +195,8 @@ it8716f_flashport = flashport; if (buses_supported & CHIP_BUSTYPE_SPI) msg_pdbg("Overriding chipset SPI with IT87 SPI.\n"); - spi_controller = SPI_CONTROLLER_IT87XX; /* FIXME: Add the SPI bus or replace the other buses with it? */ - buses_supported |= CHIP_BUSTYPE_SPI; + register_spi_programmer(&spi_programmer_it87xx); return 0; } @@ -234,7 +248,7 @@ * commands with the address in inverse wire order. That's why the register * ordering in case 4 and 5 may seem strange. */ -int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { uint8_t busy, writeenc; @@ -327,7 +341,7 @@ * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles * Need to read this big flash using firmware cycles 3 byte at a time. */ -int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) +static int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) { fast_spi = 0; @@ -344,7 +358,7 @@ return 0; } -int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) +static int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { /* * IT8716F only allows maximum of 512 kb SPI chip size for memory Modified: trunk/mcp6x_spi.c ============================================================================== --- trunk/mcp6x_spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/mcp6x_spi.c Wed May 11 19:07:07 2011 (r1299) @@ -166,9 +166,6 @@ return 1; } - buses_supported |= CHIP_BUSTYPE_SPI; - spi_controller = SPI_CONTROLLER_MCP6X_BITBANG; - return 0; } Modified: trunk/nicintel_spi.c ============================================================================== --- trunk/nicintel_spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/nicintel_spi.c Wed May 11 19:07:07 2011 (r1299) @@ -162,9 +162,6 @@ if (bitbang_spi_init(&bitbang_spi_master_nicintel, 1)) return 1; - buses_supported = CHIP_BUSTYPE_SPI; - spi_controller = SPI_CONTROLLER_NICINTEL; - return 0; } Modified: trunk/ogp_spi.c ============================================================================== --- trunk/ogp_spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/ogp_spi.c Wed May 11 19:07:07 2011 (r1299) @@ -128,9 +128,6 @@ if (bitbang_spi_init(&bitbang_spi_master_ogp, 0)) return 1; - buses_supported = CHIP_BUSTYPE_SPI; - spi_controller = SPI_CONTROLLER_OGP; - return 0; } Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Wed May 11 19:07:02 2011 (r1298) +++ trunk/programmer.h Wed May 11 19:07:07 2011 (r1299) @@ -372,9 +372,6 @@ uint16_t dummy_chip_readw(const chipaddr addr); uint32_t dummy_chip_readl(const chipaddr addr); void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); #endif /* nic3com.c */ @@ -485,7 +482,6 @@ const char *device_name; }; int ft2232_spi_init(void); -int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); extern const struct usbdev_status devs_ft2232spi[]; void print_supported_usbdevs(const struct usbdev_status *devs); #endif @@ -505,7 +501,6 @@ /* bitbang_spi.c */ int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod); int bitbang_spi_shutdown(const struct bitbang_spi_master *master); -int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); /* buspirate_spi.c */ struct buspirate_spispeeds { @@ -514,14 +509,10 @@ }; int buspirate_spi_init(void); int buspirate_spi_shutdown(void); -int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); /* dediprog.c */ int dediprog_init(void); int dediprog_shutdown(void); -int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int dediprog_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); /* flashrom.c */ struct decode_sizes { @@ -552,7 +543,6 @@ SPI_CONTROLLER_SB600, SPI_CONTROLLER_VIA, SPI_CONTROLLER_WBSIO, - SPI_CONTROLLER_MCP6X_BITBANG, #endif #endif #if CONFIG_FT2232_SPI == 1 @@ -567,16 +557,9 @@ #if CONFIG_DEDIPROG == 1 SPI_CONTROLLER_DEDIPROG, #endif -#if CONFIG_RAYER_SPI == 1 - SPI_CONTROLLER_RAYER, -#endif -#if CONFIG_NICINTEL_SPI == 1 - SPI_CONTROLLER_NICINTEL, -#endif -#if CONFIG_OGP_SPI == 1 - SPI_CONTROLLER_OGP, +#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) + SPI_CONTROLLER_BITBANG, #endif - SPI_CONTROLLER_INVALID /* This must always be the last entry. */ }; extern const int spi_programmer_count; @@ -584,6 +567,7 @@ #define MAX_DATA_READ_UNLIMITED 64 * 1024 #define MAX_DATA_WRITE_UNLIMITED 256 struct spi_programmer { + enum spi_controller type; int max_data_read; int max_data_write; int (*command)(unsigned int writecnt, unsigned int readcnt, @@ -595,13 +579,13 @@ int (*write_256)(struct flashchip *flash, uint8_t *buf, int start, int len); }; -extern enum spi_controller spi_controller; -extern const struct spi_programmer spi_programmer[]; +extern const struct spi_programmer *spi_programmer; int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int default_spi_send_multicommand(struct spi_command *cmds); int default_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int default_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); +void register_spi_programmer(const struct spi_programmer *programmer); /* ichspi.c */ #if CONFIG_INTERNAL == 1 @@ -609,40 +593,26 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, int ich_generation); int via_init_spi(struct pci_dev *dev); -int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int ich_spi_send_multicommand(struct spi_command *cmds); #endif /* it85spi.c */ int it85xx_spi_init(struct superio s); int it85xx_shutdown(void); -int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); /* it87spi.c */ void enter_conf_mode_ite(uint16_t port); void exit_conf_mode_ite(uint16_t port); void probe_superio_ite(void); int init_superio_ite(void); -int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); /* sb600spi.c */ #if CONFIG_INTERNAL == 1 int sb600_probe_spi(struct pci_dev *dev); -int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); #endif /* wbsio_spi.c */ #if CONFIG_INTERNAL == 1 int wbsio_check_for_spi(void); -int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr); -int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); #endif /* serprog.c */ Modified: trunk/rayer_spi.c ============================================================================== --- trunk/rayer_spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/rayer_spi.c Wed May 11 19:07:07 2011 (r1299) @@ -134,9 +134,6 @@ if (bitbang_spi_init(&bitbang_spi_master_rayer, 0)) return 1; - buses_supported = CHIP_BUSTYPE_SPI; - spi_controller = SPI_CONTROLLER_RAYER; - return 0; } Modified: trunk/sb600spi.c ============================================================================== --- trunk/sb600spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/sb600spi.c Wed May 11 19:07:07 2011 (r1299) @@ -89,7 +89,7 @@ ; } -int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { int count; @@ -192,6 +192,16 @@ return 0; } +static const struct spi_programmer spi_programmer_sb600 = { + .type = SPI_CONTROLLER_SB600, + .max_data_read = 8, + .max_data_write = 5, + .command = sb600_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, +}; + int sb600_probe_spi(struct pci_dev *dev) { struct pci_dev *smbus_dev; @@ -304,8 +314,7 @@ /* Bring the FIFO to a clean state. */ reset_internal_fifo_pointer(); - buses_supported |= CHIP_BUSTYPE_SPI; - spi_controller = SPI_CONTROLLER_SB600; + register_spi_programmer(&spi_programmer_sb600); return 0; } Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/spi.c Wed May 11 19:07:07 2011 (r1299) @@ -30,200 +30,42 @@ #include "programmer.h" #include "spi.h" -enum spi_controller spi_controller = SPI_CONTROLLER_NONE; - -const struct spi_programmer spi_programmer[] = { - { /* SPI_CONTROLLER_NONE */ - .max_data_read = MAX_DATA_UNSPECIFIED, - .max_data_write = MAX_DATA_UNSPECIFIED, - .command = NULL, - .multicommand = NULL, - .read = NULL, - .write_256 = NULL, - }, - -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) - { /* SPI_CONTROLLER_ICH7 */ - .max_data_read = 64, - .max_data_write = 64, - .command = ich_spi_send_command, - .multicommand = ich_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - }, - - { /* SPI_CONTROLLER_ICH9 */ - .max_data_read = 64, - .max_data_write = 64, - .command = ich_spi_send_command, - .multicommand = ich_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - }, - - { /* SPI_CONTROLLER_IT85XX */ - .max_data_read = 64, - .max_data_write = 64, - .command = it85xx_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - }, - - { /* SPI_CONTROLLER_IT87XX */ - .max_data_read = MAX_DATA_UNSPECIFIED, - .max_data_write = MAX_DATA_UNSPECIFIED, - .command = it8716f_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = it8716f_spi_chip_read, - .write_256 = it8716f_spi_chip_write_256, - }, - - { /* SPI_CONTROLLER_SB600 */ - .max_data_read = 8, - .max_data_write = 5, - .command = sb600_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - }, - - { /* SPI_CONTROLLER_VIA */ - .max_data_read = 16, - .max_data_write = 16, - .command = ich_spi_send_command, - .multicommand = ich_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - }, - - { /* SPI_CONTROLLER_WBSIO */ - .max_data_read = MAX_DATA_UNSPECIFIED, - .max_data_write = MAX_DATA_UNSPECIFIED, - .command = wbsio_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = wbsio_spi_read, - .write_256 = spi_chip_write_1, - }, - - { /* SPI_CONTROLLER_MCP6X_BITBANG */ - .max_data_read = MAX_DATA_READ_UNLIMITED, - .max_data_write = MAX_DATA_WRITE_UNLIMITED, - .command = bitbang_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - }, -#endif -#endif - -#if CONFIG_FT2232_SPI == 1 - { /* SPI_CONTROLLER_FT2232 */ - .max_data_read = 64 * 1024, - .max_data_write = 256, - .command = ft2232_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - }, -#endif - -#if CONFIG_DUMMY == 1 - { /* SPI_CONTROLLER_DUMMY */ - .max_data_read = MAX_DATA_READ_UNLIMITED, - .max_data_write = MAX_DATA_UNSPECIFIED, - .command = dummy_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = dummy_spi_write_256, - }, -#endif - -#if CONFIG_BUSPIRATE_SPI == 1 - { /* SPI_CONTROLLER_BUSPIRATE */ - .max_data_read = 12, - .max_data_write = 12, - .command = buspirate_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - }, -#endif - -#if CONFIG_DEDIPROG == 1 - { /* SPI_CONTROLLER_DEDIPROG */ - .max_data_read = MAX_DATA_UNSPECIFIED, - .max_data_write = MAX_DATA_UNSPECIFIED, - .command = dediprog_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = dediprog_spi_read, - .write_256 = dediprog_spi_write_256, - }, -#endif - -#if CONFIG_RAYER_SPI == 1 - { /* SPI_CONTROLLER_RAYER */ - .max_data_read = MAX_DATA_READ_UNLIMITED, - .max_data_write = MAX_DATA_WRITE_UNLIMITED, - .command = bitbang_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - }, -#endif - -#if CONFIG_NICINTEL_SPI == 1 - { /* SPI_CONTROLLER_NICINTEL */ - .max_data_read = MAX_DATA_READ_UNLIMITED, - .max_data_write = MAX_DATA_WRITE_UNLIMITED, - .command = bitbang_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - }, -#endif - -#if CONFIG_OGP_SPI == 1 - { /* SPI_CONTROLLER_OGP */ - .max_data_read = MAX_DATA_READ_UNLIMITED, - .max_data_write = MAX_DATA_WRITE_UNLIMITED, - .command = bitbang_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - }, -#endif - - {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */ +const struct spi_programmer spi_programmer_none = { + .type = SPI_CONTROLLER_NONE, + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, + .command = NULL, + .multicommand = NULL, + .read = NULL, + .write_256 = NULL, }; -const int spi_programmer_count = ARRAY_SIZE(spi_programmer); +const struct spi_programmer *spi_programmer = &spi_programmer_none; int spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { - if (!spi_programmer[spi_controller].command) { + if (!spi_programmer->command) { msg_perr("%s called, but SPI is unsupported on this " "hardware. Please report a bug at " "flashrom(a)flashrom.org\n", __func__); return 1; } - return spi_programmer[spi_controller].command(writecnt, readcnt, + return spi_programmer->command(writecnt, readcnt, writearr, readarr); } int spi_send_multicommand(struct spi_command *cmds) { - if (!spi_programmer[spi_controller].multicommand) { + if (!spi_programmer->multicommand) { msg_perr("%s called, but SPI is unsupported on this " "hardware. Please report a bug at " "flashrom(a)flashrom.org\n", __func__); return 1; } - return spi_programmer[spi_controller].multicommand(cmds); + return spi_programmer->multicommand(cmds); } int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, @@ -257,7 +99,7 @@ int default_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { - int max_data = spi_programmer[spi_controller].max_data_read; + int max_data = spi_programmer->max_data_read; if (max_data == MAX_DATA_UNSPECIFIED) { msg_perr("%s called, but SPI read chunk size not defined " "on this hardware. Please report a bug at " @@ -269,7 +111,7 @@ int default_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - int max_data = spi_programmer[spi_controller].max_data_write; + int max_data = spi_programmer->max_data_write; if (max_data == MAX_DATA_UNSPECIFIED) { msg_perr("%s called, but SPI write chunk size not defined " "on this hardware. Please report a bug at " @@ -282,7 +124,7 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) { int addrbase = 0; - if (!spi_programmer[spi_controller].read) { + if (!spi_programmer->read) { msg_perr("%s called, but SPI read is unsupported on this " "hardware. Please report a bug at " "flashrom(a)flashrom.org\n", __func__); @@ -308,7 +150,7 @@ "access window.\n"); msg_perr("Read will probably return garbage.\n"); } - return spi_programmer[spi_controller].read(flash, buf, addrbase + start, len); + return spi_programmer->read(flash, buf, addrbase + start, len); } /* @@ -320,14 +162,14 @@ /* real chunksize is up to 256, logical chunksize is 256 */ int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - if (!spi_programmer[spi_controller].write_256) { + if (!spi_programmer->write_256) { msg_perr("%s called, but SPI page write is unsupported on this " "hardware. Please report a bug at " "flashrom(a)flashrom.org\n", __func__); return 1; } - return spi_programmer[spi_controller].write_256(flash, buf, start, len); + return spi_programmer->write_256(flash, buf, start, len); } /* @@ -337,7 +179,7 @@ */ uint32_t spi_get_valid_read_addr(void) { - switch (spi_controller) { + switch (spi_programmer->type) { #if CONFIG_INTERNAL == 1 #if defined(__i386__) || defined(__x86_64__) case SPI_CONTROLLER_ICH7: @@ -349,3 +191,9 @@ return 0; } } + +void register_spi_programmer(const struct spi_programmer *pgm) +{ + spi_programmer = pgm; + buses_supported |= CHIP_BUSTYPE_SPI; +} \ No newline at end of file Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/spi25.c Wed May 11 19:07:07 2011 (r1299) @@ -178,7 +178,7 @@ /* Some SPI controllers do not support commands with writecnt=1 and * readcnt=4. */ - switch (spi_controller) { + switch (spi_programmer->type) { #if CONFIG_INTERNAL == 1 #if defined(__i386__) || defined(__x86_64__) case SPI_CONTROLLER_IT87XX: @@ -1351,7 +1351,7 @@ .readarr = NULL, }}; - switch (spi_controller) { + switch (spi_programmer->type) { #if CONFIG_INTERNAL == 1 #if defined(__i386__) || defined(__x86_64__) case SPI_CONTROLLER_IT87XX: Modified: trunk/wbsio_spi.c ============================================================================== --- trunk/wbsio_spi.c Wed May 11 19:07:02 2011 (r1298) +++ trunk/wbsio_spi.c Wed May 11 19:07:07 2011 (r1299) @@ -60,6 +60,20 @@ return flashport; } +static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); +static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); + +static const struct spi_programmer spi_programmer_wbsio = { + .type = SPI_CONTROLLER_WBSIO, + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, + .command = wbsio_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = wbsio_spi_read, + .write_256 = spi_chip_write_1, +}; + int wbsio_check_for_spi(void) { if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT1))) @@ -68,8 +82,7 @@ msg_pspew("\nwbsio_spibase = 0x%x\n", wbsio_spibase); - buses_supported |= CHIP_BUSTYPE_SPI; - spi_controller = SPI_CONTROLLER_WBSIO; + register_spi_programmer(&spi_programmer_wbsio); msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is " "1024 KB!\n", __func__); max_rom_decode.spi = 1024 * 1024; @@ -97,7 +110,7 @@ * Would one more byte of RAM in the chip (to get all 24 bits) really make * such a big difference? */ -int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { int i; @@ -181,7 +194,7 @@ return 0; } -int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { return read_memmapped(flash, buf, start, len); }

1 0

[commit] r1298 - trunk
by repository service 11 May '11

11 May '11

Author: mkarcher Date: Wed May 11 19:07:02 2011 New Revision: 1298 URL: http://flashrom.org/trac/flashrom/changeset/1298 Log: Factor out SPI write/read chunking wrappers. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/bitbang_spi.c trunk/buspirate_spi.c trunk/dummyflasher.c trunk/ft2232_spi.c trunk/ichspi.c trunk/it85spi.c trunk/programmer.h trunk/sb600spi.c trunk/spi.c Modified: trunk/bitbang_spi.c ============================================================================== --- trunk/bitbang_spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/bitbang_spi.c Wed May 11 19:07:02 2011 (r1298) @@ -151,14 +151,3 @@ return 0; } - -int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - /* Maximum read length is unlimited, use 64k bytes. */ - return spi_read_chunked(flash, buf, start, len, 64 * 1024); -} - -int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - return spi_write_chunked(flash, buf, start, len, 256); -} Modified: trunk/buspirate_spi.c ============================================================================== --- trunk/buspirate_spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/buspirate_spi.c Wed May 11 19:07:02 2011 (r1298) @@ -326,13 +326,3 @@ return ret; } - -int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - return spi_read_chunked(flash, buf, start, len, 12); -} - -int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - return spi_write_chunked(flash, buf, start, len, 12); -} Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/dummyflasher.c Wed May 11 19:07:02 2011 (r1298) @@ -507,12 +507,6 @@ return 0; } -int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - /* Maximum read length is unlimited, use 64kB. */ - return spi_read_chunked(flash, buf, start, len, 64 * 1024); -} - int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { return spi_write_chunked(flash, buf, start, len, Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/ft2232_spi.c Wed May 11 19:07:02 2011 (r1298) @@ -352,17 +352,6 @@ return failed ? -1 : 0; } -int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - /* Maximum read length is 64k bytes. */ - return spi_read_chunked(flash, buf, start, len, 64 * 1024); -} - -int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - return spi_write_chunked(flash, buf, start, len, 256); -} - void print_supported_usbdevs(const struct usbdev_status *devs) { int i; Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/ichspi.c Wed May 11 19:07:02 2011 (r1298) @@ -834,26 +834,6 @@ return -1; } -int ich_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len) -{ - int maxdata = 64; - - if (spi_controller == SPI_CONTROLLER_VIA) - maxdata = 16; - - return spi_read_chunked(flash, buf, start, len, maxdata); -} - -int ich_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len) -{ - int maxdata = 64; - - if (spi_controller == SPI_CONTROLLER_VIA) - maxdata = 16; - - return spi_write_chunked(flash, buf, start, len, maxdata); -} - int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { Modified: trunk/it85spi.c ============================================================================== --- trunk/it85spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/it85spi.c Wed May 11 19:07:02 2011 (r1298) @@ -347,14 +347,4 @@ return 0; } -int it85_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len) -{ - return spi_read_chunked(flash, buf, start, len, 64); -} - -int it85_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len) -{ - return spi_write_chunked(flash, buf, start, len, 64); -} - #endif Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sun May 8 02:24:18 2011 (r1297) +++ trunk/programmer.h Wed May 11 19:07:02 2011 (r1298) @@ -374,7 +374,6 @@ void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); #endif @@ -487,8 +486,6 @@ }; int ft2232_spi_init(void); int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); extern const struct usbdev_status devs_ft2232spi[]; void print_supported_usbdevs(const struct usbdev_status *devs); #endif @@ -509,8 +506,6 @@ int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod); int bitbang_spi_shutdown(const struct bitbang_spi_master *master); int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); /* buspirate_spi.c */ struct buspirate_spispeeds { @@ -520,8 +515,6 @@ int buspirate_spi_init(void); int buspirate_spi_shutdown(void); int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); /* dediprog.c */ int dediprog_init(void); @@ -586,7 +579,13 @@ SPI_CONTROLLER_INVALID /* This must always be the last entry. */ }; extern const int spi_programmer_count; + +#define MAX_DATA_UNSPECIFIED 0 +#define MAX_DATA_READ_UNLIMITED 64 * 1024 +#define MAX_DATA_WRITE_UNLIMITED 256 struct spi_programmer { + int max_data_read; + int max_data_write; int (*command)(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int (*multicommand)(struct spi_command *cmds); @@ -601,6 +600,8 @@ int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int default_spi_send_multicommand(struct spi_command *cmds); +int default_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); +int default_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); /* ichspi.c */ #if CONFIG_INTERNAL == 1 @@ -610,8 +611,6 @@ int via_init_spi(struct pci_dev *dev); int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int ich_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len); int ich_spi_send_multicommand(struct spi_command *cmds); #endif @@ -620,8 +619,6 @@ int it85xx_shutdown(void); int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int it85_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len); -int it85_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len); /* it87spi.c */ void enter_conf_mode_ite(uint16_t port); @@ -638,8 +635,6 @@ int sb600_probe_spi(struct pci_dev *dev); int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); #endif /* wbsio_spi.c */ Modified: trunk/sb600spi.c ============================================================================== --- trunk/sb600spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/sb600spi.c Wed May 11 19:07:02 2011 (r1298) @@ -43,17 +43,6 @@ static uint8_t *sb600_spibar = NULL; -int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - /* Maximum read length is 8 bytes. */ - return spi_read_chunked(flash, buf, start, len, 8); -} - -int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - return spi_write_chunked(flash, buf, start, len, 5); -} - static void reset_internal_fifo_pointer(void) { mmio_writeb(mmio_readb(sb600_spibar + 2) | 0x10, sb600_spibar + 2); Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Sun May 8 02:24:18 2011 (r1297) +++ trunk/spi.c Wed May 11 19:07:02 2011 (r1298) @@ -34,6 +34,8 @@ const struct spi_programmer spi_programmer[] = { { /* SPI_CONTROLLER_NONE */ + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, .command = NULL, .multicommand = NULL, .read = NULL, @@ -43,27 +45,35 @@ #if CONFIG_INTERNAL == 1 #if defined(__i386__) || defined(__x86_64__) { /* SPI_CONTROLLER_ICH7 */ + .max_data_read = 64, + .max_data_write = 64, .command = ich_spi_send_command, .multicommand = ich_spi_send_multicommand, - .read = ich_spi_read, - .write_256 = ich_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, { /* SPI_CONTROLLER_ICH9 */ + .max_data_read = 64, + .max_data_write = 64, .command = ich_spi_send_command, .multicommand = ich_spi_send_multicommand, - .read = ich_spi_read, - .write_256 = ich_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, { /* SPI_CONTROLLER_IT85XX */ + .max_data_read = 64, + .max_data_write = 64, .command = it85xx_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = it85_spi_read, - .write_256 = it85_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, { /* SPI_CONTROLLER_IT87XX */ + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, .command = it8716f_spi_send_command, .multicommand = default_spi_send_multicommand, .read = it8716f_spi_chip_read, @@ -71,20 +81,26 @@ }, { /* SPI_CONTROLLER_SB600 */ + .max_data_read = 8, + .max_data_write = 5, .command = sb600_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = sb600_spi_read, - .write_256 = sb600_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, { /* SPI_CONTROLLER_VIA */ + .max_data_read = 16, + .max_data_write = 16, .command = ich_spi_send_command, .multicommand = ich_spi_send_multicommand, - .read = ich_spi_read, - .write_256 = ich_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, { /* SPI_CONTROLLER_WBSIO */ + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, .command = wbsio_spi_send_command, .multicommand = default_spi_send_multicommand, .read = wbsio_spi_read, @@ -92,43 +108,53 @@ }, { /* SPI_CONTROLLER_MCP6X_BITBANG */ + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_WRITE_UNLIMITED, .command = bitbang_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = bitbang_spi_read, - .write_256 = bitbang_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif #endif #if CONFIG_FT2232_SPI == 1 { /* SPI_CONTROLLER_FT2232 */ + .max_data_read = 64 * 1024, + .max_data_write = 256, .command = ft2232_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = ft2232_spi_read, - .write_256 = ft2232_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif #if CONFIG_DUMMY == 1 { /* SPI_CONTROLLER_DUMMY */ + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_UNSPECIFIED, .command = dummy_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = dummy_spi_read, + .read = default_spi_read, .write_256 = dummy_spi_write_256, }, #endif #if CONFIG_BUSPIRATE_SPI == 1 { /* SPI_CONTROLLER_BUSPIRATE */ + .max_data_read = 12, + .max_data_write = 12, .command = buspirate_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = buspirate_spi_read, - .write_256 = buspirate_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif #if CONFIG_DEDIPROG == 1 { /* SPI_CONTROLLER_DEDIPROG */ + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, .command = dediprog_spi_send_command, .multicommand = default_spi_send_multicommand, .read = dediprog_spi_read, @@ -138,28 +164,34 @@ #if CONFIG_RAYER_SPI == 1 { /* SPI_CONTROLLER_RAYER */ + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_WRITE_UNLIMITED, .command = bitbang_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = bitbang_spi_read, - .write_256 = bitbang_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif #if CONFIG_NICINTEL_SPI == 1 { /* SPI_CONTROLLER_NICINTEL */ + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_WRITE_UNLIMITED, .command = bitbang_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = bitbang_spi_read, - .write_256 = bitbang_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif #if CONFIG_OGP_SPI == 1 { /* SPI_CONTROLLER_OGP */ + .max_data_read = MAX_DATA_READ_UNLIMITED, + .max_data_write = MAX_DATA_WRITE_UNLIMITED, .command = bitbang_spi_send_command, .multicommand = default_spi_send_multicommand, - .read = bitbang_spi_read, - .write_256 = bitbang_spi_write_256, + .read = default_spi_read, + .write_256 = default_spi_write_256, }, #endif @@ -223,6 +255,30 @@ return result; } +int default_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + int max_data = spi_programmer[spi_controller].max_data_read; + if (max_data == MAX_DATA_UNSPECIFIED) { + msg_perr("%s called, but SPI read chunk size not defined " + "on this hardware. Please report a bug at " + "flashrom(a)flashrom.org\n", __func__); + return 1; + } + return spi_read_chunked(flash, buf, start, len, max_data); +} + +int default_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + int max_data = spi_programmer[spi_controller].max_data_write; + if (max_data == MAX_DATA_UNSPECIFIED) { + msg_perr("%s called, but SPI write chunk size not defined " + "on this hardware. Please report a bug at " + "flashrom(a)flashrom.org\n", __func__); + return 1; + } + return spi_write_chunked(flash, buf, start, len, max_data); +} + int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) { int addrbase = 0;

1 0

flashrom, hardened gentoo (grsecurity) and iopl()
by Антон Кочков 09 May '11

09 May '11

Good day! Just found that flashrom doesnt work on some hardened configuration - Hardened Gentoo - on hardened kernel-2.6.38 Linux xserver 2.6.38-hardened #1 SMP Wed Apr 20 02:19:23 CEST 2011 x86_64 Intel(R) Core(TM) i7 CPU 930 @ 2.80GHz GenuineIntel GNU/Linux flashrom v0.9.3-r1297 on Linux 2.6.38-hardened (x86_64), built with libpci 3.1.7, GCC 4.5.2, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1530M loops per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 996 us, 10000 myus = 9977 us, 4 myus = 4 us, OK. Initializing internal programmer ERROR: Could not get I/O privileges (Operation not permitted). You need to be root. And this from dmesg: [1578171.686680] grsec: From 79.111.220.160: denied use of iopl() by /home/xvilka/flashrom/flashrom[flashrom:10596] uid/euid:0/0 gid/egid:0/0, parent /bin/bash[bash:10591] uid/euid:0/0 gid/egid:0/0 [1578218.043347] grsec: From 79.111.220.160: denied use of iopl() by /home/xvilka/flashrom/flashrom[flashrom:10612] uid/euid:0/0 gid/egid:0/0, parent /bin/bash[bash:10606] uid/euid:0/0 gid/egid:0/0 [1578388.047996] grsec: From 79.111.220.160: denied use of iopl() by /home/xvilka/flashrom/flashrom[flashrom:10645] uid/euid:0/0 gid/egid:0/0, parent /bin/bash[bash:10606] uid/euid:0/0 gid/egid:0/0 And found this theme http://forums.grsecurity.net/viewtopic.php?t=1654 So, for access ioperm() and iopl() you need disable "Disable Privileged I/O (CONFIG_GRKERSEC_IO)" option in kernel config. Can we print this message when found such configuration? Are there way to make port access without iopl()? Best regards, Anton Kochkov.

3 3

Tyan S8230 support
by Anton Rommerskirchen 08 May '11

08 May '11

Hello ! got a littel talk with the helpstar guys from tyan. The problem is to get a S8230 to be updated. the suggested way of using a usb stick means to take a windows 98 or 95, format and so on. I tried freedos and their tool stuck - no flash at all. for linux i got a hint to flashrom, but the board seems to be not supportet now. is their any way to circumvent this or do i have a chance to get support for the S8230 board in near future ? according to the doc its a AMD SP5100 and SR5690, winbond w83627 chispset. best regards Anton Rommerskirchen

1 0

[PATCH] Intel NIC with parallel flash
by Carl-Daniel Hailfinger 07 May '11

07 May '11

Intel NIC with parallel flash support. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> -- http://www.hailfinger.org/

2 4

[commit] r1297 - trunk
by repository service 07 May '11

07 May '11

Author: hailfinger Date: Sun May 8 02:24:18 2011 New Revision: 1297 URL: http://flashrom.org/trac/flashrom/changeset/1297 Log: Intel NIC with parallel flash support. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Tested-by: Anton Kochkov <anton.kochkov(a)gmail.com> Acked-by: Anton Kochkov <anton.kochkov(a)gmail.com> Tested-by: Maciej Pijanka <maciej.pijanka(a)gmail.com> Added: trunk/nicintel.c Modified: trunk/Makefile trunk/flashrom.c trunk/print.c trunk/print_wiki.c trunk/programmer.h Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sat May 7 21:19:36 2011 (r1296) +++ trunk/Makefile Sun May 8 02:24:18 2011 (r1297) @@ -178,6 +178,9 @@ # Disable National Semiconductor NICs until support is complete and tested. CONFIG_NICNATSEMI ?= no +# Always enable Intel NICs for now. +CONFIG_NICINTEL ?= yes + # Always enable SPI on Intel NICs for now. CONFIG_NICINTEL_SPI ?= yes @@ -297,6 +300,12 @@ NEED_PCI := yes endif +ifeq ($(CONFIG_NICINTEL), yes) +FEATURE_CFLAGS += -D'CONFIG_NICINTEL=1' +PROGRAMMER_OBJS += nicintel.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_NICINTEL_SPI), yes) FEATURE_CFLAGS += -D'CONFIG_NICINTEL_SPI=1' PROGRAMMER_OBJS += nicintel_spi.o Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sat May 7 21:19:36 2011 (r1296) +++ trunk/flashrom.c Sun May 8 02:24:18 2011 (r1297) @@ -52,7 +52,7 @@ * if more than one of them is selected. If only one is selected, it is clear * that the user wants that one to become the default. */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV > 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV > 1 #error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all programmers except one. #endif enum programmer programmer = @@ -92,6 +92,9 @@ #if CONFIG_RAYER_SPI == 1 PROGRAMMER_RAYER_SPI #endif +#if CONFIG_NICINTEL == 1 + PROGRAMMER_NICINTEL +#endif #if CONFIG_NICINTEL_SPI == 1 PROGRAMMER_NICINTEL_SPI #endif @@ -386,6 +389,25 @@ .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + +#if CONFIG_NICINTEL == 1 + { + .name = "nicintel", + .init = nicintel_init, + .shutdown = nicintel_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = nicintel_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicintel_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, .delay = internal_delay, }, #endif Added: trunk/nicintel.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/nicintel.c Sun May 8 02:24:18 2011 (r1297) @@ -0,0 +1,109 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2011 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Datasheet: http://download.intel.com/design/network/datashts/82559_Fast_Ethernet_Multi… */ + +#include <stdlib.h> +#include "flash.h" +#include "programmer.h" + +uint8_t *nicintel_bar; +uint8_t *nicintel_control_bar; + +const struct pcidev_status nics_intel[] = { + {PCI_VENDOR_ID_INTEL, 0x1209, NT, "Intel", "8255xER/82551IT Fast Ethernet Controller"}, + {PCI_VENDOR_ID_INTEL, 0x1229, NT, "Intel", "82557/8/9/0/1 Ethernet Pro 100"}, + + {}, +}; + +/* Arbitrary limit, taken from the datasheet I just had lying around. + * 128 kByte on the 82559 device. Or not. Depends on whom you ask. + */ +#define NICINTEL_MEMMAP_SIZE (128 * 1024) +#define NICINTEL_MEMMAP_MASK (NICINTEL_MEMMAP_SIZE - 1) + +#define CSR_FCR 0x0c + +int nicintel_init(void) +{ + uintptr_t addr; + + /* Needed only for PCI accesses on some platforms. + * FIXME: Refactor that into get_mem_perms/get_io_perms/get_pci_perms? + */ + get_io_perms(); + + /* No need to check for errors, pcidev_init() will not return in case + * of errors. + * FIXME: BAR2 is not available if the device uses the CardBus function. + */ + addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); + + nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); + if (nicintel_bar == ERROR_PTR) + goto error_out; + + /* FIXME: Using pcidev_dev _will_ cause pretty explosions in the future. */ + addr = pcidev_validate(pcidev_dev, PCI_BASE_ADDRESS_0, nics_intel); + /* FIXME: This is not an aligned mapping. Use 4k? */ + nicintel_control_bar = physmap("Intel NIC control/status reg", addr, 0x10); + if (nicintel_control_bar == ERROR_PTR) + goto error_out; + + /* FIXME: This register is pretty undocumented in all publicly available + * documentation from Intel. Let me quote the complete info we have: + * "Flash Control Register: The Flash Control register allows the CPU to + * enable writes to an external Flash. The Flash Control Register is a + * 32-bit field that allows access to an external Flash device." + * Ah yes, we also know where it is, but we have absolutely _no_ idea + * what we should do with it. Write 0x0001 because we have nothing + * better to do with our time. + */ + pci_rmmio_writew(0x0001, nicintel_control_bar + CSR_FCR); + + buses_supported = CHIP_BUSTYPE_PARALLEL; + + max_rom_decode.parallel = NICINTEL_MEMMAP_SIZE; + + return 0; + +error_out: + pci_cleanup(pacc); + release_io_perms(); + return 1; +} + +int nicintel_shutdown(void) +{ + physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); + pci_cleanup(pacc); + release_io_perms(); + return 0; +} + +void nicintel_chip_writeb(uint8_t val, chipaddr addr) +{ + pci_mmio_writeb(val, nicintel_bar + (addr & NICINTEL_MEMMAP_MASK)); +} + +uint8_t nicintel_chip_readb(const chipaddr addr) +{ + return pci_mmio_readb(nicintel_bar + (addr & NICINTEL_MEMMAP_MASK)); +} Modified: trunk/print.c ============================================================================== --- trunk/print.c Sat May 7 21:19:36 2011 (r1296) +++ trunk/print.c Sun May 8 02:24:18 2011 (r1297) @@ -304,6 +304,11 @@ /* FIXME */ printf("RayeR parallel port programmer\n"); #endif +#if CONFIG_NICINTEL == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_NICINTEL].name); + print_supported_pcidevs(nics_intel); +#endif #if CONFIG_NICINTEL_SPI == 1 printf("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICINTEL_SPI].name); Modified: trunk/print_wiki.c ============================================================================== --- trunk/print_wiki.c Sat May 7 21:19:36 2011 (r1296) +++ trunk/print_wiki.c Sun May 8 02:24:18 2011 (r1297) @@ -247,7 +247,7 @@ } /* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 static void print_supported_pcidevs_wiki(const struct pcidev_status *devs) { int i = 0; @@ -298,6 +298,9 @@ #if CONFIG_ATAHPT == 1 print_supported_pcidevs_wiki(ata_hpt); #endif +#if CONFIG_NICINTEL == 1 + print_supported_pcidevs_wiki(nics_intel); +#endif #if CONFIG_NICINTEL_SPI == 1 print_supported_pcidevs_wiki(nics_intel_spi); #endif Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Sat May 7 21:19:36 2011 (r1296) +++ trunk/programmer.h Sun May 8 02:24:18 2011 (r1297) @@ -67,6 +67,9 @@ #if CONFIG_RAYER_SPI == 1 PROGRAMMER_RAYER_SPI, #endif +#if CONFIG_NICINTEL == 1 + PROGRAMMER_NICINTEL, +#endif #if CONFIG_NICINTEL_SPI == 1 PROGRAMMER_NICINTEL_SPI, #endif @@ -232,7 +235,7 @@ #endif /* print.c */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 void print_supported_pcidevs(const struct pcidev_status *devs); #endif @@ -420,6 +423,15 @@ extern const struct pcidev_status nics_natsemi[]; #endif +/* nicintel.c */ +#if CONFIG_NICINTEL == 1 +int nicintel_init(void); +int nicintel_shutdown(void); +void nicintel_chip_writeb(uint8_t val, chipaddr addr); +uint8_t nicintel_chip_readb(const chipaddr addr); +extern const struct pcidev_status nics_intel[]; +#endif + /* nicintel_spi.c */ #if CONFIG_NICINTEL_SPI == 1 int nicintel_spi_init(void);

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[PATCH] Fix multiple detection of the same chip
by Carl-Daniel Hailfinger 07 May '11

07 May '11

Fix multiple detection of the same chip. r1293 introduced a bug which caused probing to loop at the first found chip. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> -- http://www.hailfinger.org/

2 2

[commit] r1296 - trunk
by repository service 07 May '11

07 May '11

Author: hailfinger Date: Sat May 7 21:19:36 2011 New Revision: 1296 URL: http://flashrom.org/trac/flashrom/changeset/1296 Log: Fix multiple detection of the same chip. r1293 introduced a bug which caused probing to loop at the first found chip. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/cli_classic.c Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Thu May 5 19:52:07 2011 (r1295) +++ trunk/cli_classic.c Sat May 7 21:19:36 2011 (r1296) @@ -368,6 +368,7 @@ if (startchip == -1) break; chipcount++; + startchip++; } if (chipcount > 1) {

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flashrom May 2011