flashrom February 2011

flashrom@flashrom.org

37 participants
119 discussions

[PATCH 1/1] Kill unused __FLASHROM_HAVE_OUTB__ define
by Peter Lemenkov 18 May '11

18 May '11

Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- hwaccess.h | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/hwaccess.h b/hwaccess.h index 63a2bf2..d125890 100644 --- a/hwaccess.h +++ b/hwaccess.h @@ -163,8 +163,6 @@ cpu_to_be(64) #if NEED_PCI == 1 #if defined (__i386__) || defined (__x86_64__) -#define __FLASHROM_HAVE_OUTB__ 1 - /* for iopl and outb under Solaris */ #if defined (__sun) && (defined(__i386) || defined(__amd64)) #include <strings.h> -- 1.7.2.3

2 1

[PATCH] Constify flashchips array
by Carl-Daniel Hailfinger 04 May '11

04 May '11

Constify flashchips array. This moves 99.5% of the .data section to .rodata (which ends up in .text). Disadvantages: We have one additional memcpy with sizeof(struct flashchip) per executed probe. This is purely startup cost and won't have any impact on operation after probing. Tests would be appreciated, especially with machines having multiple chips. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-const_flashchips/flash.h =================================================================== --- flashrom-const_flashchips/flash.h (Revision 1252) +++ flashrom-const_flashchips/flash.h (Arbeitskopie) @@ -173,7 +173,7 @@ #define TIMING_IGNORED -1 #define TIMING_ZERO -2 -extern struct flashchip flashchips[]; +extern const struct flashchip flashchips[]; /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); @@ -193,7 +193,7 @@ void map_flash_registers(struct flashchip *flash); int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len); int erase_flash(struct flashchip *flash); -struct flashchip *probe_flash(struct flashchip *first_flash, int force); +int probe_flash(int startchip, struct flashchip *fill_flash, int force); int read_flash_to_file(struct flashchip *flash, char *filename); int min(int a, int b); int max(int a, int b); Index: flashrom-const_flashchips/cli_classic.c =================================================================== --- flashrom-const_flashchips/cli_classic.c (Revision 1252) +++ flashrom-const_flashchips/cli_classic.c (Arbeitskopie) @@ -100,7 +100,11 @@ { unsigned long size; /* Probe for up to three flash chips. */ - struct flashchip *flash, *flashes[3]; + const struct flashchip *flash; + struct flashchip flashes[3]; + struct flashchip *fill_flash; + int startchip = 0; + int chipcount = 0; const char *name; int namelen; int opt; @@ -359,49 +363,47 @@ exit(1); } - /* FIXME: Delay calibration should happen in programmer code. */ for (i = 0; i < ARRAY_SIZE(flashes); i++) { - flashes[i] = - probe_flash(i ? flashes[i - 1] + 1 : flashchips, 0); - if (!flashes[i]) - for (i++; i < ARRAY_SIZE(flashes); i++) - flashes[i] = NULL; + startchip = probe_flash(startchip, &flashes[i], 0); + if (startchip == -1) + break; + chipcount++; } - if (flashes[1]) { + if (chipcount > 1) { printf("Multiple flash chips were detected:"); - for (i = 0; i < ARRAY_SIZE(flashes) && flashes[i]; i++) - printf(" %s", flashes[i]->name); + for (i = 0; i < chipcount; i++) + printf(" %s", flashes[i].name); printf("\nPlease specify which chip to use with the -c <chipname> option.\n"); programmer_shutdown(); exit(1); - } else if (!flashes[0]) { + } else if (!chipcount) { printf("No EEPROM/flash device found.\n"); if (!force || !chip_to_probe) { printf("Note: flashrom can never write if the flash chip isn't found automatically.\n"); } if (force && read_it && chip_to_probe) { printf("Force read (-f -r -c) requested, pretending the chip is there:\n"); - flashes[0] = probe_flash(flashchips, 1); - if (!flashes[0]) { + startchip = probe_flash(0, &flashes[0], 1); + if (startchip == -1) { printf("Probing for flash chip '%s' failed.\n", chip_to_probe); programmer_shutdown(); exit(1); } printf("Please note that forced reads most likely contain garbage.\n"); - return read_flash_to_file(flashes[0], filename); + return read_flash_to_file(&flashes[0], filename); } // FIXME: flash writes stay enabled! programmer_shutdown(); exit(1); } - flash = flashes[0]; + fill_flash = &flashes[0]; - check_chip_supported(flash); + check_chip_supported(fill_flash); - size = flash->total_size * 1024; - if (check_max_decode((buses_supported & flash->bustype), size) && + size = fill_flash->total_size * 1024; + if (check_max_decode((buses_supported & fill_flash->bustype), size) && (!force)) { fprintf(stderr, "Chip is too big for this programmer " "(-V gives details). Use --force to override.\n"); @@ -432,5 +434,5 @@ * Give the chip time to settle. */ programmer_delay(100000); - return doit(flash, force, filename, read_it, write_it, erase_it, verify_it); + return doit(fill_flash, force, filename, read_it, write_it, erase_it, verify_it); } Index: flashrom-const_flashchips/print_wiki.c =================================================================== --- flashrom-const_flashchips/print_wiki.c (Revision 1252) +++ flashrom-const_flashchips/print_wiki.c (Arbeitskopie) @@ -201,7 +201,7 @@ static void print_supported_chips_wiki(int cols) { int i = 0, c = 1, chipcount = 0; - struct flashchip *f, *old = NULL; + const struct flashchip *f, *old = NULL; uint32_t t; for (f = flashchips; f->name != NULL; f++) Index: flashrom-const_flashchips/flashchips.c =================================================================== --- flashrom-const_flashchips/flashchips.c (Revision 1252) +++ flashrom-const_flashchips/flashchips.c (Arbeitskopie) @@ -32,7 +32,7 @@ * Please keep the list sorted by vendor name and chip name, so that * the output of 'flashrom -L' is alphabetically sorted. */ -struct flashchip flashchips[] = { +const struct flashchip flashchips[] = { /* * .vendor = Vendor name Index: flashrom-const_flashchips/flashrom.c =================================================================== --- flashrom-const_flashchips/flashrom.c (Revision 1252) +++ flashrom-const_flashchips/flashrom.c (Arbeitskopie) @@ -1123,15 +1123,15 @@ return 1; } -struct flashchip *probe_flash(struct flashchip *first_flash, int force) +int probe_flash(int startchip, struct flashchip *fill_flash, int force) { - struct flashchip *flash; + const struct flashchip *flash; unsigned long base = 0; uint32_t size; enum chipbustype buses_common; char *tmp; - for (flash = first_flash; flash && flash->name; flash++) { + for (flash = flashchips + startchip; flash && flash->name; flash++) { if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) continue; msg_gdbg("Probing for %s %s, %d KB: ", @@ -1158,25 +1158,35 @@ size = flash->total_size * 1024; check_max_decode(buses_common, size); + /* Start filling in the dynamic data. */ + *fill_flash = *flash; + base = flashbase ? flashbase : (0xffffffff - size + 1); - flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size); + fill_flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size); if (force) break; - if (flash->probe(flash) != 1) + if (fill_flash->probe(fill_flash) != 1) goto notfound; - if (first_flash == flashchips - || flash->model_id != GENERIC_DEVICE_ID) + /* If this is the first chip found, accept it. + * If this is not the first chip found, accept it only if it is + * a non-generic match. + * We could either make chipcount global or provide it as + * parameter, or we assume that startchip==0 means this call to + * probe_flash() is the first one and thus no chip has been + * found before. + */ + if (startchip == 0 || fill_flash->model_id != GENERIC_DEVICE_ID) break; notfound: - programmer_unmap_flash_region((void *)flash->virtual_memory, size); + programmer_unmap_flash_region((void *)fill_flash->virtual_memory, size); } if (!flash || !flash->name) - return NULL; + return -1; msg_cinfo("%s chip \"%s %s\" (%d KB, %s) at physical address 0x%lx.\n", force ? "Assuming" : "Found", @@ -1187,10 +1197,11 @@ * may be stored in registers, so avoid lock info printing. */ if (!force) - if (flash->printlock) - flash->printlock(flash); + if (fill_flash->printlock) + fill_flash->printlock(fill_flash); - return flash; + /* Return position of matching chip. */ + return flash - flashchips; } int verify_flash(struct flashchip *flash, uint8_t *buf) @@ -1299,7 +1310,7 @@ * walk_eraseregions(). * Even if an error is found, the function will keep going and check the rest. */ -static int selfcheck_eraseblocks(struct flashchip *flash) +static int selfcheck_eraseblocks(const struct flashchip *flash) { int i, j, k; int ret = 0; @@ -1676,7 +1687,7 @@ int selfcheck(void) { int ret = 0; - struct flashchip *flash; + const struct flashchip *flash; /* Safety check. Instead of aborting after the first error, check * if more errors exist. @@ -1695,7 +1706,7 @@ return ret; } -void check_chip_supported(struct flashchip *flash) +void check_chip_supported(const struct flashchip *flash) { if (TEST_OK_MASK != (flash->tested & TEST_OK_MASK)) { msg_cinfo("===\n"); Index: flashrom-const_flashchips/programmer.h =================================================================== --- flashrom-const_flashchips/programmer.h (Revision 1252) +++ flashrom-const_flashchips/programmer.h (Arbeitskopie) @@ -497,7 +497,7 @@ extern struct decode_sizes max_rom_decode; extern int programmer_may_write; extern unsigned long flashbase; -void check_chip_supported(struct flashchip *flash); +void check_chip_supported(const struct flashchip *flash); int check_max_decode(enum chipbustype buses, uint32_t size); char *extract_programmer_param(char *param_name); Index: flashrom-const_flashchips/print.c =================================================================== --- flashrom-const_flashchips/print.c (Revision 1252) +++ flashrom-const_flashchips/print.c (Arbeitskopie) @@ -78,7 +78,7 @@ { int okcol = 0, pos = 0, i, chipcount = 0; int maxchiplen = 0, maxvendorlen = 0; - struct flashchip *f; + const struct flashchip *f; for (f = flashchips; f->name != NULL; f++) { /* Ignore "unknown XXXX SPI chip" entries. */ -- http://www.hailfinger.org/

3 7

[PATCH] Revert MMIO space writes on shutdown as needed.
by Carl-Daniel Hailfinger 03 May '11

03 May '11

Revert MMIO space writes on shutdown as needed. Reversible MMIO space writes now use rmmio_write*(). MMIO space writes which are one-shot (e.g. communication with some chip) should continue to use the permanent mmio_write* variants. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-mmio_shutdown_restore/hwaccess.c =================================================================== --- flashrom-mmio_shutdown_restore/hwaccess.c (Revision 1234) +++ flashrom-mmio_shutdown_restore/hwaccess.c (Arbeitskopie) @@ -184,3 +184,71 @@ { return le_to_cpu32(mmio_readl(addr)); } + +enum mmio_write_type { + mmio_write_type_b, + mmio_write_type_w, + mmio_write_type_l, +}; + +struct undo_mmio_write_data { + void *addr; + int reg; + enum mmio_write_type type; + union { + uint8_t bdata; + uint16_t wdata; + uint32_t ldata; + }; +}; + +void undo_mmio_write(void *p) +{ + struct undo_mmio_write_data *data = p; + msg_pdbg("Restoring MMIO space at %p\n", data->addr); + switch (data->type) { + case mmio_write_type_b: + mmio_writeb(data->bdata, data->addr); + break; + case mmio_write_type_w: + mmio_writeb(data->wdata, data->addr); + break; + case mmio_write_type_l: + mmio_writeb(data->ldata, data->addr); + break; + } + /* p was allocated in register_undo_mmio_write. */ + free(p); +} + +#define register_undo_mmio_write(a, c) \ +{ \ + struct undo_mmio_write_data *undo_mmio_write_data; \ + undo_mmio_write_data = malloc(sizeof(struct undo_mmio_write_data)); \ + undo_mmio_write_data->addr = a; \ + undo_mmio_write_data->type = mmio_write_type_##c; \ + undo_mmio_write_data->c##data = mmio_read##c(a); \ + register_shutdown(undo_mmio_write, undo_mmio_write_data); \ +} + +#define register_undo_mmio_writeb(a) register_undo_mmio_write(a, b) +#define register_undo_mmio_writew(a) register_undo_mmio_write(a, w) +#define register_undo_mmio_writel(a) register_undo_mmio_write(a, l) + +void rmmio_writeb(uint8_t val, void *addr) +{ + register_undo_mmio_writeb(addr); + mmio_writeb(val, addr); +} + +void rmmio_writew(uint16_t val, void *addr) +{ + register_undo_mmio_writew(addr); + mmio_writew(val, addr); +} + +void rmmio_writel(uint32_t val, void *addr) +{ + register_undo_mmio_writel(addr); + mmio_writel(val, addr); +} Index: flashrom-mmio_shutdown_restore/ichspi.c =================================================================== --- flashrom-mmio_shutdown_restore/ichspi.c (Revision 1234) +++ flashrom-mmio_shutdown_restore/ichspi.c (Arbeitskopie) @@ -382,16 +382,16 @@ switch (spi_controller) { case SPI_CONTROLLER_ICH7: case SPI_CONTROLLER_VIA: - REGWRITE16(ICH7_REG_PREOP, preop); - REGWRITE16(ICH7_REG_OPTYPE, optype); - REGWRITE32(ICH7_REG_OPMENU, opmenu[0]); - REGWRITE32(ICH7_REG_OPMENU + 4, opmenu[1]); + rmmio_writew(preop, ich_spibar + ICH7_REG_PREOP); + rmmio_writew(optype, ich_spibar + ICH7_REG_OPTYPE); + rmmio_writew(opmenu[0], ich_spibar + ICH7_REG_OPMENU); + rmmio_writew(opmenu[1], ich_spibar + ICH7_REG_OPMENU + 4); break; case SPI_CONTROLLER_ICH9: - REGWRITE16(ICH9_REG_PREOP, preop); - REGWRITE16(ICH9_REG_OPTYPE, optype); - REGWRITE32(ICH9_REG_OPMENU, opmenu[0]); - REGWRITE32(ICH9_REG_OPMENU + 4, opmenu[1]); + rmmio_writew(preop, ich_spibar + ICH9_REG_PREOP); + rmmio_writew(optype, ich_spibar + ICH9_REG_OPTYPE); + rmmio_writew(opmenu[0], ich_spibar + ICH9_REG_OPMENU); + rmmio_writew(opmenu[1], ich_spibar + ICH9_REG_OPMENU + 4); break; default: msg_perr("%s: unsupported chipset\n", __func__); @@ -409,16 +409,20 @@ { switch (spi_controller) { case SPI_CONTROLLER_ICH7: - mmio_writel(minaddr, ich_spibar + 0x50); + rmmio_writel(minaddr, ich_spibar + 0x50); ichspi_bbar = mmio_readl(ich_spibar + 0x50); - /* We don't have any option except complaining. */ + /* We don't have any option except complaining. And if the write + * failed, the restore will fail as well, so no problem there. + */ if (ichspi_bbar != minaddr) msg_perr("Setting BBAR failed!\n"); break; case SPI_CONTROLLER_ICH9: - mmio_writel(minaddr, ich_spibar + 0xA0); + rmmio_writel(minaddr, ich_spibar + 0xA0); ichspi_bbar = mmio_readl(ich_spibar + 0xA0); - /* We don't have any option except complaining. */ + /* We don't have any option except complaining. And if the write + * failed, the restore will fail as well, so no problem there. + */ if (ichspi_bbar != minaddr) msg_perr("Setting BBAR failed!\n"); break; Index: flashrom-mmio_shutdown_restore/nicintel_spi.c =================================================================== --- flashrom-mmio_shutdown_restore/nicintel_spi.c (Revision 1234) +++ flashrom-mmio_shutdown_restore/nicintel_spi.c (Arbeitskopie) @@ -149,6 +149,7 @@ nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, 4096); + /* Automatic restore is not possible because we only change two bits. */ tmp = pci_mmio_readl(nicintel_spibar + EECD); tmp &= ~FLASH_WRITES_DISABLED; tmp |= FLASH_WRITES_ENABLED; @@ -168,6 +169,7 @@ { uint32_t tmp; + /* Automatic restore is not possible because we only change two bits. */ tmp = pci_mmio_readl(nicintel_spibar + EECD); tmp &= ~FLASH_WRITES_ENABLED; tmp |= FLASH_WRITES_DISABLED; Index: flashrom-mmio_shutdown_restore/programmer.h =================================================================== --- flashrom-mmio_shutdown_restore/programmer.h (Revision 1234) +++ flashrom-mmio_shutdown_restore/programmer.h (Arbeitskopie) @@ -311,6 +311,9 @@ #define pci_mmio_readb mmio_le_readb #define pci_mmio_readw mmio_le_readw #define pci_mmio_readl mmio_le_readl +void rmmio_writeb(uint8_t val, void *addr); +void rmmio_writew(uint16_t val, void *addr); +void rmmio_writel(uint32_t val, void *addr); /* programmer.c */ int noop_shutdown(void); -- http://www.hailfinger.org/

2 4

[PATCH] ICH SPI paranoid error handling
by Carl-Daniel Hailfinger 24 Apr '11

24 Apr '11

Some people have reported that running flashrom on Ibex Peak (after patching in the PCI ID 0x8086:0x3b02) will not only hang flashrom during the first RES/REMS command issued, it may even cause the machine to lock up or issue a hard reset. We suspect this is because RES/REMS are commands with an address, whereas RDID does not take an address and works fine. Our current ICH SPI code doesn't really follow the datasheets and uses lots of hope instead of error checking in the wrong places. This patch will fail early and fail often if something is odd. As such, merge is not recommended, but running it should definitely generating interesting results on all Intel chipsets with SPI, and especially on Ibex Peak. It probably won't fix the hang, but it should be pretty good at spewing an error before the machine dies. Untested. Highly likely to explode on VIA chipsets which use the same interface but have docs only under NDA. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-ich_spi_fcerr_fcdone_paranoia/chipset_enable.c =================================================================== --- flashrom-ich_spi_fcerr_fcdone_paranoia/chipset_enable.c (Revision 1052) +++ flashrom-ich_spi_fcerr_fcdone_paranoia/chipset_enable.c (Arbeitskopie) @@ -579,8 +579,20 @@ mmio_readl(spibar + 0x80)); msg_pdbg("0x84: 0x%08x (PR4)\n", mmio_readl(spibar + 0x84)); - msg_pdbg("0x90: 0x%08x (SSFS, SSFC)\n", - mmio_readl(spibar + 0x90)); + + tmp = mmio_readl(spibar + 0x90); + msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff); + msg_pdbg("AEL %i, ", (tmp >> 4) & 1); + msg_pdbg("FCERR %i, ", (tmp >> 3) & 1); + msg_pdbg("FDONE %i, ", (tmp >> 2) & 1); + msg_pdbg("SCIP %i\n", (tmp >> 0) & 1); + if (tmp & (1 << 3)) { + msg_pdbg("Clearing SSFS.FCERR\n"); + mmio_writeb(1 << 3, spibar + 0x90); + } + tmp >>= 8; + msg_pdbg("0x91: 0x%06x (SSFC)\n", tmp); + msg_pdbg("0x94: 0x%04x (PREOP)\n", mmio_readw(spibar + 0x94)); msg_pdbg("0x96: 0x%04x (OPTYPE)\n", Index: flashrom-ich_spi_fcerr_fcdone_paranoia/ichspi.c =================================================================== --- flashrom-ich_spi_fcerr_fcdone_paranoia/ichspi.c (Revision 1052) +++ flashrom-ich_spi_fcerr_fcdone_paranoia/ichspi.c (Arbeitskopie) @@ -413,6 +413,12 @@ write_cmd = 1; } + /* FIXME: This should be a time-limited while loop. */ + if (REGREAD16(ICH7_REG_SPIS) & SPIS_SCIP) { + msg_perr("Error: Totally unhandled SCIP condition!\n"); + return 1; + } + /* Programm Offset in Flash into FADDR */ REGWRITE32(ICH7_REG_SPIA, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ @@ -486,18 +492,22 @@ /* write it */ REGWRITE16(ICH7_REG_SPIC, temp16); - /* wait for cycle complete */ - timeout = 100 * 1000 * 60; // 60s is a looong timeout. - while (((REGREAD16(ICH7_REG_SPIS) & SPIS_CDS) == 0) && --timeout) { + /* Wait for Cycle Done Status or Flash Cycle Error. */ + timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */ + while (((REGREAD16(ICH7_REG_SPIS) & (SPIS_CDS | SPIS_FCERR)) == 0) && + --timeout) { programmer_delay(10); } if (!timeout) { msg_perr("timeout\n"); + return 1; } /* FIXME: make sure we do not needlessly cause transaction errors. */ - if ((REGREAD16(ICH7_REG_SPIS) & SPIS_FCERR) != 0) { - msg_pdbg("Transaction error!\n"); + if (REGREAD16(ICH7_REG_SPIS) & SPIS_FCERR) { + msg_perr("Transaction error for opcode 0x%02x!\n", + op.opcode); + REGWRITE16(ICH7_REG_SPIS, SPIS_FCERR); return 1; } @@ -532,6 +542,12 @@ write_cmd = 1; } + /* FIXME: This should be a time-limited while loop. */ + if (REGREAD16(ICH9_REG_SSFS) & SSFS_SCIP) { + msg_perr("Error: Totally unhandled SCIP condition!\n"); + return 1; + } + /* Programm Offset in Flash into FADDR */ REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ @@ -605,18 +621,23 @@ /* write it */ REGWRITE32(ICH9_REG_SSFS, temp32); - /*wait for cycle complete */ - timeout = 100 * 1000 * 60; // 60s is a looong timeout. - while (((REGREAD32(ICH9_REG_SSFS) & SSFS_CDS) == 0) && --timeout) { + /* Wait for Cycle Done Status or Flash Cycle Error. */ + timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */ + while (((REGREAD32(ICH9_REG_SSFS) & (SSFS_CDS | SSFS_FCERR)) == 0) && + --timeout) { programmer_delay(10); } if (!timeout) { msg_perr("timeout\n"); + return 1; } /* FIXME make sure we do not needlessly cause transaction errors. */ - if ((REGREAD32(ICH9_REG_SSFS) & SSFS_FCERR) != 0) { - msg_pdbg("Transaction error!\n"); + if (REGREAD32(ICH9_REG_SSFS) & SSFS_FCERR) { + msg_perr("Transaction error for opcode 0x%02x!\n", + op.opcode); + //FIXME: Really REGWRITE8? + REGWRITE8(ICH9_REG_SSFS, SSFS_FCERR); return 1; } -- http://www.hailfinger.org/

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#4: pciutils-dev and Mac OSX
by flashrom 22 Apr '11

22 Apr '11

#4: pciutils-dev and Mac OSX -------------------------------------+------------------------------- Reporter: roufignouf@… | Owner: hailfinger Type: defect | Status: new Priority: major | Milestone: flashrom 0.9.2 Component: flashrom | Version: Keywords: | Dependencies: Patch Status: there is no patch | -------------------------------------+------------------------------- Hi, I try to build flashrom on my macbook but i can't find pciutils-dev for it could you help me ? {{{ Checking for a C compiler... ld: warning: in /System/Library/Frameworks//DirectIO.framework/DirectIO, file was built for i386 which is not the architecture being linked (x86_64) found. Checking for libpci headers... not found. Please install libpci headers (package pciutils-devel). See README for more information. make: *** [pciutils] Error 1 }}} -- Ticket URL: <http://www.flashrom.org/trac/flashrom/ticket/4> flashrom <http://www.flashrom.org/>

1 1

[PATCH]Improve libpayload support, provide libflashrom.a target
by Georgi, Patrick 08 Mar '11

08 Mar '11

Hi, attached patch contains a couple of build fixes for libpayload builds, adds a "libpayload" OS_ARCH (which disables serial and usb programmers and sets up the build to use lpgcc), and provides a new make target "libflashrom.a" which combines all object files except the CLI_OBJS class into libflashrom.a. For a successful build you also need the libpayload patches on the coreboot mailing list until they're checked in. libflashrom.a still suffers from a variety of exit(1)s here and there, so it's not quite a librarified flashrom yet, but it's a start. Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> -- Patrick Georgi SINA-Development - High Security secunet Security Networks AG - Mergenthalerallee 77 - 65760 Eschborn, Germany Phone +49 201 54 54-3610 - Fax +49 201 54 54-1325 - www.secunet.com Sitz: Kronprinzenstraße 30, 45128 Essen / Amtsgericht Essen HRB 13615 Vorstand: Dr. Rainer Baumgart (Vors.), Thomas Koelzer, Thomas Pleines Aufsichtsratsvorsitzender: Dr. Karsten Ottenberg

2 2

[PATCH] Initial ITE IT8500 EC support (second try)
by David Hendricks 08 Mar '11

08 Mar '11

A few months ago, ITE open sourced the initial IT8500 EC patch on this mailing list ( http://www.flashrom.org/pipermail/flashrom/2010-August/004382.html) so that we could check it in to the Chromium OS branch. It didn't quite make it upstream, and has been updated since then. The attached patch basically does the same thing and has been deployed and tested to work on the Cr-48. There are a few caveats, though: - The boot BIOS straps register must be modified to select LPC. This can be done with the attached "select_bbs.sh" script (Install iotools ( http://code.google.com/p/iotools/) before using select_bbs). We worked around this in the Chromium OS branch by adding a bus argument to the programmer option, ie "flashrom -p internal:bus=lpc". - It is very important to disable power management daemons before running Flashrom on this EC. I commented out the brute force method we use in the Chromium OS branch that disables powerd, since IIRC Carl-Daniel has a better approach in the works. - Due to dependencies which may be introduced by the OEM/ODM EC firmware, the code is not guaranteed to work for anything other than the Cr-48. - Carl-Daniel pointed out that the code might ignore the result of it87 init code. I've attempted to mitigate this in the patch (see internal.c), but I think it's just the symptom of a larger problem with how we detect and initialize IO bridges, and should probably be dealt with in a separate patch. *Here is the text from the original patch submission: The attached patch adds generalized support for IT8500/IT8502 embedded controllers. The patch was developed by Google for Flashrom r1082, but applies cleanly against r1130. It was tested for IT8500E on a Chrome OS platform and may require modification depending on ODM/OEM customization and EC firmware version. This patch is not officially supported by ITE Tech Inc.* Signed-off-by: David Hendricks <dhendrix(a)google.com> (The original patch also included a sign-off from Yung-chieh Lo @ Google and Donald Huang @ ITE). -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

2 5

[PATCH] mark Erase/Write on MX25L1605 as tested
by Sven Schnelle 07 Mar '11

07 Mar '11

Hi List, i flashed my ThinkPad X60s which contains a Macronix MX25L1605D yesterday with flashrom. Erase and Write worked without problems several times, so i think it is safe to mark that Part as completely tested. Signed-off-by: Sven Schnelle <svens(a)stackframe.org>

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[Patch] Add coarse-grained IPC locking mechanism to Flashrom
by David Hendricks 07 Mar '11

07 Mar '11

Hi, I have attached a patch which adds a locking mechanism to Flashrom to prevent multiple instances from running simultaneously. It may need some modification to fit different Flashrom use cases better, but I think it's a good start. The size of the patch is somewhat misleading -- The only real changes to Flashrom's current code are some of the exit points in cli_classic() and some added stuff in the Makefile. Everything else is contained in new files. The new files are: csem.{c,h}: Low-level code that interfaces with semctl(), semget(), etc. ipc_lock.{c,h}: Wrapper for csem stuff. locks.h: A listing of locks that Flashrom cares about. big_lock.{c,h}: An even higher-level wrapper around ipc_lock stuff, useful for simple, coarse-grained locking. util/use_big_lock.sh: Used by the Makefile to test for POSIX.1-2001 compliance. The advantages of this approach are: - The semaphore can be shared easily with other processes. - The semaphore is cleaned automagically in case of abnormal program termination. - Semaphore info can be viewed and managed easily using standard utilities like ipcs. - On Linux at least, a second instance of Flashrom will automatically begin immediately after the first instance is done. No busy waiting, no excessive delays. - We avoid errata with other locking mechanisms (there are known issues with flock(), for example). Disadvantages: - The current patch is very coarse-grained, which could be problematic for people who wish to flash multiple chips simultaneously. - Requires >= POSIX.1-2001 compliance. Please note that some files in this patch are BSD-licensed. Much of it is based off code which was open-sourced by Sun Microsystems, after acquiring it from Cobalt Networks. Signed-off-by: David Hendricks <dhendrix(a)google.com> -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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Re: [flashrom] rtl8169 support - Final
by Mathias Krause 07 Mar '11

07 Mar '11

On 05.01.2011 18:36, Jon Shadow wrote: > I stole that static from nic3com.c file I suppose. > But there its used in nic3com_init() and nic3com_shutdown(), so needs to be a global variable. Regards, Mathias

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flashrom February 2011