flashrom August 2009

flashrom@flashrom.org

28 participants
124 discussions

[ANNOUNCE] flashrom 0.9.1-rc1 has been released
by Carl-Daniel Hailfinger 19 Aug '09

19 Aug '09

flashrom 0.9.1-rc1 has been released. Draft 0.9.1 announcement is at http://www.coreboot.org/Flashrom/0.9.1 and will be moved to flashrom.org once the release is out. http://patchwork.coreboot.org/project/flashrom/list/ has all pending flashrom patches. The following are 0.9.1 material and need an Ack right now: Tidy up docs before release Add serprog to man page quick shot at BSD RDMSR support Compile out FT2232 SPI if not selected Improve error messages, protect the user A tarball will show up at http://qa.coreboot.org/releases/ soon. Regards, Carl-Daniel -- http://www.hailfinger.org/

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quick shot at BSD RDMSR support
by Stefan Reinauer 19 Aug '09

19 Aug '09

This needs /dev/cpu0 from ports/sysutils It's untested and probably won't even compile.. Stefan -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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[commit] r690 - trunk
by svn＠flashrom.org 19 Aug '09

19 Aug '09

Author: hailfinger Date: 2009-08-19 12:46:23 +0200 (Wed, 19 Aug 2009) New Revision: 690 Modified: trunk/flash.h trunk/physmap.c Log: Support rdmsr/wrmsr operations on FreeBSD. So far, AMD Geode LX is the only user of this infrastructure. It needs /dev/cpu0 from ports/sysutils on FreeBSD during runtime on Geode LX. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Acked-by: <putlinuxonit(a)gmail.com> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-08-18 23:51:22 UTC (rev 689) +++ trunk/flash.h 2009-08-19 10:46:23 UTC (rev 690) @@ -309,11 +309,21 @@ void physunmap(void *virt_addr, size_t len); int setup_cpu_msr(int cpu); void cleanup_cpu_msr(void); -#ifndef __DARWIN__ +#if !defined(__DARWIN__) && !defined(__FreeBSD__) && !defined(__DragonFly__) typedef struct { uint32_t hi, lo; } msr_t; msr_t rdmsr(int addr); int wrmsr(int addr, msr_t msr); #endif +#if defined(__FreeBSD__) || defined(__DragonFly__) +/* FreeBSD already has conflicting definitions for wrmsr/rdmsr. */ +#undef rdmsr +#undef wrmsr +#define rdmsr freebsd_rdmsr +#define wrmsr freebsd_wrmsr +typedef struct { uint32_t hi, lo; } msr_t; +msr_t freebsd_rdmsr(int addr); +int freebsd_wrmsr(int addr, msr_t msr); +#endif /* internal.c */ struct pci_dev *pci_dev_find_filter(struct pci_filter filter); Modified: trunk/physmap.c =================================================================== --- trunk/physmap.c 2009-08-18 23:51:22 UTC (rev 689) +++ trunk/physmap.c 2009-08-19 10:46:23 UTC (rev 690) @@ -215,6 +215,91 @@ fd_msr = -1; } #else +#if defined(__FreeBSD__) || defined(__DragonFly__) +#include <sys/ioctl.h> + +typedef struct { + int msr; + uint64_t data; +} cpu_msr_args_t; +#define CPU_RDMSR _IOWR('c', 1, cpu_msr_args_t) +#define CPU_WRMSR _IOWR('c', 2, cpu_msr_args_t) + +static int fd_msr = -1; + +msr_t rdmsr(int addr) +{ + cpu_msr_args_t args; + + msr_t msr = { 0xffffffff, 0xffffffff }; + + args.msr = addr; + + if (ioctl(fd_msr, CPU_RDMSR, &args) < 0) { + perror("CPU_RDMSR"); + close(fd_msr); + exit(1); + } + + msr.lo = args.data & 0xffffffff; + msr.hi = args.data >> 32; + + return msr; +} + +int wrmsr(int addr, msr_t msr) +{ + cpu_msr_args_t args; + + args.msr = addr; + args.data = (((uint64_t)msr.hi) << 32) | msr.lo; + + if (ioctl(fd_msr, CPU_WRMSR, &args) < 0) { + perror("CPU_WRMSR"); + close(fd_msr); + exit(1); + } + + return 0; +} + +int setup_cpu_msr(int cpu) +{ + char msrfilename[64]; + memset(msrfilename, 0, 64); + sprintf(msrfilename, "/dev/cpu%d", cpu); + + if (fd_msr != -1) { + printf("MSR was already initialized\n"); + return -1; + } + + fd_msr = open(msrfilename, O_RDWR); + + if (fd_msr < 0) { + perror("Error while opening /dev/cpu0"); + printf("Did you install ports/sysutils/devcpu?\n"); + return -1; + } + + return 0; +} + +void cleanup_cpu_msr(void) +{ + if (fd_msr == -1) { + printf("No MSR initialized.\n"); + return; + } + + close(fd_msr); + + /* Clear MSR file descriptor */ + fd_msr = -1; +} + +#else + #ifdef __DARWIN__ int setup_cpu_msr(int cpu) { @@ -251,4 +336,5 @@ } #endif #endif +#endif

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[PATCH] Add serprog to man page
by Carl-Daniel Hailfinger 19 Aug '09

19 Aug '09

Add serprog documentation to the manpage. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-serprog_manpage/flashrom.8 =================================================================== --- flashrom-serprog_manpage/flashrom.8 (Revision 686) +++ flashrom-serprog_manpage/flashrom.8 (Arbeitskopie) @@ -150,6 +150,8 @@ .sp .BR "* ft2232spi" " (for flash ROMs attached to a FT2232H/FT4232H based USB SPI programmer)" .sp +.BR "* serprog" " (for flash ROMs attached to Urja's AVR programmer)" +.sp The dummy programmer has an optional parameter specifying the bus types it should support. For that you have to use the .B "flashrom -p dummy=type" @@ -182,16 +184,16 @@ .BR nic3com , .BR satasii . .sp -The it87spi has an optional parameter which will set the I/O base port of the -IT87* SPI controller interface to the port specified in the parameter. -For that you have to use the +The it87spi programmer has an optional parameter which will set the I/O base +port of the IT87* SPI controller interface to the port specified in the +parameter. For that you have to use the .B "flashrom -p it87spi=port=portnum" syntax where .B portnum is an I/O port number which must be a multiple of 8. .sp -The ft2232spi has an optional parameter specifying the controller type and -interface/port it should support. For that you have to use the +The ft2232spi programmer has an optional parameter specifying the controller +type and interface/port it should support. For that you have to use the .B "flashrom -p ft2232spi=model,port=interface" syntax where .B model @@ -206,6 +208,19 @@ .B 4232H and the default interface is .BR B . +.sp +The serprog programmer has an optional parameter specifying either a serial +device/baud combination or an IP/port combination for communication with the +programmer. For serial, you have to use the +.B "flashrom -p serprog=/dev/device:baud" +syntax and for IP, you have to use +.B "flashrom -p serprog=ip:port" +instead. More information about serprog is available in serprog-protocol.txt in +the source distribution. +.sp +Support for some programmers can be disabled at compile time. +.B "flashrom -h" +lists all supported programmers. .TP .B "\-h, \-\-help" Show a help text and exit. -- http://www.hailfinger.org/

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[commit] r689 - trunk
by svn＠flashrom.org 19 Aug '09

19 Aug '09

Author: hailfinger Date: 2009-08-19 01:51:22 +0200 (Wed, 19 Aug 2009) New Revision: 689 Modified: trunk/flashrom.8 Log: Add serprog documentation to the manpage. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashrom.8 =================================================================== --- trunk/flashrom.8 2009-08-18 23:50:14 UTC (rev 688) +++ trunk/flashrom.8 2009-08-18 23:51:22 UTC (rev 689) @@ -146,6 +146,8 @@ .sp .BR "* ft2232spi" " (for flash ROMs attached to a FT2232H/FT4232H based USB SPI programmer)" .sp +.BR "* serprog" " (for flash ROMs attached to Urja's AVR programmer)" +.sp The dummy programmer has an optional parameter specifying the bus types it should support. For that you have to use the .B "flashrom -p dummy=type" @@ -178,16 +180,16 @@ .BR nic3com , .BR satasii . .sp -The it87spi has an optional parameter which will set the I/O base port of the -IT87* SPI controller interface to the port specified in the parameter. -For that you have to use the +The it87spi programmer has an optional parameter which will set the I/O base +port of the IT87* SPI controller interface to the port specified in the +parameter. For that you have to use the .B "flashrom -p it87spi=port=portnum" syntax where .B portnum is an I/O port number which must be a multiple of 8. .sp -The ft2232spi has an optional parameter specifying the controller type and -interface/port it should support. For that you have to use the +The ft2232spi programmer has an optional parameter specifying the controller +type and interface/port it should support. For that you have to use the .B "flashrom -p ft2232spi=model,port=interface" syntax where .B model @@ -202,6 +204,19 @@ .B 4232H and the default interface is .BR B . +.sp +The serprog programmer has an optional parameter specifying either a serial +device/baud combination or an IP/port combination for communication with the +programmer. For serial, you have to use the +.B "flashrom -p serprog=/dev/device:baud" +syntax and for IP, you have to use +.B "flashrom -p serprog=ip:port" +instead. More information about serprog is available in serprog-protocol.txt in +the source distribution. +.sp +Support for some programmers can be disabled at compile time. +.B "flashrom -h" +lists all supported programmers. .TP .B "\-h, \-\-help" Show a help text and exit.

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[PATCH] Tidy up docs before release
by Carl-Daniel Hailfinger 19 Aug '09

19 Aug '09

Tidy up docs before release. Don't mention coreboot.org without context. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-doc_cosmetics/flashrom.8 =================================================================== --- flashrom-doc_cosmetics/flashrom.8 (Revision 687) +++ flashrom-doc_cosmetics/flashrom.8 (Arbeitskopie) @@ -15,10 +15,6 @@ It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash, or SPI. -.PP -(see -.B http://coreboot.org -for details on coreboot) .SH OPTIONS Please note that the command line interface for flashrom will change before flashrom 1.0. Do not use flashrom in scripts or other automated tools without Index: flashrom-doc_cosmetics/README =================================================================== --- flashrom-doc_cosmetics/README (Revision 687) +++ flashrom-doc_cosmetics/README (Arbeitskopie) @@ -2,19 +2,16 @@ flashrom README ------------------------------------------------------------------------------- -flashrom is a utility for reading, writing, verifying and erasing flash ROM -chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system -using a supported mainboard, but it also supports flashing of network +flashrom is a utility for detecting, reading, writing, verifying and erasing +flash chips. It is often used to flash BIOS/EFI/coreboot/firmware images +in-system using a supported mainboard, but it also supports flashing of network cards (NICs), SATA controller cards, and other external devices which can program flash chips. -It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and -TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash, -or SPI. +It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and TSOP40 +chips, which use various protocols such as LPC, FWH, parallel flash, or SPI. -(see http://coreboot.org for details on coreboot) - Packaging --------- -- http://www.hailfinger.org/

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[commit] r688 - trunk
by svn＠flashrom.org 19 Aug '09

19 Aug '09

Author: hailfinger Date: 2009-08-19 01:50:14 +0200 (Wed, 19 Aug 2009) New Revision: 688 Modified: trunk/README trunk/flashrom.8 Log: Tidy up docs before release. Don't mention coreboot.org without context. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/README =================================================================== --- trunk/README 2009-08-18 17:05:54 UTC (rev 687) +++ trunk/README 2009-08-18 23:50:14 UTC (rev 688) @@ -2,19 +2,16 @@ flashrom README ------------------------------------------------------------------------------- -flashrom is a utility for reading, writing, verifying and erasing flash ROM -chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system -using a supported mainboard, but it also supports flashing of network +flashrom is a utility for detecting, reading, writing, verifying and erasing +flash chips. It is often used to flash BIOS/EFI/coreboot/firmware images +in-system using a supported mainboard, but it also supports flashing of network cards (NICs), SATA controller cards, and other external devices which can program flash chips. -It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and -TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash, -or SPI. +It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and TSOP40 +chips, which use various protocols such as LPC, FWH, parallel flash, or SPI. -(see http://coreboot.org for details on coreboot) - Packaging --------- Modified: trunk/flashrom.8 =================================================================== --- trunk/flashrom.8 2009-08-18 17:05:54 UTC (rev 687) +++ trunk/flashrom.8 2009-08-18 23:50:14 UTC (rev 688) @@ -15,10 +15,6 @@ It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash, or SPI. -.PP -(see -.B http://coreboot.org -for details on coreboot) .SH OPTIONS Please note that the command line interface for flashrom will change before flashrom 1.0. Do not use flashrom in scripts or other automated tools without

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[commit] r687 - tags
by svn＠flashrom.org 18 Aug '09

18 Aug '09

Author: hailfinger Date: 2009-08-18 19:05:54 +0200 (Tue, 18 Aug 2009) New Revision: 687 Added: tags/flashrom-0.9.1-rc1/ Log: flashrom 0.9.1-rc1 tag Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net>

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new flashchip support for flashrom program information
by nanotonne＠free.fr 18 Aug '09

18 Aug '09

Hi, I send you a information for flashrom additionnal support (please) Flashrom program detect good my mainboard and chipset but don't detect chip flash rom I have tested to force reading with "similar" model" and it work mainboard : ASUS A7V133 chip flash memory : MOSEL V29C51002T (text writed on chip and reported by awflash utility) aparently this chip similar model as "SyncMOS S29C51002T" from your website because i can read fully with flashrom utility but i can't flash it. documentation mainboard is here : http://dlsvr02.asus.com/pub/ASUS/mb/socka/kt133a/a7v133/a7v133-105.pdf documentation chip rom is here : http://www.datasheetcatalog.org/datasheet/mosel/V29C51002T.pdf or here : http://pdf1.alldatasheet.co.kr/datasheet-pdf/view/2313/MOSEL/V29C51002T-90P… thank to add support of this chip , and too add option for flashrom program to force writing with a "similar chip" (know as compatible after research) when chip is manually defined. note : project coreboot is good, but support for usb disk for boot it and keyboard/mouse usb not supported is a big lack to "switch" to this alternative open firmware :-( ... Michael

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flashrom v0.9.0-r670 works with an ASUS KFN4-D16
by Thomas Ward 18 Aug '09

18 Aug '09

I can report that flashrom v0.9.0-r670 works with an ASUS KFN4-D16 to reflash the mainboard bios chip I flashed an ASUS ROM (3.02) and halted the computer and rebooted, computer booted up as normal. next stop is to flash coreboot on this board, I hope to report back in about one month good luck with your project, Tom Ward

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flashrom August 2009