Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/55849 )
Change subject: sio.c: Put generic Super I/O access scattered throughout files together ......................................................................
sio.c: Put generic Super I/O access scattered throughout files together
Put generic Super I/O helpers in one file and depend compiling it on raw access and x86 architecture.
Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com Change-Id: Ie36370c22edb05ee59b036859b44a968bcc37980 --- M Makefile M board_enable.c M internal.c M programmer.h A sio.c 5 files changed, 95 insertions(+), 50 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/49/55849/1
diff --git a/Makefile b/Makefile index be6e551..6d80617 100644 --- a/Makefile +++ b/Makefile @@ -1184,6 +1184,8 @@ # Raw memory, MSR or PCI port I/O access. FEATURE_CFLAGS += -D'NEED_RAW_ACCESS=1' PROGRAMMER_OBJS += physmap.o hwaccess.o +# Generic Super I/O helpers for raw access +PROGRAMMER_OBJS += sio.o
ifeq ($(TARGET_OS), NetBSD) # For (i386|x86_64)_iopl(2). diff --git a/board_enable.c b/board_enable.c index 9cf0103..e04cdf7 100644 --- a/board_enable.c +++ b/board_enable.c @@ -44,28 +44,6 @@ OUTB(0xAA, port); }
-/* Generic Super I/O helper functions */ -uint8_t sio_read(uint16_t port, uint8_t reg) -{ - OUTB(reg, port); - return INB(port + 1); -} - -void sio_write(uint16_t port, uint8_t reg, uint8_t data) -{ - OUTB(reg, port); - OUTB(data, port + 1); -} - -void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask) -{ - uint8_t tmp; - - OUTB(reg, port); - tmp = INB(port + 1) & ~mask; - OUTB(tmp | (data & mask), port + 1); -} - /* Winbond W83697 documentation indicates that the index register has to be written for each access. */ static void sio_mask_alzheimer(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask) { diff --git a/internal.c b/internal.c index 005bd8d..71f1953 100644 --- a/internal.c +++ b/internal.c @@ -30,34 +30,6 @@
enum chipbustype internal_buses_supported = BUS_NONE;
-#if IS_X86 -void probe_superio(void) -{ - probe_superio_winbond(); - /* ITE probe causes SMSC LPC47N217 to power off the serial UART. - * Always probe for SMSC first, and if a SMSC Super I/O is detected - * at a given I/O port, do _not_ probe that port with the ITE probe. - * This means SMSC probing must be done before ITE probing. - */ - //probe_superio_smsc(); - probe_superio_ite(); -} - -int superio_count = 0; -#define SUPERIO_MAX_COUNT 3 - -struct superio superios[SUPERIO_MAX_COUNT]; - -int register_superio(struct superio s) -{ - if (superio_count == SUPERIO_MAX_COUNT) - return 1; - superios[superio_count++] = s; - return 0; -} - -#endif /* IS_X86 */ - static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) { diff --git a/programmer.h b/programmer.h index 9d1a9ad..a5df45f 100644 --- a/programmer.h +++ b/programmer.h @@ -221,6 +221,10 @@ int it8705f_write_enable(uint8_t port); uint8_t sio_read(uint16_t port, uint8_t reg); void sio_write(uint16_t port, uint8_t reg, uint8_t data); +void sio_switch_ldn(uint16_t port, uint8_t ldn); +uint16_t sio_get_iobase(uint16_t port, uint8_t io_bar_number); +uint16_t sio_read_id(uint16_t port, uint8_t io_bar_number); +bool sio_is_ldn_enabled(uint16_t port); void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); void board_handle_before_superio(void); void board_handle_before_laptop(void); diff --git a/sio.c b/sio.c new file mode 100644 index 0000000..35b504e --- /dev/null +++ b/sio.c @@ -0,0 +1,89 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2021, TUXEDO Computers GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#if defined(__i386__) || defined(__x86_64__) + +#include "programmer.h" +#include "hwaccess.h" + +void probe_superio(void) +{ + probe_superio_winbond(); + /* ITE probe causes SMSC LPC47N217 to power off the serial UART. + * Always probe for SMSC first, and if a SMSC Super I/O is detected + * at a given I/O port, do _not_ probe that port with the ITE probe. + * This means SMSC probing must be done before ITE probing. + */ + //probe_superio_smsc(); + probe_superio_ite(); +} + +int superio_count = 0; +#define SUPERIO_MAX_COUNT 3 + +struct superio superios[SUPERIO_MAX_COUNT]; + +int register_superio(struct superio s) +{ + if (superio_count == SUPERIO_MAX_COUNT) + return 1; + superios[superio_count++] = s; + return 0; +} + +/* Generic Super I/O helper functions */ +uint8_t sio_read(uint16_t port, uint8_t reg) +{ + OUTB(reg, port); + return INB(port + 1); +} + +void sio_write(uint16_t port, uint8_t reg, uint8_t data) +{ + OUTB(reg, port); + OUTB(data, port + 1); +} + +void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask) +{ + uint8_t tmp; + + OUTB(reg, port); + tmp = INB(port + 1) & ~mask; + OUTB(tmp | (data & mask), port + 1); +} + +void sio_switch_ldn(uint16_t port, uint8_t ldn) +{ + sio_write(port, 0x07, ldn); +} + +uint16_t sio_get_iobase(uint16_t port, uint8_t io_bar_number) +{ + return (sio_read(port, 0x60 + io_bar_number * 2) << 8) | + sio_read(port, 0x61 + io_bar_number * 2); +} + +uint16_t sio_read_id(uint16_t port, uint8_t io_bar_number) +{ + return (sio_read(port, 0x20) << 8) | sio_read(port, 0x21); +} + +bool sio_is_ldn_enabled(uint16_t port) +{ + return (sio_read(port, 0x30) & 1) ? true : false; +} + +#endif \ No newline at end of file