[flashrom-gerrit] [S] Change in flashrom[main]: ichspi: Add support for Panther Lake

[Subrata Banik (Code Review)]

Attention is currently required from: Anastasia Klimchuk, Hsuan Ting Chen, Hsuan-ting Chen.

Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/flashrom/+/83144?usp=email )

Change subject: ichspi: Add support for Panther Lake
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Patch Set 1:

(1 comment)

File include/programmer.h:

https://review.coreboot.org/c/flashrom/+/83144/comment/87f97787_2921acf2?usp... :
PS1, Line 364: 	/* All chipsets after METEOR_LAKE should support checking BIOS_BM to get read/write access to of FREG0~15 */
> We attempted to move METEOR_LAKE to the bottom of the ich_chipset enum, but this patch reveals that many usages still rely on the existing order:
>    case CHIPSET_METEOR_LAKE:
>    case CHIPSET_PANTHER_LAKE:
>    case CHIPSET_APOLLO_LAKE:
>    case CHIPSET_GEMINI_LAKE:
>    case CHIPSET_JASPER_LAKE:
>    case CHIPSET_ELKHART_LAKE:
>
> Based on your expertise, which order would be more logical and maintainable? Could you provide insights on the factors that should be considered when determining the ideal order?

this is fine, PTL is post MTL hence, the Flash range between 0-15 actually applies for PTL as well. The only problem that was existed, now fixed with CB:83143.