Attention is currently required from: Mimoja. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37987 )
Change subject: chipset_enable.c: Add Ice Lake U to known and tested systems ......................................................................
Patch Set 8:
(1 comment)
Patchset:
PS8:
No, flashrom uses the LPC device's PCI IDs. […]
TGL IDs in flashrom are LPC/eSPI DIDs. Also, see this comment in `enable_flash_pch100_or_c620`:
/* * The SPI PCI device is usually hidden (by hiding PCI vendor * and device IDs). So we need a PCI access method that works * even when the OS doesn't know the PCI device. We can't use * this method globally since it would bring along other con- * straints (e.g. on PCI domains, extended PCIe config space). */
flashrom can run on any system, not just Intel systems. The internal programmer can't assume anything about the system it runs on, so it can't try to blindly access a PCI device that doesn't enumerate normally (who knows what that device could be). That's why flashrom uses the LPC/eSPI device ID to detect the chipset it's running on: the LPC/eSPI device is always visible (AFAIK it can't even be disabled), so it's possible to look at all the enumerated PCI devices to see if there's any VID/DID match. Only when the chipset is known can flashrom try accessing a potentially hidden PCI device (i.e. the SPI PCI device).