[flashrom-gerrit] [M] Change in flashrom[master]: spi25.c: Move spi_get_opcode_from_erasefn() to spi.c

[Thomas Heijligen (Code Review)]

Thomas Heijligen has submitted this change. ( https://review.coreboot.org/c/flashrom/+/67715 )

(

7 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: spi25.c: Move spi_get_opcode_from_erasefn() to spi.c
......................................................................

spi25.c: Move spi_get_opcode_from_erasefn() to spi.c

Split spi_get_opcode_from_erasefn() out into spi.c to add support for
non spi25 flashes next.

Change-Id: Id654e998d0af2d3f5845336bb98b38d724519038
Signed-off-by: Thomas Heijligen 
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67715
Reviewed-by: Thomas Heijligen 
Reviewed-by: Edward O'Callaghan 
Tested-by: build bot (Jenkins) 
---
M spi.c
M spi25.c
2 files changed, 51 insertions(+), 12 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Thomas Heijligen: Looks good to me, approved
  Edward O'Callaghan: Looks good to me, approved

diff --git a/spi.c b/spi.c
index eeb1362..8983e81 100644
--- a/spi.c
+++ b/spi.c
@@ -167,3 +167,37 @@
    	rmst.spi.data = data;
    return register_master(&rmst);
 }
+
+static const struct {
+	enum block_erase_func func;
+	uint8_t opcode;
+} function_opcode_list[] = {
+	{SPI_BLOCK_ERASE_20, 0x20},
+	{SPI_BLOCK_ERASE_21, 0x21},
+	{SPI_BLOCK_ERASE_50, 0x50},
+	{SPI_BLOCK_ERASE_52, 0x52},
+	{SPI_BLOCK_ERASE_53, 0x53},
+	{SPI_BLOCK_ERASE_5C, 0x5c},
+	{SPI_BLOCK_ERASE_60, 0x60},
+	{SPI_BLOCK_ERASE_62, 0x62},
+	{SPI_BLOCK_ERASE_81, 0x81},
+	{SPI_BLOCK_ERASE_C4, 0xc4},
+	{SPI_BLOCK_ERASE_C7, 0xc7},
+	{SPI_BLOCK_ERASE_D7, 0xd7},
+	{SPI_BLOCK_ERASE_D8, 0xd8},
+	{SPI_BLOCK_ERASE_DB, 0xdb},
+	{SPI_BLOCK_ERASE_DC, 0xdc},
+};
+
+uint8_t spi_get_opcode_from_erasefn(enum block_erase_func func)
+{
+	size_t i;
+	for (i = 0; i < ARRAY_SIZE(function_opcode_list); i++) {
+		if (function_opcode_list[i].func == func)
+			return function_opcode_list[i].opcode;
+	}
+	msg_cinfo("%s: unknown erase function (0x%d). Please report "
+			"this at [e-mail]\n", __func__, func);
+	return 0x00; //Assuming 0x00 is not a erase function opcode
+}
+
diff --git a/spi25.c b/spi25.c
index da870be..cae6200 100644
--- a/spi25.c
+++ b/spi25.c
@@ -651,18 +651,6 @@
    return NO_BLOCK_ERASE_FUNC;
 }

-uint8_t spi_get_opcode_from_erasefn(enum block_erase_func func)
-{
-	size_t i;
-	for (i = 0; i < ARRAY_SIZE(function_opcode_list); i++) {
-		if (function_opcode_list[i].func == func)
-			return function_opcode_list[i].opcode;
-	}
-	msg_cinfo("%s: unknown erase function (0x%d). Please report "
-			"this at [e-mail]\n", __func__, func);
-	return 0x00; //Assuming 0x00 is not a erase function opcode
-}
-
 static int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len)
 {
    const bool native_4ba = flash->chip->feature_bits & FEATURE_4BA_WRITE && spi_master_4ba(flash);