Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/41532 )
Change subject: raiden_debug_spi.c: Refactor to support multiple protocols ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/flashrom/+/41532/3/raiden_debug_spi.c File raiden_debug_spi.c:
https://review.coreboot.org/c/flashrom/+/41532/3/raiden_debug_spi.c@266 PS3, Line 266: int16_t max_spi_write_count; : uint16_t max_spi_read_count;
By flashrom drivers I believe you are talking about spi masters? In that case, it is up to them how […]
jlink_spi.c has some parallels, albit a more simplified version:
$ git grep max_data jlink_spi.c jlink_spi.c: .max_data_read = JTAG_MAX_TRANSFER_SIZE - 5, jlink_spi.c: .max_data_write = JTAG_MAX_TRANSFER_SIZE - 5,