Attention is currently required from: Sam McNally, Subrata Banik, Rizwan Qureshi, Edward O'Callaghan, Angel Pons.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62251 )
Change subject: ichspi: Add Alder Lake support
......................................................................
Patch Set 10:
(1 comment)
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/62251/comment/96bb4e7a_255cf6a9
PS8, Line 76: case CHIPSET_600_SERIES_ALDER_POINT:
Alright, thanks for the clarification. Let me know if a patch is made to address this.
Well, IIRC, this is not about the hardware. `NM` is only used by Intel's tools
and at some point they changed the meaning a little, it seems at least. I think
the best way to figure it out is to use a matching version of Intel's FIT tool,
generate one descriptor with GbE and one without. Compare `NM` to the expected
value (I guess at least 3 masters with GbE; if it actually changes with GbE
disabled, idk.).
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