[flashrom-gerrit] Change in flashrom[master]: chipset_enable.c: Add Ice Lake U to known and tested systems

[Subrata Banik (Code Review)]

Attention is currently required from: Mimoja.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/37987 )

Change subject: chipset_enable.c: Add Ice Lake U to known and tested systems
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Patch Set 8:

(1 comment)

Patchset:

PS8:
> No, flashrom uses the LPC device's PCI IDs. The SPI PCI device isn't always visible: I have an HP 280 G2 mainboard (LGA1151 socket with Sunrise Point H110 PCH) where vendor firmware hides the SPI PCI device.

With postboot_sai being implemented with CNP PCH, things are little different between how to disable/hide a controller like SPI during boot, won't go into that. I believe that is decision made by some OEM to hide the SPI PCI device.

But if follow that design choice then how feasible is to pass the SPI PCI device (0x1f) and function number (5) as below when SPI device itself is not listed there?

static int enable_flash_pch300(struct pci_dev *const dev, const char *const name)
{
    return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_300_SERIES_CANNON_POINT);
}

Please take a look into DID used in flashrom for TGL, ADL and MTL chipset, those are all SPI DID instead eSPI/PCH DID.