[flashrom-gerrit] [S] Change in flashrom[master]: writeprotect.c: refuse to work with chip if OTP WPS == 1

[Anastasia Klimchuk (Code Review)]

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/66836 )

Change subject: writeprotect.c: refuse to work with chip if OTP WPS == 1
......................................................................

writeprotect.c: refuse to work with chip if OTP WPS == 1

Perform the check right in read_wp_bits() as it's used by various WP
operations and also because its results won't make sense if WPS bit is
on and can't be changed.

Change-Id: I143186066a1d3af89809b7135886cb8b0d038085
Signed-off-by: Sergii Dmytruk 
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66836
Tested-by: build bot (Jenkins) 
Reviewed-by: Edward O'Callaghan 
Reviewed-by: Nikolai Artemiev 
---
M cli_classic.c
M include/libflashrom.h
M writeprotect.c
3 files changed, 41 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Edward O'Callaghan: Looks good to me, approved
  Nikolai Artemiev: Looks good to me, but someone else must approve

diff --git a/cli_classic.c b/cli_classic.c
index 574afff..bd98a07 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -202,6 +202,8 @@
    	return "the requested protection range is not supported";
    case FLASHROM_WP_ERR_RANGE_LIST_UNAVAILABLE:
    	return "could not determine what protection ranges are available";
+	case FLASHROM_WP_ERR_UNSUPPORTED_STATE:
+		return "can't operate on current WP configuration of the chip";
    }
    return "unknown WP error";
 }
diff --git a/include/libflashrom.h b/include/libflashrom.h
index 9bbdcc5..bac76c2 100644
--- a/include/libflashrom.h
+++ b/include/libflashrom.h
@@ -464,7 +464,8 @@
    FLASHROM_WP_ERR_VERIFY_FAILED = 5,
    FLASHROM_WP_ERR_RANGE_UNSUPPORTED = 6,
    FLASHROM_WP_ERR_MODE_UNSUPPORTED = 7,
-	FLASHROM_WP_ERR_RANGE_LIST_UNAVAILABLE = 8
+	FLASHROM_WP_ERR_RANGE_LIST_UNAVAILABLE = 8,
+	FLASHROM_WP_ERR_UNSUPPORTED_STATE = 9
 };

enum flashrom_wp_mode {
diff --git a/writeprotect.c b/writeprotect.c
index 3e8a836..1ac0c1a 100644
--- a/writeprotect.c
+++ b/writeprotect.c
@@ -73,6 +73,25 @@
    size_t i;
    enum flashrom_wp_result ret;

+	/*
+	 * Write protection select bit (WPS) controls kind of write protection
+	 * that is used by the chip. When set, BP bits are ignored and each
+	 * block/sector has its own WP bit managed by special commands. When
+	 * the bit is set and we can't change it, just bail out until
+	 * implementation is extended to handle this kind of WP.
+	 */
+	if (bit_map->wps.reg != INVALID_REG && bit_map->wps.writability != RW) {
+		bool wps_bit_present;
+		uint8_t wps;
+
+		ret = read_bit(&wps, &wps_bit_present, flash, bit_map->wps);
+		if (ret != FLASHROM_WP_OK)
+			return ret;
+
+		if (wps_bit_present && wps)
+			return FLASHROM_WP_ERR_UNSUPPORTED_STATE;
+	}
+
    ret = read_bit(&bits->tb,  &bits->tb_bit_present,  flash, bit_map->tb);
    if (ret != FLASHROM_WP_OK)
    	return ret;
@@ -93,8 +112,6 @@
    if (ret != FLASHROM_WP_OK)
    	return ret;

-	/* Note: WPS bit isn't read here, because it's not part of any range. */
-
    for (i = 0; i < ARRAY_SIZE(bits->bp); i++) {
    	if (bit_map->bp[i].reg == INVALID_REG)
    		break;