Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/flashrom/+/33164 )
Change subject: chipset_enable: Mark Intel QS77 as DEP ......................................................................
chipset_enable: Mark Intel QS77 as DEP
Tested reading and writing with `-p internal` on MacBook Air 5,2 with Intel QS77.
Change-Id: I508b6379507c2881c976d6baf7348b1161449cfe Signed-off-by: Evgeny Zinoviev me@ch1p.io Reviewed-on: https://review.coreboot.org/c/flashrom/+/33164 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/chipset_enable.c b/chipset_enable.c index 6280876..19fd658 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1746,7 +1746,7 @@ {0x8086, 0x1e4a, DEP, "Intel", "H77", enable_flash_pch7}, {0x8086, 0x1e53, NT, "Intel", "C216", enable_flash_pch7}, {0x8086, 0x1e55, DEP, "Intel", "QM77", enable_flash_pch7}, - {0x8086, 0x1e56, NT, "Intel", "QS77", enable_flash_pch7}, + {0x8086, 0x1e56, DEP, "Intel", "QS77", enable_flash_pch7}, {0x8086, 0x1e57, DEP, "Intel", "HM77", enable_flash_pch7}, {0x8086, 0x1e58, NT, "Intel", "UM77", enable_flash_pch7}, {0x8086, 0x1e59, NT, "Intel", "HM76", enable_flash_pch7},